CN108352308B

CN108352308B - Wafer picking device

Info

Publication number: CN108352308B
Application number: CN201680062745.8A
Authority: CN
Inventors: 春日大介
Original assignee: Yamaha Motor Co Ltd
Current assignee: Yamaha Motor Co Ltd
Priority date: 2016-01-28
Filing date: 2016-01-28
Publication date: 2022-05-10
Anticipated expiration: 2036-01-28
Also published as: KR20180071320A; JPWO2017130361A1; CN108352308A; KR102056656B1; JP6522797B2; WO2017130361A1

Abstract

A wafer pickup device, comprising: an imaging device (8) that captures an image of a wafer (W) that is cut into a plurality of chips (C) and to which a mark (Rm) indicating a reference position is attached to an arbitrary chip (Cs); a storage unit (17) that stores in advance a set positional relationship between a known reference position (P) on a wafer and a mark (Rm) of the wafer; an extraction processing unit (183) that performs image processing on the captured image of the wafer, extracts the mark (Rm) and a feature portion of the shape of the wafer, and derives a reference position (P) from the feature portion of the shape; and an abnormality detection unit (184) that detects positional abnormality of the mark (Rm) by comparing the measured positional relationship between the reference position (P) and the mark (Rm) specified from the wafer image with the set positional relationship stored in the storage unit (17).

Description

Wafer picking device

Technical Field

The present invention relates to a wafer pickup apparatus for picking up a wafer (die) from a wafer (wafer) after dicing.

Background

There is known a component mounting apparatus which picks up bare chips (die) from a wafer after dicing and mounts the die on a substrate. The component mounting apparatus includes a head portion capable of individually sucking bare chips and a control portion controlling an operation of the head portion. The control unit moves the head portion based on a wafer map indicating whether or not each of the bare chips is acceptable, which is prepared in advance for a wafer to be sucked, and sequentially sucks targeted bare chips (see, for example, patent document 1).

In the suction operation, a reference mark provided on the wafer may be referred to in order to align the wafer pattern with the bare chip of the actual wafer. The reference mark is, for example, a printed mark attached to a bare chip in the wafer at a specific coordinate. Alternatively, in the fabrication of a wafer, a bare chip (mirror chip) on which patterning is not performed may be formed at a specific coordinate, and the mirror chip may be used as a reference mark. The control unit recognizes the position of the reference mark from the captured image of the wafer, and applies the position of the reference mark to the wafer map to align the wafer map with the bare chips of the wafer. The control unit recognizes the position of the bare chip at the first suction point with reference to the reference mark, and causes the head to perform a suction operation.

However, sometimes a so-called print offset occurs, i.e. the reference mark is not printed on the desired bare chip. Or, the position of the reference mark may be displaced due to the bare chip or the mirror chip being accurately printed being lifted from the bonding surface of the wafer. If these shifts are large, the wafer map cannot be aligned with the bare chips on the wafer accurately, and the control unit erroneously recognizes the position of the bare chip at the suction start point. In this case, the pick-up operation of the bare chip performed on the wafer map cannot be performed, and a typical pick-up operation is an operation of picking up a qualified bare chip.

The device of patent document 1 discloses the following technique: not only the reference mark but also the wafer ID mark is recognized, and a positional offset between the wafer ID mark and the wafer map is found. However, the technique of patent document 1 cannot be applied to a wafer in which the wafer ID mark does not exist. Further, the technique of patent document 1 does not consider the problem of positional deviation of the reference mark, and since the wafer ID mark is also marked by laser printing or the like, there is a possibility that the problem of print deviation may occur.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2013-197225

Disclosure of Invention

The present invention has been made in view of the above circumstances, and an object thereof is to provide a wafer pickup apparatus including: the position of the wafer can be correctly determined even if the position of the reference mark is shifted.

One aspect of the present invention relates to a wafer pickup apparatus, comprising: an imaging device that captures an image of a wafer that is cut into a plurality of chips and to which a mark indicating a reference position is attached to an arbitrary chip; a storage unit that stores in advance a set positional relationship between a known reference position on the wafer and the mark of the wafer; an extraction processing unit that performs image processing on the captured image of the wafer, extracts the mark and a feature of a shape of the wafer, and derives the reference position from the feature of the shape; and an abnormality detection unit that detects a positional abnormality of the mark by comparing an actual measurement positional relationship between the reference position and the mark determined from the image of the wafer with the set positional relationship stored in the storage unit.

The objects, features and advantages of the present invention will become more apparent from the detailed description and the accompanying drawings.

Drawings

Fig. 1 is a plan view in plan view showing the overall configuration of a component mounting apparatus to which a wafer pickup apparatus according to the present invention is applied.

Fig. 2 is an exploded perspective view showing a mechanical structural part of the wafer pickup apparatus in the component mounting apparatus.

Fig. 3 is a block diagram showing a control system of the component mounting apparatus.

Fig. 4 (a) is a plan view of a wafer, and fig. 4 (B) is a view showing an example of a wafer map.

Fig. 5 is a diagram showing an example of a reference mark.

Fig. 6 (a) and (B) are diagrams showing an example of a reference mark failure.

Fig. 7 (a) is a top view of a wafer with a notch, and fig. 7 (B) is a top view of a wafer with an orientation flat.

Fig. 8 is a functional block diagram of the main arithmetic unit.

Fig. 9 is a diagram showing a first embodiment of detecting a positional abnormality of a reference mark.

Fig. 10 is a diagram showing a specific method of first adsorbing a bare chip in the first embodiment.

Fig. 11 is a diagram for explaining a modification of the first embodiment.

Fig. 12 is a diagram showing a second embodiment for detecting a positional abnormality of a reference mark.

Fig. 13 is a diagram for explaining a modification of the second embodiment.

Fig. 14 is a flowchart showing the operation of the component mounting apparatus.

Fig. 15 is a diagram for explaining the rotation angle correction processing.

Detailed Description

[ description of component mounting apparatus ]

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The wafer pickup apparatus according to the present invention can be applied to various apparatuses such as a wafer bonder, a tape loading apparatus for storing a diced wafer in a tape, and a component mounting apparatus for mounting the wafer on a substrate. Here, an example in which the wafer pickup apparatus is applied to a component mounting apparatus will be described.

Fig. 1 is a plan view in plan view showing the overall configuration of a component mounting apparatus 100 to which a wafer pickup apparatus D according to an embodiment of the present invention is applied. Fig. 2 is an exploded perspective view mainly showing a mechanical structural part of the wafer pickup device D in the component mounting device 100. The component mounting apparatus 100 is a composite type component mounting apparatus capable of taking out a chip (die (hereinafter referred to as a bare chip C)) from a wafer W after dicing and mounting the chip on a printed board 20, and capable of mounting a chip component supplied from a tape feeder 31 on the printed board 20.

The component mounting apparatus 100 includes: a base station 1; a conveyor belt 2; two chip component supply parts 3; a mounting portion 4; a wafer holding table 5; a push-up section 6 (shown only in fig. 2); a take-out section (7); a component recognition camera 8 (imaging device); a fixed camera 9; a wafer receiving section 10; and a control unit 12.

The conveyor 2 carries the printed circuit board 20 into a predetermined mounting work position, and carries the printed circuit board 20 out of the work position after the mounting work. The conveyor belt 2 includes: a conveyor belt body extending in the X direction for conveying the printed circuit board 20; a positioning mechanism, not shown, for lifting and positioning the printed circuit board 20 on the conveyor main body. The conveyor 2 transports the printed circuit board 20 in the X direction from the X2 direction side to the X1 direction side in a substantially horizontal posture, and positions and fixes the printed circuit board 20 at a predetermined mounting work position (two printed circuit board 20 positions shown in fig. 1).

The two chip component supply portions 3 are provided at both ends of the near side (Y1 direction side) of the component mounting apparatus 100, respectively. The chip component supply section 3 supplies chip components such as transistors, resistors, and capacitors. The chip component supply section 3 is equipped therein with a plurality of tape feeders 31 having carrier tapes that hold the chip components at prescribed intervals. Each tape feeder 31 intermittently feeds out the carrier tape to feed out the chip components to a designated component supply position.

The mounting portion 4 mounts the bare chip C or the chip component on the printed substrate 20. The mounting portion 4 includes two head units (a first head unit 41 and a second head unit 42) and their supports (a first support 43 and a second support 44). The first and

second head units

41 and 42 are movable in the horizontal direction (XY direction) at a position above the conveyor belt 2 (Z2 direction) by an XY moving mechanism (not shown). The first head unit 41 has a region mainly on the upstream side (the X2 direction side) on the base 1 as a movable region, and the second head unit 42 has a region mainly on the downstream side (the X1 direction side) as a movable region.

The first head unit 41 is shown in fig. 2. The first head unit 41 has two

component mounting heads

411, 412 provided along the X direction and one substrate recognition camera 45. The same applies to the second head unit 42. The component mounting heads 411 and 412 can suck and hold the chip component supplied from the tape feeder 31 or the bare chip C supplied from the take-out section 7 described later by their distal end sections based on the negative pressure generated by the negative pressure generator (not shown). The mounting unit 4 attaches the chip component or bare chip C to the distal end portions of the

component mounting heads

411 and 412, and mounts them on the printed circuit board 20.

The substrate recognition camera 45 is a camera that photographs the printed substrate 20. Before the components are mounted on the printed substrate 20 by the first head unit 41, a reference mark (custom mark) attached to the printed substrate 20 is recognized from a photographed image of the printed substrate 20 photographed by the substrate recognition camera 45. This recognizes the positional deviation of the printed board 20 and corrects the positional deviation during component mounting.

The wafer housing section 10 houses a plurality of diced wafers W and is provided in the center of the near side (Y1 direction side) of the component mounting apparatus 100. The wafer W is held by a substantially annular holder 11. The wafer storage section 10 includes a storage rack for storing a plurality of stages of holders 11 for holding wafers W and a drive unit for driving the storage rack to move up and down. Each wafer W accommodated in the wafer accommodating portion 10 is held by the holder 11 by a wafer sheet (wafer sheet) in a state where the bare chip C is attached to the wafer sheet. The wafer storage section 10 sets a desired wafer W to a predetermined entry and exit height position where the wafer W can enter and exit the wafer holding table 5 based on the ascending and descending of the storage rack.

The wafer holding table 5 supports the wafer W pulled out from the wafer storage section 10. The component mounting apparatus 100 includes an in-out mechanism (not shown) that performs an operation of pulling out the wafer W from the wafer storage section 10 and mounting the wafer W on the wafer holding table 5 or, conversely, returning the wafer W from the wafer holding table 5 to the wafer storage section 10. The wafer holding table 5 has a circular opening at the center, and holds the holder 11 so that the opening, the opening of the holder 11b, and the opening of the wafer holding table 5 overlap each other.

The wafer holding table 5 is movable on the base 1 in the Y direction between a component pickup operation position and a wafer receiving position. Specifically, the wafer holding table 5 is movably supported by a pair of fixed rails 51 provided on the base 1 so as to extend in the Y direction, and moves along the fixed rails 51 based on a specified driving unit. The driving unit includes: a ball screw shaft 52 extending parallel to the fixed rail 51 and screwed into a nut portion of the wafer holding table 5; and a driving motor 53 for driving the ball screw shaft 52 to rotate. The wafer holding table 5 is moved between a predetermined component pickup operation position and a wafer receiving position in the vicinity of the wafer storage section 10 by the lower position of the conveyor 2.

The push-up section 6 pushes up the bare chip C to be taken out of the bare chip group of the wafer W set on the wafer holding table 5 at the component taking-out operation position from the lower side thereof, thereby lifting the bare chip C while peeling it off from the wafer plate. The push-up portion 6 includes a push-up head 61 and a fixing rail 62. The push-up head 61 has a first push-up rod 611 and a second push-up rod 612 with push-up pins built therein. The first and second push-up

bars

611 and 612 suck the bare chip C based on the negative pressure generated at the distal end thereof by the negative pressure generator (not shown). This can suppress the positional deviation of the bare chip C during the push-up.

The fixed rail 62 is fixed to the base 1 and supports the push-up head 61 so as to be movable in the X direction. The push-up unit 6 includes a drive mechanism for moving the push-up head 61 along the fixed rail 62. The drive mechanism includes a push-up head drive motor 63 (see fig. 3) as a drive source. The push-up head 61 is configured to be movable in the X direction, and the push-up head 61 can push up an arbitrary bare chip C with respect to the wafer W supported on the wafer holding stage 5 movable only in the Y direction.

The taking-out section 7 (head) sucks (picks up the wafer) the bare chip C pushed up by the pushing-up section 6 and delivers to the first head unit 41 or the second head unit 42. The take-out section 7 is moved in the horizontal direction (XY direction) at a position (Z2 direction) above the component take-out operation position based on a predetermined driving unit. The extraction section 7 includes: four round heads 7a to 7 d; a beam member 7 e; two bracket parts 7 f; two wafer head rotating motors 7 h; a round head elevating motor 7i (see fig. 3).

The wafer heads 7a to 7d can rotate about the X axis and can move in the up-down direction (Z direction). The wafer heads 7a to 7d attract the bare chip C based on the negative pressure generated at the distal end thereof by a negative pressure generator, not shown. The die heads 7a to 7d deliver the bare chip C to the

component mounting heads

411, 412 at the specified delivery positions. The wafer heads 7a and 7b are supported rotatably about the X axis by the support member 7f on the X2 direction side, and the wafer heads 7c and 7d are supported rotatably about the X axis by the support member 7f on the X1 direction side.

The wafer head rotating motor 7h is a motor that drives the wafer heads 7a and 7c and the wafer heads 7b and 7d to rotate so that their vertical (Z direction) positions can be replaced with each other. This is to invert (flip) the bare chip C attracted to the wafer heads 7a to 7 d. The two bracket members 7f are supported by the beam members 7e so as to be able to move up and down, respectively. The wafer head lifting motor 7i is a driving source for lifting the holder member 7f with respect to the beam member 7e, and thereby the wafer heads 7a to 7d are lifted and lowered.

As shown in fig. 1, the drive unit of the take-out section 7 includes: a pair of fixed rails 71; a beam member 72; a pair of ball screw shafts 73; a pair of beams drive the motor 74. The pair of fixed rails 71 are fixed to the base 1 and extend in the Y direction at a predetermined interval in the X direction in parallel with each other. The beam member 72 extends in the X direction, and both ends thereof are respectively movably supported on the fixed rails 71. The pair of ball screw shafts 73 are provided at positions close to the fixed rail 71 so as to extend in the Y direction, and are screwed into nut members (not shown) at both ends of the beam member 72. A pair of beam drive motors 74 drive rotation of the ball screw shafts 73.

The extraction unit 7 and the component recognition camera 8 are mounted on the beam member 72. The beam member 72 moves along the fixed rail 71 based on the operation of the pair of beam driving motors 74, and the pickup unit 7 and the component recognition camera 8 move integrally in the Y direction along with the movement of the beam member 72. A drive motor 75 for moving the take-out portion 7 in the X direction along the beam member 72 and a drive motor 76 for moving the component recognition camera 8 in the X direction along the beam member 72 are provided on the X1 side end portion of the beam member 72.

The component recognition camera 8 captures an image of the wafer W (bare chip C) placed on the wafer holding stage 5 before the bare chip C is picked up from the wafer W. The captured image data is output to the control unit 12. In the present embodiment, the feature portion of the shape of the wafer W is extracted from the image of the wafer W captured by the component recognition camera 8.

The fixed camera 9 is a component recognition camera provided in the movable region of each of the first and

second head units

41 and 42 on the base 1. The fixed camera 9 picks up images of the components held by the

component mounting heads

411 and 412 of the first and

second head units

41 and 42 from below (from the Z1 direction side), and outputs image signals thereof to the control unit 12.

The control unit 12 integrally controls the operations of the respective units of the component mounting apparatus 100. Fig. 3 is a block diagram showing a control system of the component mounting apparatus 100. The control unit 12 is electrically connected to the drive motor 53, the pusher drive motor 63, the beam drive motor 74, the drive motor 75, the drive motor 76, the wafer head rotating motor 7h, the wafer head lifting motor 7i, the element recognition camera 8, the fixed camera 9, and the substrate recognition camera 45, respectively. The control unit 12 is also electrically connected to an input device, not shown, and various information by the user is input based on an operation of the input device. Further, the control unit 12 receives an output signal from a position detection means such as an encoder (not shown) incorporated in each drive motor.

The control unit 12 includes a shaft control unit 13, an image processing unit 14, an I/O processing unit 15, a communication control unit 16, a storage unit 17, and a main arithmetic unit 18. The shaft control unit 13 is a driver that drives each drive motor, and operates each drive motor in accordance with an instruction from the main arithmetic unit 18. The image processing unit 14 performs various image processing on the image data input from the cameras (the component recognition camera 8, the fixed camera 9, and the substrate recognition camera 45). The I/O processing unit 15 controls input of signals from various sensors (not shown) provided in the component mounting apparatus 100 and output of various control signals. The communication control unit 16 controls communication with an external device. The storage unit 17 stores various programs such as an installation program and various data. The main arithmetic unit 18 integrally controls the control unit 12 and executes various arithmetic processes. The functional configuration of the main arithmetic unit 18 will be described later with reference to fig. 8.

The control unit 12 controls the drive motors and the like in accordance with a preset program, thereby controlling the operations of the conveyor 2, the wafer holding table 5, the pushing-up unit 6, the take-out unit 7, and the first and

second head units

41 and 42. Thereby, the suction position of the extraction portion 7 (the wafer heads 7a to 7d) to which the bare chip C is sucked is adjusted. The controller 12 controls a series of operations such as the movement of the wafer W into and out of the wafer storage 10, the picking up of the bare chips C from the wafer W, and the component mounting by the first and

second head units

41 and 42.

[ wafer map (wafer map) and defects thereof ]

As one of various data stored in the storage unit 17, there is a wafer map. Fig. 4 (a) is a top plan view of a typical wafer W, and fig. 4 (B) is a view showing an example of a wafer map WM relating to the wafer W. As shown in fig. 4 (a), a plurality of bare chips C which are cut into individual pieces are present on the wafer W. The bare chips C are arranged in a matrix on the wafer plate in the XY direction. The position of each of these bare chips C is managed by an address based on the XY coordinate system.

The wafer map WM is a file in which an evaluation is made as to whether each bare chip C included in the wafer W is a good or a defective based on a predetermined criterion. The evaluation values are described in association with the addresses of the bare chips C, respectively. In fig. 4 (B), "1" denotes a non-defective bare chip C, "2" denotes a bare chip C that is not a defective product but has a low grade, and "3" denotes a defective bare chip C. Further, "n" indicates that no bare chip C exists at the address. When the picking-up unit 7 picks up the bare chips C from the wafer W, the control unit 12 sets the order of picking up with reference to the wafer map WM, and sequentially picks up only the non-defective bare chips C.

What is important here is that the position of the wafer W (bare chip C) now placed on the wafer holding table 5 is aligned with the wafer map WM. The alignment here refers to the alignment of the XY coordinates of the address on the wafer W and the address on the wafer map WM of each bare chip C. If the coordinates do not match, for example, a problem occurs in that the bare chip C of the defective product evaluated by "3" is picked up, or the bare chip C of the evaluation "1" is originally picked up, but the bare chip C of the evaluation "2" is picked up. In order to perform the above alignment, a reference mark (mark indicating a reference position) previously marked on the wafer W may be used.

Fig. 5 is a diagram showing an example of the reference mark Rm. In fig. 5, the upper side is an overall view of the wafer W, and the enlarged view of the frame portion a marked on the wafer W is the lower side. Among the bare chips C included in the wafer W, a bare chip (an arbitrary chip) located at a specific coordinate is set in advance as a reference bare chip Cs. The reference mark Rm is a printed mark that is marked on the reference bare chip Cs by means of laser marking or the like. The reference bare chip Cs may be provided on a mirror wafer that is not patterned during the manufacture of the wafer W. In the mirror wafer, its mirror itself becomes the reference mark Rm. In either case, the reference bare chip Cs is in a state in which the other bare chips C are recognizable in the captured image of the wafer W.

As described above, the component recognition camera 8 takes an image of the wafer W (bare chip C) before the bare chip C is picked up. The image processing unit 14 performs image processing on the image data obtained based on the imaging, and thereby the reference mark Rm is recognized on the captured image of the wafer W. Since the address of the reference bare chip Cs is known, the address of the bare chip C now mounted on the wafer W on the wafer holding stage 5 can be aligned with the wafer map WM by applying the reference bare chip Cs to the wafer map WM. Then, the control unit 12 recognizes the position of the bare chip C at the suction start point in the picking order with reference to the reference mark Rm, and causes the extracting unit 7 to sequentially perform the suction operation.

However, the reference mark Rm is sometimes abnormal. Fig. 6 (a) and 6 (B) are diagrams showing an example of a defect in the reference mark Rm. Fig. 6 (a) shows a defect of "lift-off" of the reference bare chip Cs. The bare chip C including the reference bare chip Cs is bonded to the wafer plate, but the reference bare chip Cs may be lifted from the wafer plate due to some reason. In this case, even if the reference mark Rm is normally printed on the bare-reference chip Cs, the position of the reference mark Rm recognized on the captured image of the wafer W is a recognition position that is deviated from the true position of the bare-reference chip Cs.

Fig. 6 (B) shows a failure of "print offset" of the reference mark Rm. This case is a case where the reference mark Rm is not printed in the center of the reference bare chip Cs. This defect does not occur in the case of a mirror chip, but may occur due to a target shift of laser marking or the like when the reference mark Rm is printed on the wafer W after the fact. In this case, the position of the reference mark Rm recognized on the captured image of the wafer W is a recognition position that is offset from the true position of the reference bare chip Cs.

If the degree of the "lift-off" or the "print offset" is large, that is, if the deviation between the true position of the reference bare chip Cs and the position of the reference mark Rm on the image is large, the wafer map WM and the bare chip C on the wafer W cannot be accurately aligned, and the control unit 12 may erroneously recognize the position of the bare chip C at the adsorption start point. For example, if the deviation is equal to or larger than 1/2 of the arrangement pitch of the bare chips C, the bare chips C adjacent to the reference bare chip Cs may be recognized as the reference bare chip Cs on the wafer view WM. This case is called map shift, and if map shift occurs, the picking operation of the bare chip C cannot be performed according to the wafer map WM.

[ first embodiment ]

In order to solve the above-described defects, in the present embodiment, the characteristic portion of the unique shape of the wafer W is extracted before the picking-up operation of the bare chip C. Then, a positional abnormality of the reference mark Rm is detected based on a positional relationship between the reference position derived from the characteristic portion of the shape and the reference mark Rm. When a position abnormality is detected, a warning is issued, for example, to prevent picking up in a state where there is a map shift.

The characteristic portion of the shape is not particularly limited as long as it is derived from the inherent shape of the wafer W. In the first embodiment, an example of using a shape representing the crystal axis direction of the wafer W as a characteristic portion of the above-described shape is shown. Examples of such a display shape include: a notch or an orientation flat. These are all portions that are provided on any wafer W to show a clear shape as a shape showing the crystal axis direction of the wafer W.

Fig. 7 (a) is a plan view of the wafer WL with the notch N. The notch N is a cut-out portion having an opening at the peripheral edge of the wafer WL, and the cut-out portion has a V-shape or a U-shape cut out toward the radial center of the wafer WL. The notch N is a shape indicating the crystal axis direction mainly applied to a large-diameter wafer WL having a wafer size of about 8 to 12 inches. Fig. 7 (B) is a plan view OF the wafer WS with the orientation flat OF attached. The orientation flat OF is a portion where a straight portion Wa is formed by cutting out a part OF the arc periphery OF the wafer WS. The orientation flat OF is a representative shape indicating a crystallographic axis direction mainly applied to the wafer WS having a small aperture OF 2 to 6 inches.

Fig. 8 is a functional block diagram of the main arithmetic unit 18 for realizing the processing of the first embodiment. The main arithmetic unit 18 functions to functionally include a pickup control unit 181, a rotation correction unit 182 (correction unit), an extraction processing unit 183, an abnormality detection unit 184, and an abnormality notification unit 185, based on execution of a designated program.

The pickup control section 181 controls the take-out section 7 to perform an operation of picking up the bare chip C. Specifically, the pick-up control unit 181 reads out the wafer map WM stored in the storage unit 17 in association with the identification number of the wafer W currently mounted on the wafer holding stage 5, sets the pick-up order of the bare chips C, and causes the pick-up unit 7 to execute the pick-up operation. The pick-up control unit 181 determines the bare chip C to be first picked up by the take-out unit 7, based on the reference bare chip Cs to which the reference mark Rm is attached.

The rotation correcting unit 182 performs alignment processing in the rotation direction of the wafer W mounted on the wafer holding table 5. The rotation correction unit 182 extracts a scribe line of the wafer W from the captured image of the wafer W on the wafer holding table 5 captured by the device recognition camera 8, for example, and obtains a rotation angle indicating a deviation of the scribe line from a predetermined reference line. When the offset exists, the rotation correction unit 182 performs a process of generating rotation angle correction data corresponding to the offset.

The extraction processing unit 183 acquires image data obtained by the image processing unit 14 performing image processing on the captured image of the wafer W captured by the component recognition camera 8. The extraction processing unit 183 extracts the reference mark Rm and the characteristic portion of the shape of the wafer W based on the acquired image data. In the first embodiment, the characteristic portion OF the shape is the notch N or the orientation flat OF, and these portions are specified on the image by, for example, edge extraction processing. The extraction processing unit 183 derives the reference position P from the characteristic portion of the shape.

The abnormality detection unit 184 acquires the coordinates of the reference position P and the coordinates of the reference mark Rm, which are specified from the image of the wafer W, and obtains the actual measurement positional relationship between the two. The abnormality detection unit 184 reads the coordinates of the reference position P and the coordinates of the reference mark Rm stored in advance in the storage unit 17, and acquires a set positional relationship that is a positional relationship between the two. Since the reference position P and the reference mark Rm are fixed to known positions of the wafer W, these coordinates can be stored in the storage unit 17 as set values. The abnormality detection unit 184 performs the following processing: the measured positional relationship is compared with the set positional relationship to detect whether or not the reference mark Rm is printed at a specified position, that is, whether or not there is a positional abnormality of the reference mark Rm.

When the abnormality detection unit 184 detects a positional abnormality of the reference mark Rm, the abnormality notification unit 185 displays a warning message indicating that the positional abnormality has occurred on a display (not shown) provided in the component mounting apparatus 100. The warning message may be set to be transmitted when the degree of the positional abnormality is, for example, 1/2 or more of the arrangement pitch of the bare chips C. This can prompt the user to perform the correction processing so that the operation of the component mounting apparatus 100 in a state in which the misalignment may occur does not continue. The user who recognizes the warning message, for example, makes an input teaching the address of the primarily sucked bare chip C using an input device, and starts the pick-up of the bare chip C from the wafer W.

Fig. 9 is a diagram illustrating the wafer WL having the notch N, which is a diagram for explaining the first embodiment of detecting the position abnormality of the reference mark Rm. In fig. 9, an enlarged view of the frame portion a1 including the reference mark Rm is shown on the lower side of the entire wafer WL, and an enlarged view of the frame portion a2 having the notch N formed therein is shown on the right side. As described with reference to fig. 5, the reference mark Rm is marked on the reference bare chip Cs located at a specific coordinate among the bare chips C included in the wafer W. The notch N is a U-shaped notch formed by cutting a part of the peripheral edge of the wafer WL.

After the wafer WL is carried from the wafer storage section 10 to the wafer holding table 5, the controller 12 causes the component recognition camera 8 to capture a planar image of the wafer WL. The image data obtained by this imaging is input to the image processing unit 14 of the control unit 12. The image processing unit 14 performs processing for detecting an edge portion on the image data, for example, and extracts an outline shape of the wafer WL and a pattern displayed on the wafer WL.

Next, the extraction processing unit 183 performs processing of applying a template corresponding to the notch N, for example, to the extracted outline shape data of the wafer WL, and extracts the notch N which is a characteristic portion of the shape of the wafer WL. Then, the reference position P is derived from the shape of the notch N. Specifically, the extraction processing unit 183 substitutes the outer shape data of the wafer WL into the XY coordinate system, and obtains the coordinates of the two opening edges N1, N2 facing each other of the notches defining the notch N. Then, the midpoint between the opening edges N1 and N2 is derived as a reference position P. The coordinates of the reference position P are (X0, Y0).

The extraction processing unit 183 applies a template corresponding to the shape of the reference mark Rm (a vertically long ellipse in fig. 9), for example, to the extracted pattern data of the wafer WL, and extracts the reference mark Rm. Then, the extraction processing unit 183 performs processing for determining the center of the reference mark Rm of the ellipse. The center coordinate of the reference mark Rm is set to (X1, Y1).

Fig. 10 shows the positional relationship between the reference position P and the reference mark Rm. Fig. 10 also shows a direction vector V11 from the coordinates (X0, Y0) of the reference position P to the center coordinates (X1, Y1) of the reference mark Rm. Further, fig. 10 also shows the primary adsorption bare chip C1. The primary suction bare chip C1 is a bare chip designated to be primarily sucked in the wafer map WM. The center coordinate of the bare chip C1 for the first adsorption was (X2, Y2). The position where the bare chip C1 is first adsorbed is identified with reference to the reference mark Rm. Fig. 10 also shows a direction vector V2 from the center coordinates (X1, Y1) of the reference mark Rm to the center coordinates (X2, Y2) of the first suction bare chip C1. If the coordinates of the first suction die C1 can be recognized, the pickup controller 181 can cause the take-out unit 7 to accurately execute the subsequent operation of picking up the die C because the relative positional relationship between the first suction die C1 and another die C is known.

Thereafter, the abnormality detection unit 184 acquires the coordinates (X0, Y0) of the reference position P obtained by the extraction processing unit 183 and the center coordinates (X1, Y1) of the reference mark Rm, and obtains a direction vector V11 as the actual measurement positional relationship between the two. The abnormality detection unit 184 compares the direction vector V11 with a direction vector (set positional relationship) obtained from the positional relationship between the reference position P and the reference mark Rm stored in the storage unit 17. Whether or not the reference mark Rm is printed at the specified position is determined by this comparison processing. When the vectors in both directions match or substantially match, the abnormality detection unit 184 determines that there is no positional abnormality of the reference mark Rm. In this case, the bare chip C existing at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1 with the center coordinates (X1, Y1) of the reference mark Rm as the starting point, and the pickup operation is started.

On the other hand, if the vectors in both directions are converted into the arrangement pitch of the bare chips C and there is a deviation of 1/2 or more of the pitch, the abnormality detection unit 184 determines that there is a positional abnormality of the reference mark Rm. At this time, there is a high possibility that the bare chip C1 is not first attracted and the bare chip C around it is present at the position indicated by the direction vector V2 starting from the reference mark Rm specified on the image. Therefore, the abnormality detection unit 184 does not start the picking operation, and notifies the abnormality notification unit 185 of the position abnormality of the reference mark Rm.

Fig. 11 is a diagram for explaining a modification of the first embodiment. The wafer shown in fig. 11 is a wafer WS with an orientation flat OF. The wafer WS has a straight line Wa obtained by cutting out a part of the arc periphery thereof. In the wafer WS, the characteristic portions of the shape that can be easily grasped are corner portions P11 and P12 where both ends of the straight portion Wa intersect the arc periphery of the wafer WS.

In the case of the wafer WS, the extraction processing unit 183 first specifies the positions of the corners P11 and P12 from the image data of the wafer WS, and obtains the coordinates thereof. Next, the extraction processing unit 183 derives the intermediate point between the one corner P11 and the other corner P12, that is, the intermediate point of the straight line Wa, as the reference position P. Then, the extraction processing unit 183 extracts the reference mark Rm and obtains the coordinates of the center thereof.

The subsequent processing is the same as described above. That is, the abnormality detection unit 184 obtains a direction vector V12 that is a measured positional relationship between the reference position P and the center coordinates of the reference mark Rm. The direction vector V12 is shown in fig. 11. The abnormality detection unit 184 compares the direction vector V12 with the direction vector from the reference position P stored in the storage unit 17 to the reference mark Rm, and determines whether or not the reference mark Rm is printed at the specified position. When there is no positional abnormality of the reference mark Rm, the bare chip C present at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1 with the center coordinate of the reference mark Rm as the starting point, and the pick-up operation is started. In the present modification, when the rotation of the wafer WS is corrected (described later with reference to fig. 15), the position of the corner P11 or P12 may be set as the reference position P.

[ second embodiment ]

In the second embodiment, an example is shown in which the reference position P is set without depending on the notch N or the orientation flat OF. Fig. 12 is a diagram for explaining the second embodiment of detecting positional abnormality of the reference mark Rm. As shown in fig. 12, the wafer W generally has a circular shape. In the second embodiment, the circular arc shape of the peripheral edge of the wafer is treated as a characteristic portion of the shape. Therefore, the wafer W may be any wafer having the notch N, the orientation flat OF, or another display portion indicating another crystal axis direction.

After the planar image data of the wafer W is acquired by the component recognition camera 8, the image processing unit 14 performs edge detection processing to extract the outer shape of the wafer W and the pattern displayed on the wafer WL. Next, the extraction processing unit 183 obtains the arc apex of the outer peripheral edge of the wafer W from the extracted outline data of the wafer W. Fig. 12 shows four arc vertexes P21, P22, P23, and P24 in the X direction and the Y direction.

In the second embodiment, the reference position P is the center position of the wafer W derived from the arc shape of the wafer W. That is, the extraction processing unit 183 obtains the coordinates of the center position of the circular wafer W from the coordinates of the four arc vertices P21, P22, P23, and P24. The center position is a reference position P. The number of the arc vertexes to be obtained may be three. The extraction processing unit 183 extracts the reference mark Rm and obtains the coordinates of the center thereof.

The subsequent processing is the same as in the first embodiment. That is, the abnormality detection unit 184 obtains a direction vector V13 that is the measured positional relationship between the reference position P and the center coordinates of the reference mark Rm. This direction vector V13 is shown in fig. 11. Then, the abnormality detection unit 184 compares the direction vector V13 with the direction vector from the reference position P stored in the storage unit 17 to the reference mark Rm, and determines whether or not the reference mark Rm is printed at the designated position. When there is no positional abnormality of the reference mark Rm, the bare chip C present at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1 with the center coordinate of the reference mark Rm as the starting point, and the pick-up operation is started. When there is a positional abnormality of the reference mark Rm, the abnormality notification unit 185 notifies that the position of the reference mark Rm is abnormal.

Fig. 13 is a diagram for explaining a modification of the second embodiment. In the second embodiment, when the rotation correction of the wafer WS is performed, the process of determining the center position of the wafer W can be omitted. Fig. 13 shows three circular arc vertexes P31, P32, and P33. After the rotation correction of the wafer WS, the positions of the arc vertexes P31, P32, and P33 can be set at the designated positions in the XY coordinate system. Therefore, the direction vector to the reference mark Rm may be obtained as the measured positional relationship from one coordinate of any of the arc vertices P31, P32, and P33.

Fig. 13 shows an example in which the arc apex P33 is treated as the reference position P, and the direction vector V14 that is the measured positional relationship between the reference position P and the center coordinates of the reference mark Rm is determined. The abnormality detection unit 184 compares the direction vector V14 with the direction vector from the arc apex P33 stored in the storage unit 17 to the reference mark Rm, and determines whether or not the reference mark Rm is printed at the designated position. According to the second embodiment described above, the reference position can be set without depending on the notch N, the orientation flat OF, or the like.

[ flow of component mounting ]

Next, the operation of the component mounting apparatus 100 will be described with reference to the flowchart of fig. 14. When the controller 12 is instructed by an input device (not shown) to start component mounting, the controller 12 causes the wafer W to be carried in (step S1). Specifically, the controller 12 controls the shaft controller 13 to operate the drive motor 53, and moves the wafer holding table 5 to the wafer receiving position in the vicinity of the wafer storage section 10. After the designated wafer W in the wafer storage section 10 is placed on the wafer holding table 5, the control section 12 moves the wafer holding table 5 to the component pickup operation position.

When the wafer W is moved to the component pickup operation position or reaches the component pickup operation position, the control unit 12 causes the component recognition camera 8 to capture an image of the wafer W on the wafer holding table 5 (step S2). The image data of the wafer W is input to the image processing unit 14, and is subjected to predetermined image processing. In general, the XY coordinates of the component mounting apparatus 100 do not coincide with the XY direction (scribe line) of the wafer W in a state where the wafer W is mounted on the wafer holding stage 5. That is, the X direction of the wafer W is rotated by the rotation angle θ with respect to the X axis of the component mounting apparatus 100. Therefore, the controller 12 performs a correction process of the rotation angle θ from the captured image of the wafer W to compensate for the rotational offset (step S3).

Fig. 15 is a diagram for explaining the rotation angle correction processing. The rotation correction unit 182 of the control unit 12 detects a plurality of preset inspection chips CA from the image data of the wafer W processed by the image processing unit 14. The plurality of inspection chips CA are bare chips spaced apart by a designated pitch L1 along one cutting line and arranged within a range of a designated inspection distance L2. Therefore, by identifying a plurality of the inspection chips CA on the image, the direction of the cutting line can be identified.

The rotation correction unit 182 obtains the inclination of the recognized scribe line with respect to the X axis of the component mounting apparatus 100, and obtains the rotation angle θ. The rotation correction unit 182 replaces the rotation angle θ with rotation angle correction data and stores the same in the storage unit 17. The reference position P is corrected to be present at the specified position by the processing of the rotation correcting unit 182. Further, the wafer holding table 5 may be actually rotated by the rotation angle θ to cancel the rotational offset. In addition, the rotational angle θ may be detected by directly detecting the scribe lines without extracting the inspection chip CA from the image data of the wafer W. Alternatively, the rotation angle θ may be detected by identifying two unique bare chips C defined in advance.

Next, the extraction processing unit 183 of the control unit 12 performs the process of extracting the feature of the shape of the wafer W described in the first or second embodiment (step S4). Then, the extraction processing unit 183 determines the reference position P from the characteristics of the obtained shape, and derives the coordinates of the reference position P (step S5). The extraction processing unit 183 also recognizes the position on the image of the reference mark Rm and specifies the coordinates of the reference mark Rm (step S6). The coordinates of the reference position P and the coordinates of the reference mark Rm acquired in steps S5 and S6 are given to the abnormality detection unit 184 as position data of the actual measurement positional relationship.

Thereafter, the abnormality detection unit 184 reads the coordinates of the reference position P and the coordinates of the reference mark Rm stored in the storage unit 17, and acquires a set positional relationship that is a positional relationship between the two. Then, the abnormality detection unit 184 performs a process of comparing the set positional relationship with the actually measured positional relationship previously given (step S7).

Based on the comparison result at step S7, the abnormality detection section 184 determines whether or not the reference mark Rm is printed at the designated position, that is, whether or not there is a positional abnormality of the reference mark Rm (step S8). When a positional abnormality of the reference mark Rm is detected, for example, when the coordinates of the reference mark Rm in the measured positional relationship are compared with the coordinates of the reference mark Rm in the set positional relationship and there is a deviation of not less than 1/2 in the arrangement pitch of the bare chips C (yes in step S8), the abnormality notification unit 185 notifies that a positional abnormality has occurred (step S9).

On the other hand, when the position abnormality of the reference mark Rm is not detected (no in step S8), the mounting operation of the bare chip C on the printed circuit board 20 is continued. That is, the pickup controller 181 reads the wafer map WM from the memory unit 17, sets the pickup order (step S10), and causes the pickup unit 7 to execute the operation of picking up the bare chips C (step S11). Specifically, the pickup control unit 181 controls the spindle control unit 13 to operate the push-up head drive motor 63, and causes the push-up head 61 to perform an operation of pushing up the designated bare chip C. Then, the wafer head lifting motor 7i is operated, the take-out unit 7 (wafer heads 7a to 7d) is operated to suck the bare chip C pushed up by the push-up unit 6, and the wafer head turning motor 7h is operated to turn over the bare chip C sucked on the wafer heads 7a to 7 d.

Thereafter, the bare chip C is sucked from the die heads 7a to 7d to the

element mounting heads

411, 412 at the designated delivery positions. In a state of being attracted by the

component mounting heads

411 and 412, the mounting portion 4 is moved to above a flux supplying device (not shown) and flux is applied to the bump forming surface of the bare chip C (step S12). Next, the mounting portion 4 is moved so as to fix the space above the camera 9, the bump forming surface of the bare chip C is photographed, and the failure determination of the bump forming surface and the recognition of the suction position deviation are performed (step S13). After the image pickup, the mounting unit 4 moves to the space above the printed circuit board 20 held by the conveyor 2, and mounts the sucked bare chip C to a predetermined position on the printed circuit board 20 (step S14).

According to the component mounting apparatus 100 (wafer pickup apparatus D) according to the present embodiment described above, even if the position of the reference mark Rm is shifted, the position where the bare chip C1 (wafer) is first sucked can be accurately specified. Therefore, it is possible to provide the component mounting apparatus 100 as follows: regardless of the occurrence or non-occurrence of the positional deviation of the reference mark Rm, the bare chips C can be accurately taken out from the wafer W by the picking-up sequence along the wafer map WM.

The above embodiments mainly include the inventions described below.

According to the chip pickup apparatus, the characteristic portion of the shape of the wafer is extracted by the extraction processing section. The characteristic part of the shape is an inherent shape derived from the shape possessed by the wafer, any wafer possesses. Of course, the reference position derived from the characteristic portion of the shape can be grasped in advance and is unchanged. Therefore, by storing in advance in the storage unit the set positional relationship between the reference position and the position to which the mark indicating the reference position should be attached, it is possible to specify the set position where the mark should be present on the wafer. Therefore, by comparing the measured positional relationship of the mark determined from the image of the wafer with the set positional relationship, it is possible to detect the positional abnormality of the mark.

In the above chip pickup apparatus, preferably, the characteristic portion of the shape is a notch indicating a crystal axis direction of the wafer. Or the characteristic part of the shape is an orientation plane representing a crystallographic axis direction of the wafer.

The notch or the orientation flat is a portion having a shape clearly shown on any wafer as a portion indicating a crystal axis direction of the wafer. Therefore, it is desirable to treat them as characteristic parts of the shape. The reference position may be, for example, a center position of the notch derived from a shape of the notch or a center position of the linear portion derived from both end positions of the linear portion of the orientation plane.

In the above chip pickup apparatus, it is preferable that the wafer has a circular shape, and the characteristic portion of the circular shape is an arc shape of a peripheral edge of the wafer. In this case, the reference position may be a center position of the wafer derived from the circular arc shape.

The circular arc shape of the peripheral edge of the wafer can be obtained by determining the apex of the circular arc, for example, to obtain a characteristic portion of the shape. Further, by identifying the arc and determining a plurality of points on the arc, the center of the circular wafer can be determined. Therefore, according to the above wafer pickup apparatus, the reference position can be set without depending on a notch, an orientation flat, or the like.

Preferably, the wafer pickup apparatus further includes: a holding table on which the wafer is mounted; and a correction unit configured to determine a rotation angle indicating a deviation of the wafer mounted on the holding table from a predetermined reference line, and to perform processing for generating rotation angle correction data when the deviation exists; wherein the reference position is corrected by the processing of the correcting section.

Generally, when a wafer is mounted on the holding table, the mounting is not performed with strict positioning. Therefore, almost all the coordinates of the characteristic portion of the shape are different from the predetermined coordinates on the captured image of the wafer mounted on the holding stage. Therefore, by correcting the reference position using the rotational angle correction data to match the characteristic portion of the shape with the predetermined coordinate position, it is possible to surely perform processing for detecting a positional abnormality of the mark thereafter.

Preferably, the wafer pickup apparatus further includes: a head picking up the wafer; and a pickup control section that controls an action of the head section; wherein the storage unit further stores a wafer map indicating respective evaluations of chips included in the wafer, and the pickup control unit determines a chip to be first picked up by the head unit with reference to the chip to which the mark is attached.

According to the wafer picking device, the head can carry out accurate wafer picking according to the wafer map.

As described above, according to the present invention, even if the position of the reference mark is shifted, the position of the wafer can be accurately specified. Therefore, it is possible to provide a wafer pickup apparatus capable of accurately taking out a target wafer.

Claims

1. A wafer pickup apparatus, comprising:

an imaging device that captures an image of a wafer that is cut into a plurality of chips and to which a mark indicating a reference position is attached to an arbitrary chip;

a storage unit that stores in advance a set positional relationship between a known reference position on the wafer and the mark of the wafer;

an extraction processing unit that performs image processing on the captured image of the wafer, extracts the mark and a feature of a shape of the wafer, and derives the reference position from the feature of the shape; and

and an abnormality detection unit that detects a positional abnormality of the mark by comparing an actual measurement positional relationship between the reference position and the mark determined from the image of the wafer with the set positional relationship stored in the storage unit.

2. The wafer pickup apparatus as set forth in claim 1, wherein:

the feature of the shape is a notch indicating a crystallographic axis direction of the wafer.

3. The wafer pickup apparatus as set forth in claim 1, wherein:

the characteristic portion of the shape is an orientation flat representing a crystallographic axis direction of the wafer.

4. The wafer pickup apparatus as set forth in claim 1, wherein:

the wafer has a shape of a circle,

the feature of the shape is an arc of the periphery of the wafer.

5. The wafer pickup device as set forth in claim 4, wherein:

the reference position is a center position of the wafer derived from the arc shape.

6. The wafer pickup apparatus as recited in any one of claims 1 to 5, further comprising:

a holding table on which the wafer is mounted; and

a correction unit configured to obtain a rotation angle indicating a deviation of the wafer mounted on the holding table from a predetermined reference line, and to perform processing for generating rotation angle correction data when the deviation exists; wherein,

the reference position is corrected by the processing of the correcting section.

7. The wafer pickup apparatus as recited in any one of claims 1 to 5, further comprising:

a head picking up the wafer; and

a pickup control unit for controlling the operation of the head; wherein,

the storage unit further stores a wafer map showing evaluation of each of the chips included in the wafer,

the pick-up control unit determines a wafer to be first picked up by the head unit, based on the wafer to which the mark is applied.