CN108200363B - Noise reduction method, noise reduction device and optical detection system - Google Patents

Noise reduction method, noise reduction device and optical detection system Download PDF

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Publication number
CN108200363B
CN108200363B CN201810001549.0A CN201810001549A CN108200363B CN 108200363 B CN108200363 B CN 108200363B CN 201810001549 A CN201810001549 A CN 201810001549A CN 108200363 B CN108200363 B CN 108200363B
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reset
voltage
gating
unit
state
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CN108200363A (en
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郑智仁
刘伟
丁小梁
王鹏鹏
韩艳玲
曹学友
张平
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BOE Technology Group Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/617—Noise processing, e.g. detecting, correcting, reducing or removing noise for reducing electromagnetic interference, e.g. clocking noise

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Abstract

The invention provides a noise reduction method, a noise reduction device and an optical detection system. The noise reduction method comprises setting gating off-state voltage by a setting unit; the setting unit sets a test gate on-state voltage; the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test-use gating on-state voltages; the selection unit selects one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage; the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit. The noise reduction method, the noise reduction device and the optical detection system can select the better on-state voltage and off-state voltage of the clock control signal so as to achieve the result of optimizing the signal-to-noise ratio of the optical detection output.

Description

Noise reduction method, noise reduction device and optical detection system
Technical Field
The present invention relates to the field of optical detection technologies, and in particular, to a noise reduction method, a noise reduction apparatus, and an optical detection system.
Background
The existing APS (Active Pixel sensor) circuit can effectively block the influence of other circuits or pixels on the APS circuit, wherein a switching device which needs a clock control signal to reset and gate is used, and due to insufficient process mobility, a relatively large on-state voltage needs to be used for starting the switching device, and a voltage difference value between a relatively large on-state voltage and an off-state of the clock control signal influences the result of light detection output and increases extra noise. When the clock control signal turns on or off the corresponding switching device, an extra signal is caused to be transmitted to the output voltage of the light detection circuit, the voltage difference between the on-state voltage and the off-state of the clock control signal and the output noise are not regular, and the noise cannot be eliminated by other methods due to the limitation of the number of devices of the screen integrated APS circuit.
Disclosure of Invention
The invention mainly aims to provide a noise reduction method, a noise reduction device and a light detection system, which solve the problem that the existing light detection circuit generates noise due to a clock control signal.
In order to achieve the above object, the present invention provides a noise reduction method applied to an optical detection circuit, wherein the optical detection circuit comprises a gating unit, a first node of which is connected to an output node, and a second node of which is connected to a following node; the photo detection circuit comprises a photo detection unit for amplifying the voltage of the output node and detecting the amplified voltage of the output node; the noise reduction method comprises the following steps:
the setting unit sets a gate off-state voltage Vg1 so that the gate unit controls to disconnect the output node from the following node when the potential of a gate control signal on the gate control terminal is the gate off-state voltage Vg 1;
the setting unit sets a test gate on-state voltage, so that when the potential of the gate control signal is the test gate on-state voltage, the gate unit controls a gate transistor included in the gate unit to be completely opened; the number of the test gating on-state voltages is at least two;
the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test-use gating on-state voltages;
the selection unit selects one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
In implementation, the setting unit sets a test gate on-state voltage, so that when the potential of the gate control signal is the test gate on-state voltage, the step of controlling the gate transistor included in the gate unit to be completely turned on specifically comprises at least two test gate on-state voltage setting steps;
the step of setting the test strobe on-state voltage comprises:
an initial gating setting step: the setting unit sets an initial gating on-state voltage and a first cycle number; the starting gate clock voltage difference V0 is equal to the voltage difference between the starting gate on-state voltage and the gate off-state voltage Vg 1; the first cycle number is an integer greater than 1;
a gating setting step: the setting unit sets the difference of the gated clock voltage to 0.5V0, and the gated on-state voltage is equal to 0.5V0+ Vg 1; the first counting unit sets a first counting value as 1;
a gating result obtaining step: the setting unit obtains a judgment result of whether the gating unit can control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
a gating clock voltage difference setting step: when the judgment result is that the gating unit controls the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.25V 0; when the judging result is that the gating unit cannot control the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.75V 0; the first counting unit controls the first counting value to be added by 1;
a strobe flow step: when the first counting value is not equal to the first cycle number, switching to the gating result obtaining step;
a step of setting the on-state voltage for testing: when the first count value is equal to the first cycle number, the setting unit sets the sum of the current gate clock voltage difference and the gate off-state voltage Vg1 as the test gate on-state voltage.
In practice, the gating result obtaining step includes:
the setting unit calculates a voltage difference between the output voltage detected by the photoelectric detection unit and a first initial output voltage when a voltage difference between the potential of the gate control signal and the gate off-state voltage Vg1 is the gate clock voltage difference; the first initial output voltage is an output voltage detected by the photoelectric detection unit when the electric potential of the gating control signal is an initial gating on-state voltage;
when the voltage difference value is within a first preset voltage difference value range, the setting unit obtains a judgment result that when the electric potential of the gating control signal is the gating on-state voltage for the test, the gating unit controls the gating transistor included in the gating unit to be completely opened;
when the voltage difference is not within a first preset voltage difference range, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test.
In implementation, the photoelectric detection unit comprises an operational amplification module and an output detection module; the input end of the operational amplification module is connected with the output node, and the output end of the operational amplification module is connected with the output detection module; the output detection module is used for detecting the output voltage output by the output end; the gating result obtaining step further includes:
the setting unit determines whether the voltage input to the output node of the operational amplification module is less than the minimum input voltage of the operational amplification module according to the output voltage detected by the photoelectric detection unit when the voltage difference between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
when the setting unit judges that the voltage input to the output node of the operational amplification module is smaller than the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened;
when the setting unit judges that the voltage input to the output node of the operational amplification module is greater than or equal to the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit controls the gating transistor included in the gating unit to be completely opened.
In implementation, the control end of a reset unit included in the light detection circuit is connected with the reset control end, the first end of the reset unit is connected with the reset voltage end, and the second end of the reset unit is connected with the photoelectric node; the noise reduction method further includes, after the step of selecting, by the selection unit, one of the test-use gate on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection-use gate on-state voltage:
the setting unit sets a reset off-state voltage Vg2, so that when the potential of a reset control signal on the reset control terminal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photoelectric node;
the setting unit sets a reset on-state voltage for testing, so that when the potential of the reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit selects one of the test reset on-state voltages corresponding to the highest signal-to-noise ratio as a light detection reset on-state voltage;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
In implementation, the setting unit sets a test reset on-state voltage, so that when the potential of the reset control signal is the test reset on-state voltage, the step of controlling the reset transistor included in the reset unit to be completely turned on by the reset unit specifically includes at least two test reset on-state voltage setting steps;
a reset on voltage setting step for the test includes:
an initial reset setting step: the setting unit sets an initial reset on-state voltage and a second cycle number; a starting reset clock voltage difference V1 is equal to a voltage difference between the starting reset on-state voltage and the reset off-state voltage Vg 2; the second cycle number is an integer greater than 1;
resetting the setting step: the set cell sets a reset clock voltage difference to 0.5V1, when the reset on-state voltage is equal to 0.5V1+ Vg 2; the second counting unit sets a second counting value as 1;
a reset result obtaining step: the setting unit obtains a judgment result whether the reset unit can control the reset transistor included in the reset unit to be completely turned on or not when the potential of the reset control signal is the reset on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference;
resetting the clock voltage difference setting step: when the judgment result is that the reset unit controls the reset transistor included in the reset unit to be completely opened, the setting unit sets the reset clock voltage difference to be 0.25V 1; when the judgment result is that the reset unit cannot control the reset transistor included in the reset unit to be completely turned on, the setting unit sets the reset clock voltage difference to 0.75V 1; the second counting unit controls the second counting value to be increased by 1;
resetting circulation steps: when the second counting value is not equal to the second cycle number, switching to the reset result obtaining step;
reset on-state voltage setting step for test: when the second count value is equal to the second cycle number, the setting unit sets a sum of a current reset clock voltage difference and the reset off-state voltage Vg2 as the test reset on-state voltage.
In practice, the reset result obtaining step includes:
the setting unit calculates a voltage difference between an output voltage detected by the photoelectric detection unit and a second initial output voltage when a voltage difference between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference; the second initial output voltage is an output voltage detected by the photoelectric detection unit when the potential of the reset control signal is an initial reset on-state voltage;
when the voltage difference value is within a second preset voltage difference value range, the setting unit obtains a judgment result that when the potential of the reset control signal is the reset on-state voltage for the test, the reset unit controls the reset transistor included in the reset unit to be completely opened;
when the voltage difference is not within a second predetermined voltage difference range, the setting unit obtains a judgment result that the reset unit cannot control the reset transistor included in the reset unit to be completely opened when the potential of the reset control signal is the reset on-state voltage for the test.
The invention also provides a noise reduction device which is applied to the optical detection circuit, wherein the optical detection circuit comprises a gating unit, a first node and a following node, wherein the control end of the gating unit is connected with the gating control end; the photo detection circuit comprises a photo detection unit for amplifying the voltage of the output node and detecting the amplified voltage of the output node; the noise reduction device comprises a setting unit, a signal-to-noise ratio detection unit and a selection unit;
the setting unit is used for setting a gate off-state voltage Vg1, so that when the potential of the gate control signal is the gate off-state voltage Vg1, the gate unit controls to disconnect the output node and the following node; the setting unit is further used for setting a test gating on-state voltage, so that when the potential of the gating control signal is the test gating on-state voltage, the gating unit controls the gating transistor included in the gating unit to be completely opened; the number of the test gating on-state voltages is at least two;
the signal-to-noise ratio detection unit is used for detecting the signal-to-noise ratios of the output voltages respectively corresponding to the at least two testing gating on-state voltages;
the selection unit is used for selecting one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
In practice, the setting unit is further configured to set a reset off-state voltage Vg2, so that when the potential of the control signal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photo node; the setting unit is further used for setting a reset on-state voltage for testing, so that when the potential of the reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit is further used for detecting signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit is further configured to select a reset on-state voltage for test corresponding to the highest signal-to-noise ratio as a reset on-state voltage for photodetection;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
The invention also provides an optical detection system which comprises the noise reduction device.
Compared with the prior art, the noise reduction method, the noise reduction device and the optical detection system can select the better on-state voltage and off-state voltage of the clock control signal so as to achieve the result of optimizing the signal-to-noise ratio of the optical detection output.
Drawings
FIG. 1 is a block diagram of one embodiment of a light detection circuit to which the noise reduction method of the present invention is applied;
FIG. 2 is a flow chart of a noise reduction method according to an embodiment of the present invention;
FIG. 3 is a flowchart of an embodiment of a test strobe on-voltage setting step included in the noise reduction method of the present invention;
FIG. 4 is a block diagram of another embodiment of a light detection circuit to which the noise reduction method of the present invention is applied;
FIG. 5 is a flowchart of an embodiment of a test reset on-voltage setting step included in the noise reduction method of the present invention;
FIG. 6 is a circuit diagram of an embodiment of a light detection system according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The noise reduction method according to the embodiment of the present invention is applied to a light detection circuit, as shown in fig. 1, the light detection circuit includes a photoelectric conversion unit 11, a reset unit 12, a voltage following unit 13, a gating unit 14, and a photoelectric detection unit 15; the control end of the gating unit 14 is connected with a gating control end SEL, the first end of the gating unit 14 is connected with an output node A, and the second end of the gating unit 14 is connected with a following node B; the photoelectric detection unit 15 is connected to the output node a, and is configured to amplify the voltage of the output node a and detect the amplified voltage of the output node a; in a photoelectric detection time period included in a detection period, the potential of a gating control signal on the gating control end SEL is gating on-state voltage; in a time period except the photoelectric detection time period included in a detection period, the potential of the gating control signal is gating off-state voltage; as shown in fig. 2, the noise reduction method includes:
s1: the setting unit sets a gate off-state voltage Vg1 so that the gate unit controls to disconnect the output node from the following node when the potential of the gate control signal is the gate off-state voltage Vg 1;
s2: the setting unit sets a test gate on-state voltage, so that when the potential of the gate control signal is the test gate on-state voltage, the gate unit controls a gate transistor included in the gate unit to be completely opened; the number of the test gating on-state voltages is at least two;
s3: the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test-use gating on-state voltages;
s4: the selection unit selects one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
In actual operation, since the selection of the gate on-state voltage of the gate control signal corresponding to the gate control signal at the gate control terminal SEL may affect the voltage detected by the photodetection unit 15, the test gate on-state voltage corresponding to the highest signal-to-noise ratio is selected as the light detection gate on-state voltage, and then the light detection reset on-state voltage is selected.
The gating on-state voltage for light detection is the potential of the gating control signal in the photoelectric detection time period when the light signal is actually detected by the light detection circuit.
In specific implementation, when the potential of the gate control signal is the gate off-state voltage Vg1, the gate unit controls to disconnect the output node from the following node, and the value of Vg1 is selected according to the type and model of the gate transistor included in the gate unit. For example, when the gate transistor included in the gate unit 14 is an n-type transistor, the gate off-state voltage Vg1 may be 0V, but not limited thereto, and Vg1 may be set to any voltage value that can turn off the gate transistor.
The noise reduction method applied to the optical detection circuit in the embodiment of the invention firstly sets the gate off-state voltage Vg1 through the setting unit, and then sets at least two gate on-state voltages for testing through the setting unit: the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to at least two of the test-use gate-on voltages, the selection unit selects one of the test-use gate-on voltages corresponding to the highest signal-to-noise ratio as a light-detection-use gate-on voltage, when the light detection circuit actually works, the potential of the gate control signal can be set to the light-detection-use gate-on voltage in a photoelectric detection time period included in a detection period, and at the moment, the signal-to-noise ratio of the output voltage detected by the photoelectric detection unit included in the light detection circuit is high, so that the result of signal-to-noise ratio optimization can be achieved by using the result.
In the embodiment of the photodetection circuit shown in fig. 1, the photoelectric conversion unit 11 may include a photodiode, a cathode of which is connected to the photoelectric node FD, and an anode of which is connected to the photoelectric voltage terminal; the value of the photoelectric voltage output by the photoelectric voltage end can be selected according to actual conditions, and only the photodiode needs to be ensured to be in a reverse bias state and can convert an optical signal into a corresponding electric signal.
As shown in fig. 1, the control terminal of the reset unit 12 is connected to a reset control terminal RST, the first terminal of the reset unit 12 is connected to a reset voltage terminal of the input reset voltage VRST, and the second terminal of the reset unit is connected to the photoelectric node FD;
the voltage following unit 13 is connected to the photoelectric node FD and the following node B;
in actual operation, in the embodiment of the photodetection circuit shown in fig. 1, the voltage follower unit 13 may include a voltage follower transistor whose gate is connected to the photoelectric node FD, whose first pole is connected to a high-level input terminal to which a high level is input, and whose second pole is connected to the follower node B.
In a specific implementation, the light detection circuit shown in fig. 1 may further include a current detection unit 16, a first terminal of the current detection unit 16 is connected to the output node a, and a second terminal of the current detection unit 16 is connected to a low level input terminal to which the low level VSS is input.
In practice, a binary approach may be used to select each test gate on voltage, the specific selection process being described in detail below.
Specifically, the setting unit sets a test gate on-state voltage, so that when the potential of the gate control signal is the test gate on-state voltage, the step of controlling the gate transistor included in the gate unit to be fully turned on by the gate unit may specifically include at least two test gate on-state voltage setting steps; setting one test gate on-state voltage through one test gate on-state voltage setting step, so that at least two test gate on-state voltages can be set in total;
the step of setting the test strobe on-state voltage comprises:
an initial gating setting step: the setting unit sets an initial gating on-state voltage and a first cycle number; the starting gate clock voltage difference V0 is equal to the voltage difference between the starting gate on-state voltage and the gate off-state voltage Vg 1; the first cycle number is an integer greater than 1;
a gating setting step: the setting unit sets the difference of the gated clock voltage to 0.5V0, and the gated on-state voltage is equal to 0.5V0+ Vg 1; the first counting unit sets a first counting value as 1;
a gating result obtaining step: the setting unit obtains a judgment result of whether the gating unit can control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
a gating clock voltage difference setting step: when the judgment result is that the gating unit controls the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.25V 0; when the judging result is that the gating unit cannot control the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.75V 0; the first counting unit controls the first counting value to be added by 1;
a strobe flow step: when the first counting value is not equal to the first cycle number, switching to the gating result obtaining step;
a step of setting the on-state voltage for testing: when the first count value is equal to the first cycle number, the setting unit sets the sum of the current gate clock voltage difference and the gate off-state voltage Vg1 as the test gate on-state voltage.
The noise reduction method provided by the embodiment of the invention adopts a dichotomy to select the testing gating on-state voltage, and can automatically and quickly obtain the corresponding testing gating on-state voltage according to the first cycle number and the initial gating on-state voltage.
In actual operation, the first cycle number is a dichotomy cycle number for selecting a testing gating on-state voltage through dichotomy; in a specific embodiment, the number of the first cycles may be selected according to an actual situation, and the initial gate on-state voltage may also be selected according to an actual situation.
The step of setting the gate on-state voltage for testing is described below with a specific embodiment, in which the gate transistor included in the gate unit is an n-type transistor, and the gate off-state voltage Vg1 is 0V;
as shown in fig. 3, the step of setting the on-state voltage of the test gate includes:
s31: the setting unit sets the initial gating on-state voltage to be 20V and sets the first cycle number to be equal to 6; the starting gate clock voltage difference V0 is equal to the voltage difference between the starting gate on-state voltage and the gate off-state voltage Vg1, i.e., in this embodiment, V0 is equal to 20V;
s32: the setting unit sets the difference of the gated clock voltage to 0.5V0, and the gated on-state voltage is equal to 0.5V0+ Vg 1; the first counting unit sets a first counting value as 1;
s33: the setting unit judges whether the gating unit can control the gating transistor included in the gating unit to be completely opened or not when the potential of the gating control signal is the testing gating on-state voltage according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference, if so, the setting unit turns to S34, and otherwise, the setting unit turns to S35;
s34: the setting unit sets the gated clock voltage difference to 0.25V0, the first counting unit controls the first counting value to be added by 1, and the operation goes to S36;
s35: the setting unit sets the gated clock voltage difference to 0.75V 0; the first counting unit controls the first counting value to be added by 1;
s36: the setting unit judges whether the first count value is equal to the first cycle number, if so, the step goes to S37, otherwise, the step goes to S33;
s37: the setting unit sets the sum of the current gate clock voltage difference and the gate off-state voltage Vg1 as the test gate on-state voltage.
In a specific implementation, the step of obtaining the gating result may include:
the setting unit calculates a voltage difference between the output voltage detected by the photoelectric detection unit and a first initial output voltage when a voltage difference between the potential of the gate control signal and the gate off-state voltage Vg1 is the gate clock voltage difference; the first initial output voltage is an output voltage detected by the photoelectric detection unit when the electric potential of the gating control signal is an initial gating on-state voltage;
when the voltage difference value is within a first preset voltage difference value range, the setting unit obtains a judgment result that when the electric potential of the gating control signal is the gating on-state voltage for the test, the gating unit controls the gating transistor included in the gating unit to be completely opened;
when the voltage difference is not within a first preset voltage difference range, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test.
In actual operation, if the on-state of the gating transistor included in the gating unit is incomplete due to a relatively small test gating on-state voltage, and the gating transistor cannot be completely turned on, a problem may occur that the electrical signal converted by the photoelectric conversion unit 11 cannot be completely transmitted to the photoelectric detection unit 15, so that the output voltage detected by the photoelectric detection unit 15 is smaller than a normal output voltage, and therefore, a determination result of whether the gating unit can control the gating transistor included in the gating unit to be completely turned on when the potential of the gating control signal is the test gating on-state voltage may be obtained according to whether a voltage difference between the output voltage detected by the photoelectric detection unit and the first start output voltage is within a first predetermined voltage difference range.
In practical operation, the first predetermined voltage difference range may be selected according to practical situations.
Specifically, as shown in fig. 4, the photodetection unit 15 may include an operational amplifier module Amp and an output detection module 150; the input end of the operational amplification module Amp is connected with the output node a, and the output end of the operational amplification module Amp is connected with the output detection module 150; the operational amplification module Amp is used for amplifying the voltage of the output node A to obtain an output voltage Vout, and outputting the Vout through the output end; the output detection module 150 is configured to detect an output voltage Vout output by the output terminal of the operational amplification module Amp;
the gating result obtaining step further includes:
the setting unit determines whether the voltage input to the output node of the operational amplification module is less than the minimum input voltage of the operational amplification module according to the output voltage detected by the photoelectric detection unit when the voltage difference between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
when the setting unit judges that the voltage input to the output node of the operational amplification module is smaller than the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened;
when the setting unit judges that the voltage input to the output node of the operational amplification module is greater than or equal to the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit controls the gating transistor included in the gating unit to be completely opened.
In actual operation, the operational amplification module may be an operational amplifier, and when an input voltage connected to an input end of the operational amplification module is greater than a minimum input voltage, the operational amplification module may not normally amplify the input voltage, and in specific implementation, when an on state of a gating transistor included in a gating unit is incomplete due to a small gating on state voltage ratio for testing, the gating transistor may not be completely turned on, and a voltage of an output node is too small and exceeds a working interval of the operational amplification module, so that an output voltage detected by the photodetection unit 15 is too small or too large (when the voltage of the output node is less than the minimum input voltage, a voltage output by an output end of the operational amplification module by the operational amplification module is determined according to a specific model of the operational amplification module).
In actual operation, the value of the minimum input voltage is selected according to the specific model of the operational amplification module.
In specific implementation, if the multiplexing on-state voltage for light detection is set to be small, the on state of the reset transistor included in the reset unit is incomplete, and the charging and discharging time is insufficient, so that the reset or follow-up conversion output is incomplete, and the output voltage output by the photodetection unit 15 may be affected. Therefore, in the noise reduction method according to the embodiment of the present invention, after the gate on-state voltage for light detection is selected, the multiplexing on-state voltage for light detection needs to be further limited.
Specifically, a control terminal of the reset unit is connected to a reset control terminal, a first terminal of the reset unit is connected to a reset voltage terminal, and a second terminal of the reset unit is connected to the photoelectric node;
the noise reduction method further includes, after the step of selecting, by the selection unit, one of the test-use gate on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection-use gate on-state voltage:
the setting unit sets a reset off-state voltage Vg2, so that when the potential of a reset control signal on the reset control terminal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photoelectric node;
the setting unit sets a reset on-state voltage for testing, so that when the potential of the reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit selects one of the test reset on-state voltages corresponding to the highest signal-to-noise ratio as a light detection reset on-state voltage;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
In specific implementation, when the potential of the reset control signal at the reset control terminal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photoelectric node, and the value of Vg2 is selected according to the type and model of the reset transistor included in the reset unit. For example, when the reset transistor included in the reset unit is an n-type transistor, the reset off-state voltage Vg2 may be 0V, but not limited thereto, and Vg2 may be set to any voltage value capable of turning off the reset transistor.
In actual operation, since the potential of the FD is already pulled up to the reset voltage V at the time of resetRSTThen the Vg2 can achieve the off-state effect if not too low; for example, when VRSTAt 10V, Vg2 only needs to be equal to 0V to have an effect of-10V, so the number of second cycles can be reduced moderately.
The noise reduction method applied to the optical detection circuit in the embodiment of the invention firstly sets the reset off-state voltage Vg2 through the setting unit, and then sets at least two reset on-state voltages for testing through the setting unit: the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to at least two of the test reset on-state voltages, the selection unit selects one of the test reset on-state voltages corresponding to the highest signal-to-noise ratio as a light detection reset on-state voltage, when the light detection circuit actually works, the potential of the reset control signal can be set to the light detection reset on-state voltage in a reset time period included in a detection period, and at the moment, the signal-to-noise ratio of the output voltage detected by the photoelectric detection unit included in the light detection circuit is large, so that a result of optimizing the signal-to-noise ratio can be achieved by using a noise detection result.
In practice, a binary approach may be used to select the test reset on-state voltage, and the specific selection process will be described in detail below.
Specifically, the setting unit sets a test reset on-state voltage, so that when the potential of the reset control signal is the test reset on-state voltage, the step of the reset unit controlling the included reset transistor to be completely turned on specifically includes at least two test reset on-state voltage setting steps; setting one of the test reset on-state voltages by one of the test reset on-state voltage setting steps, so that at least two of the test reset on-state voltages can be set in total;
a reset on voltage setting step for the test includes:
an initial reset setting step: the setting unit sets an initial reset on-state voltage and a second cycle number; a starting reset clock voltage difference V1 is equal to a voltage difference between the starting reset on-state voltage and the reset off-state voltage Vg 2; the second cycle number is an integer greater than 1;
resetting the setting step: the set cell sets a reset clock voltage difference to 0.5V1, when the reset on-state voltage is equal to 0.5V1+ Vg 2; the second counting unit sets a second counting value as 1;
a reset result obtaining step: the setting unit obtains a judgment result whether the reset unit can control the reset transistor included in the reset unit to be completely turned on or not when the potential of the reset control signal is the reset on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference;
resetting the clock voltage difference setting step: when the judgment result is that the reset unit controls the reset transistor included in the reset unit to be completely opened, the setting unit sets the reset clock voltage difference to be 0.25V 1; when the judgment result is that the reset unit cannot control the reset transistor included in the reset unit to be completely turned on, the setting unit sets the reset clock voltage difference to 0.75V 1; the second counting unit controls the second counting value to be increased by 1;
resetting circulation steps: when the second counting value is not equal to the second cycle number, turning to the reset result obtaining step;
reset on-state voltage setting step for test: when the second count value is equal to the second cycle number, the setting unit sets a sum of a current reset clock voltage difference and the reset off-state voltage Vg2 as the test reset on-state voltage.
The noise reduction method provided by the embodiment of the invention adopts the dichotomy to select the reset on-state voltage for the test, and can automatically and quickly obtain the corresponding reset on-state voltage for the test according to the first cycle number and the initial reset on-state voltage.
In actual operation, the first cycle number is a dichotomy cycle number of selecting a reset on-state voltage for test through dichotomy; in a specific embodiment, the number of the first cycles may be selected according to an actual situation, and the initial reset on-state voltage may also be selected according to an actual situation.
The step of setting the reset on-state voltage for test will be described with reference to an embodiment in which the reset transistor included in the reset unit is an n-type transistor, and the reset off-state voltage Vg2 is 0V;
as shown in fig. 5, a step of setting the reset on-state voltage for test may include:
s51: the setting unit sets the initial reset on-state voltage to be 25V, and the setting unit sets the second cycle number to be equal to 4; a starting reset clock voltage difference V1 is equal to a voltage difference between the starting reset on-state voltage and the reset off-state voltage Vg 2; that is, in the present embodiment, V1 is equal to 25V;
s52: the set cell sets a reset clock voltage difference to 0.5V1, when the reset on-state voltage is equal to 0.5V1+ Vg 2; the second counting unit sets a second counting value as 1;
s53: the setting unit judges whether the reset unit can control a reset transistor included in the reset unit to be completely turned on or not when the potential of the reset control signal is the test reset on-state voltage according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference, if so, the setting unit turns to S54, and otherwise, the setting unit turns to S55;
s54: the setting unit sets the reset clock voltage difference to 0.25V1, the second counting unit controls the second counting value to be added by 1, and the operation goes to S56;
s55: the setting unit sets the reset clock voltage difference to 0.75V 0; the second counting unit controls the second counting value to be increased by 1;
s56: judging whether the second count value is equal to the second cycle number, if so, turning to S57, otherwise, turning to S53;
s57: the setting unit sets the sum of the current reset clock voltage difference and the reset off-state voltage Vg2 as the test reset on-state voltage.
In a specific implementation, the step of obtaining the reset result may include:
the setting unit calculates a voltage difference between an output voltage detected by the photoelectric detection unit and a second initial output voltage when a voltage difference between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference; the second initial output voltage is an output voltage detected by the photoelectric detection unit when the potential of the reset control signal is an initial reset on-state voltage;
when the voltage difference value is within a second preset voltage difference value range, the setting unit obtains a judgment result that when the potential of the reset control signal is the reset on-state voltage for the test, the reset unit controls the reset transistor included in the reset unit to be completely opened;
when the voltage difference is not within a second predetermined voltage difference range, the setting unit obtains a judgment result that the reset unit cannot control the reset transistor included in the reset unit to be completely opened when the potential of the reset control signal is the reset on-state voltage for the test.
In actual operation, if the reset on-state voltage for testing is relatively small and the on-state of the reset transistor included in the reset unit is incomplete, the reset transistor cannot be completely turned on, and the charging and discharging time is insufficient, the problem of incomplete photoelectric node reset or follow-up conversion output can occur, so that the problem that the output voltage detected by the photoelectric detection unit 15 is smaller than the normal output voltage is caused, and therefore, the judgment result of whether the reset unit can control the complete turning on of the reset transistor included in the reset unit can be obtained according to whether the voltage difference between the output voltage detected by the photoelectric detection unit and the second initial output voltage is larger than the second predetermined voltage difference range or not.
In practical operation, the second predetermined voltage difference range may be selected according to practical situations.
The noise reduction device is applied to an optical detection circuit, wherein the optical detection circuit comprises a gating unit, a first end of the gating unit is connected with an output node, and a second end of the gating unit is connected with a following node; the photo detection circuit comprises a photo detection unit for amplifying the voltage of the output node and detecting the amplified voltage of the output node; the noise reduction device comprises a setting unit, a signal-to-noise ratio detection unit and a selection unit;
the setting unit is used for setting a gate off-state voltage Vg1, so that when the potential of the gate control signal is the gate off-state voltage Vg1, the gate unit controls to disconnect the output node and the following node; the setting unit is further used for setting a test gating on-state voltage, so that when the potential of the gating control signal is the test gating on-state voltage, the gating unit controls the gating transistor included in the gating unit to be completely opened; the number of the test gating on-state voltages is at least two;
the signal-to-noise ratio detection unit is used for detecting the signal-to-noise ratios of the output voltages respectively corresponding to the at least two testing gating on-state voltages;
the selection unit is used for selecting one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
The noise reduction device applied to the optical detection circuit in the embodiment of the invention firstly sets the gate off-state voltage Vg1 through the setting unit, and then sets at least two gate on-state voltages for testing through the setting unit: the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to at least two of the test-use gate-on voltages, the selection unit selects one of the test-use gate-on voltages corresponding to the highest signal-to-noise ratio as a light-detection-use gate-on voltage, when the light detection circuit actually works, the potential of a gate control signal can be set to the light-detection-use gate-on voltage in a photoelectric detection time period included in a detection period, at the time, the signal-to-noise ratio of the output voltage detected by the photoelectric detection unit included in the light detection circuit is high, and the result of optimizing the signal-to-noise ratio can be achieved by using the result
Specifically, the setting unit is further configured to set a reset off-state voltage Vg2, so that when the potential of the control signal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photo node; the setting unit is further used for setting a reset on-state voltage for testing, so that when the potential of the reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit is further used for detecting signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit is further configured to select a reset on-state voltage for test corresponding to the highest signal-to-noise ratio as a reset on-state voltage for photodetection;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
The noise reduction device applied to the optical detection circuit in the embodiment of the invention firstly sets the reset off-state voltage Vg2 through the setting unit, and then sets at least two reset on-state voltages for testing through the setting unit: the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to at least two of the test reset on-state voltages, the selection unit selects one of the test reset on-state voltages corresponding to the highest signal-to-noise ratio as a light detection reset on-state voltage, when the light detection circuit actually works, the potential of the reset control signal can be set to the light detection reset on-state voltage in a reset time period included in a detection period, and at the moment, the signal-to-noise ratio of the output voltage detected by the photoelectric detection unit included in the light detection circuit is large, so that a result of optimizing the signal-to-noise ratio can be achieved by using a noise detection result.
In actual operation, the setting unit, the signal-to-noise ratio detection unit and the selection unit can be arranged in a main control module, and the signal-to-noise ratio detection unit arranged in the main control module performs analog-to-digital conversion and calculation on the output voltage of the photoelectric detection module to obtain a corresponding signal-to-noise ratio.
The optical detection system according to the embodiment of the present invention may include the noise reduction device.
As shown in fig. 6, an embodiment of the optical detection system according to the present invention includes the noise reduction device 60 and the optical detection circuit;
the light detection circuit comprises a photoelectric conversion unit, a reset unit, a voltage following unit, a gating unit, a photoelectric detection unit and a current detection unit;
the photoelectric conversion unit includes a photodiode PD; the anode of the photodiode PD is connected with a photoelectric voltage VRA cathode of the photodiode PD is connected to a photoelectric node FD;
the reset unit includes: a reset transistor MR; the gate of the MR is connected with a reset control terminal RST, and the first pole of the MR is connected with a reset voltage VRSTThe second pole of the MR is connected with the FD;
the voltage following unit includes: a voltage follower transistor MSF; the grid electrode of the MSF is connected with the FD, the first pole of the MSF is connected to a high level VDD, and the second pole of the MSF is connected with a following node B;
the gating unit includes: a gate transistor MSEL; the grid electrode of the MSEL is connected with a gating control end SEL, the first pole of the MSEL is connected with the following node B, and the second pole of the MSEL is connected with an output node A;
the current detection unit includes: a current detector IS; the first end of the IS IS connected with the output node A, and the second end of the IS IS connected with the low-level VSS;
the photodetecting unit includes: an operational amplification module Amp and an output detection module 150;
the input end of the Amp is connected with the output node A, and the output end of the Amp is connected with the output detection module 150;
the operational amplification module Amp is used for carrying out a method on the voltage of the output node A to obtain an output voltage Vout, and the Vout is output through an output end;
the output detection module 150 is configured to detect the output voltage Vout;
the noise reduction device 60 is connected to the output detection module 150, and is configured to select the light detection gate on-state voltage, the light detection gate off-state voltage, the light detection reset on-state voltage, and the light detection reset off-state voltage, so as to generate a corresponding gate control signal (not shown in fig. 6) and a reset control signal (not shown in fig. 6) at the time of actual light detection, transmit the gate control signal to the SEL, and transmit the reset control signal to the RST.
In the specific embodiment shown in fig. 6, each transistor is an n-type transistor, but in actual operation, the transistor may be replaced by a p-type transistor, and the type of the transistor is not limited herein. In order to distinguish two poles of the transistor except for the gate, one of the poles is referred to as a first pole, and the other pole is referred to as a second pole; the first pole is a source electrode, and the second pole is a drain electrode; alternatively, the first pole is a drain and the second pole is a source.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (10)

1. A noise reduction method is applied to an optical detection circuit, wherein the optical detection circuit comprises a gating unit, a first node and a following node, wherein the control end of the gating unit is connected with a gating control end, the first end of the gating unit is connected with an output node, and the second end of the gating unit is connected with the following node; the photo detection circuit comprises a photo detection unit for amplifying the voltage of the output node and detecting the amplified voltage of the output node; the noise reduction method is characterized by comprising the following steps:
the setting unit sets a gate off-state voltage Vg1 so that the gate unit controls to disconnect the output node from the following node when the potential of a gate control signal on the gate control terminal is the gate off-state voltage Vg 1;
the setting unit sets a test gate on-state voltage, so that when the potential of the gate control signal is the test gate on-state voltage, the gate unit controls a gate transistor included in the gate unit to be completely opened; the number of the test gating on-state voltages is at least two;
the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test-use gating on-state voltages;
the selection unit selects one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
2. The noise reduction method according to claim 1, wherein the setting unit sets a test gate on-state voltage such that when the potential of the gate control signal is the test gate on-state voltage, the step of the gate unit controlling the gate transistor included therein to be fully turned on includes at least two test gate on-state voltage setting steps;
the step of setting the test strobe on-state voltage comprises:
an initial gating setting step: the setting unit sets an initial gating on-state voltage and a first cycle number; the starting gate clock voltage difference V0 is equal to the voltage difference between the starting gate on-state voltage and the gate off-state voltage Vg 1; the first cycle number is an integer greater than 1;
a gating setting step: the setting unit sets the difference of the gated clock voltage to 0.5V0, and the gated on-state voltage is equal to 0.5V0+ Vg 1; the first counting unit sets a first counting value as 1;
a gating result obtaining step: the setting unit obtains a judgment result of whether the gating unit can control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
a gating clock voltage difference setting step: when the judgment result is that the gating unit controls the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.25V 0; when the judging result is that the gating unit cannot control the gating transistor included in the gating unit to be completely opened, the setting unit sets the gating clock voltage difference to be 0.75V 0; the first counting unit controls the first counting value to be added by 1;
a strobe flow step: when the first counting value is not equal to the first cycle number, switching to the gating result obtaining step;
a step of setting the on-state voltage for testing: when the first count value is equal to the first cycle number, the setting unit sets the sum of the current gate clock voltage difference and the gate off-state voltage Vg1 as the test gate on-state voltage.
3. The noise reduction method of claim 2, wherein the gating result obtaining step includes:
the setting unit calculates a voltage difference between the output voltage detected by the photoelectric detection unit and a first initial output voltage when a voltage difference between the potential of the gate control signal and the gate off-state voltage Vg1 is the gate clock voltage difference; the first initial output voltage is an output voltage detected by the photoelectric detection unit when the electric potential of the gating control signal is an initial gating on-state voltage;
when the voltage difference value is within a first preset voltage difference value range, the setting unit obtains a judgment result that when the electric potential of the gating control signal is the gating on-state voltage for the test, the gating unit controls the gating transistor included in the gating unit to be completely opened;
when the voltage difference is not within a first preset voltage difference range, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened when the potential of the gating control signal is the gating on-state voltage for the test.
4. The noise reduction method according to claim 3, wherein the photodetecting unit includes an operational amplification module and an output detection module; the input end of the operational amplification module is connected with the output node, and the output end of the operational amplification module is connected with the output detection module; the output detection module is used for detecting the output voltage output by the output end; the gating result obtaining step further includes:
the setting unit determines whether the voltage input to the output node of the operational amplification module is less than the minimum input voltage of the operational amplification module according to the output voltage detected by the photoelectric detection unit when the voltage difference between the potential of the gating control signal and the gating off-state voltage Vg1 is the gating clock voltage difference;
when the setting unit judges that the voltage input to the output node of the operational amplification module is smaller than the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit cannot control the gating transistor included in the gating unit to be completely opened;
when the setting unit judges that the voltage input to the output node of the operational amplification module is greater than or equal to the minimum input voltage of the operational amplification module, the setting unit obtains a judgment result that the gating unit controls the gating transistor included in the gating unit to be completely opened.
5. The noise reduction method according to any one of claims 1 to 4, wherein the photodetection circuit comprises a reset unit having a control terminal connected to a reset control terminal, a first terminal connected to a reset voltage terminal, and a second terminal connected to the photoelectric node; the noise reduction method further includes, after the step of selecting, by the selection unit, one of the test-use gate on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection-use gate on-state voltage:
the setting unit sets a reset off-state voltage Vg2, so that when the potential of a reset control signal on the reset control terminal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photoelectric node;
the setting unit sets a reset on-state voltage for testing, so that when the potential of the reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit detects signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit selects one of the test reset on-state voltages corresponding to the highest signal-to-noise ratio as a light detection reset on-state voltage;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
6. The noise reduction method according to claim 5, wherein the setting unit sets a test reset on-state voltage such that when the level of the reset control signal is the test reset on-state voltage, the step of the reset unit controlling the included reset transistor to be fully turned on includes at least two test reset on-state voltage setting steps;
a reset on voltage setting step for the test includes:
an initial reset setting step: the setting unit sets an initial reset on-state voltage and a second cycle number; a starting reset clock voltage difference V1 is equal to a voltage difference between the starting reset on-state voltage and the reset off-state voltage Vg 2; the second cycle number is an integer greater than 1;
resetting the setting step: the set cell sets a reset clock voltage difference to 0.5V1, when the reset on-state voltage is equal to 0.5V1+ Vg 2; the second counting unit sets a second counting value as 1;
a reset result obtaining step: the setting unit obtains a judgment result whether the reset unit can control the reset transistor included in the reset unit to be completely turned on or not when the potential of the reset control signal is the reset on-state voltage for the test according to the output voltage detected by the photoelectric detection unit when the voltage difference value between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference;
resetting the clock voltage difference setting step: when the judgment result is that the reset unit controls the reset transistor included in the reset unit to be completely opened, the setting unit sets the reset clock voltage difference to be 0.25V 1; when the judgment result is that the reset unit cannot control the reset transistor included in the reset unit to be completely turned on, the setting unit sets the reset clock voltage difference to 0.75V 1; the second counting unit controls the second counting value to be increased by 1;
resetting circulation steps: when the second counting value is not equal to the second cycle number, switching to the reset result obtaining step;
reset on-state voltage setting step for test: when the second count value is equal to the second cycle number, the setting unit sets a sum of a current reset clock voltage difference and the reset off-state voltage Vg2 as the test reset on-state voltage.
7. The noise reduction method according to claim 6, wherein the reset result obtaining step includes:
the setting unit calculates a voltage difference between an output voltage detected by the photoelectric detection unit and a second initial output voltage when a voltage difference between the potential of the reset control signal and the reset off-state voltage Vg2 is the reset clock voltage difference; the second initial output voltage is an output voltage detected by the photoelectric detection unit when the potential of the reset control signal is an initial reset on-state voltage;
when the voltage difference value is within a second preset voltage difference value range, the setting unit obtains a judgment result that when the potential of the reset control signal is the reset on-state voltage for the test, the reset unit controls the reset transistor included in the reset unit to be completely opened;
when the voltage difference is not within a second predetermined voltage difference range, the setting unit obtains a judgment result that the reset unit cannot control the reset transistor included in the reset unit to be completely opened when the potential of the reset control signal is the reset on-state voltage for the test.
8. A noise reduction device is applied to an optical detection circuit, wherein the optical detection circuit comprises a gating unit, a first node and a following node, wherein the control end of the gating unit is connected with a gating control end, the first end of the gating unit is connected with an output node, and the second end of the gating unit is connected with the following node; the photo detection circuit comprises a photo detection unit for amplifying the voltage of the output node and detecting the amplified voltage of the output node; the noise reduction device is characterized by comprising a setting unit, a signal-to-noise ratio detection unit and a selection unit;
the setting unit is used for setting a gate off-state voltage Vg1, so that when the potential of the gate control signal is the gate off-state voltage Vg1, the gate unit controls to disconnect the output node and the following node; the setting unit is further used for setting a test gating on-state voltage, so that when the potential of the gating control signal is the test gating on-state voltage, the gating unit controls the gating transistor included in the gating unit to be completely opened; the number of the test gating on-state voltages is at least two;
the signal-to-noise ratio detection unit is used for detecting the signal-to-noise ratios of the output voltages respectively corresponding to the at least two testing gating on-state voltages;
the selection unit is used for selecting one of the test-use gating on-state voltages corresponding to the highest signal-to-noise ratio as a light-detection gating on-state voltage;
the test gate on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
9. The noise reduction device according to claim 8, wherein the setting unit is further configured to set a reset off-state voltage Vg2, such that when the potential of the control signal is the reset off-state voltage Vg2, the reset unit controls to disconnect the reset voltage terminal from the photo node; the setting unit is further used for setting a reset on-state voltage for testing, so that when the potential of a reset control signal is the reset on-state voltage for testing, the reset unit controls the reset transistor included in the reset unit to be completely turned on; the number of the reset on-state voltages for the test is at least two;
the signal-to-noise ratio detection unit is further used for detecting signal-to-noise ratios of output voltages respectively corresponding to the at least two test reset on-state voltages;
the selection unit is further configured to select a reset on-state voltage for test corresponding to the highest signal-to-noise ratio as a reset on-state voltage for photodetection;
the test reset on-state voltage is within a predetermined voltage range; the output voltage is the amplified voltage of the output node detected by the photoelectric detection unit.
10. A light detection system comprising a noise reduction device as claimed in claim 8 or 9.
CN201810001549.0A 2018-01-02 2018-01-02 Noise reduction method, noise reduction device and optical detection system Expired - Fee Related CN108200363B (en)

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