CN108168695B

CN108168695B - Light detection unit and method, light detection circuit and method, and display device

Info

Publication number: CN108168695B
Application number: CN201810004483.0A
Authority: CN
Inventors: 郑智仁; 刘伟; 王鹏鹏; 丁小梁; 韩艳玲; 曹学友; 张平
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2018-01-03
Filing date: 2018-01-03
Publication date: 2020-05-19
Anticipated expiration: 2038-01-03
Also published as: CN108168695A

Abstract

The invention provides a light detection unit and method, a light detection circuit and method, and a display device. The light detection unit comprises a switch module, a reset module, a reading module, a processing module and a light sensing module for detecting light signals; the control end of the switch module is connected with the gate line, the first end of the switch module is connected with the light sensing module, and the second end of the switch module is connected with the reading line; the reading module is connected with a reading line and used for reading the electric signal on the reading line; the control end of the reset module is connected with a reset control line; the reset module is also connected with the reading line and is used for controlling the reading line to be connected with reset voltage or not under the control of the reset control line; the processing module is used for calculating the brightness of the optical signal detected by the light sensing module according to the electric signal read by the reading module. The invention adds the reset module and ensures that the output light brightness has no noise caused by electric leakage by controlling the time sequence of the reset control signal on the reset control line.

Description

Light detection unit and method, light detection circuit and method, and display device

Technical Field

The present invention relates to the field of optical detection technologies, and in particular, to an optical detection unit and method, an optical detection circuit and method, and a display device.

Background

PPS (Passive Pixel Sensor) circuits with photodiodes are used in optical detection applications such as fingerprint recognition. The traditional PPS circuit matched with the photodiode can generate photocurrent when the photodiode is illuminated, generates accumulated voltage output after accumulation of an integrator at the front end of the independent circuit, and generates digital signals through a sampling holder and an analog-digital converter. However, since the readout line is connected to a plurality of photo detection pixels, the leakage current generated by all the photo detection pixels on a row is simultaneously accumulated in the output of the integrator, and when the electrical signal converted by the photodiode included in a certain photo detection pixel is read, the output has noise generated by the leakage current.

Disclosure of Invention

The present invention is directed to a light detection unit and method, a light detection circuit and method, and a display device, which solve the problem of the prior art that when an electrical signal converted by a photodiode included in a light detection pixel is read, the output has noise generated due to a leakage current due to the leakage current.

In order to achieve the above object, the present invention provides a light detection unit, which includes a switch module, a reset module, a reading module, a processing module, and a light sensing module for detecting light signals;

the control end of the switch module is connected with a gate line, the first end of the switch module is connected with the light sensing module, and the second end of the switch module is connected with a reading line;

the reading module is connected with the reading line and used for reading the electric signal on the reading line;

the control end of the reset module is connected with a reset control line; the reset module is also connected with the reading line and used for controlling the reading line to be connected with a reset voltage or not under the control of the reset control line;

the processing module is used for calculating the brightness of the optical signal detected by the light sensing module according to the electric signal read by the reading module.

In practice, the reading module comprises:

the positive phase input end of the operational amplifier is connected with the reference voltage end, the negative phase input end of the operational amplifier is connected with the reading line, and the output end of the operational amplifier is connected with the processing module; and the number of the first and second groups,

the first end of the storage capacitor is connected with the negative phase input end of the operational amplifier, and the second end of the storage capacitor is connected with the output end of the operational amplifier;

the reset module includes: and the control end of the reset switch is connected with a reset control line, the first end of the reset switch is connected with the negative phase input end of the operational amplifier, and the second end of the reset switch is connected with the output end of the operational amplifier.

In practice, the light-sensing module comprises: the anode of the photodiode is connected with the photoelectric voltage end, and the cathode of the photodiode is connected with the first end of the switch module;

the switch module includes: and a switching transistor having a gate connected to the gate line, a first electrode connected to the cathode of the photodiode, and a second electrode connected to the readout line.

The present invention also provides a light detection method applied to the above light detection unit, the light detection method including:

in a first reset stage, under the control of a gate line, a switch module controls a light sensing module to be connected with a reading line, and under the control of a reset control line, a reset module controls the reading line to be connected with a reset voltage so as to reset the light sensing module and release residual charges in the light sensing module;

in the first accumulation stage, under the control of the gate line, the switch module controls to disconnect the connection between the light sensing module and the reading line, and under the control of the reset control line, the reset module controls the reading line not to be connected with reset voltage;

in the first sampling stage, under the control of the gate line, the switch module controls to disconnect the connection between the light sensing module and the reading line, and under the control of the reset control line, the reset module controls the reading line not to be connected with reset voltage; reading a first electric signal on the reading line by a reading module;

in a second reset stage, under the control of the gate line, the switch module controls the light sensing module to be connected with the reading line, and under the control of the reset control line, the reset module controls the reading line to be connected with a reset voltage so as to reset the light sensing module and release residual charges in the light sensing module;

in the second accumulation stage, under the control of the gate line, the switch module controls to disconnect the connection between the light sensing module and the reading line, and under the control of the reset control line, the reset module controls the reading line not to be connected with the reset voltage;

in a second sampling stage, under the control of the gate line, the switch module controls the light sensing module to be connected with the reading line, under the control of the reset control line, the reset module controls the reading line not to be connected with reset voltage, and the reading module reads a second electric signal on the reading line; the processing module calculates the brightness of the optical signal detected by the light sensing module according to the first electric signal and the second electric signal.

When the sampling device is implemented, the first reset stage, the first accumulation stage, the first sampling stage, the second reset stage, the second accumulation stage and the second sampling stage are sequentially arranged; or,

the second reset phase, the second accumulation phase, the second sampling phase, the first reset phase, the first accumulation phase and the first sampling phase are sequentially arranged.

The invention also provides a light detection circuit, which comprises a processing unit, a reading unit, a reset unit, a plurality of rows and columns of light detection units, a plurality of rows of gate lines, a plurality of columns of reading lines and a reset control line; the multiple light detection units positioned on the same row are all connected with the same row gate line, and the multiple light detection units positioned on the same column are all connected with the same column reading line;

the light detection unit comprises a switch module and a light sensing module which corresponds to the switch module and is used for sensing light signals; the control end of the switch module is connected with a corresponding row strobe line, the first end of the switch module is connected with the light sensing module, and the second end of the switch module is connected with a corresponding column reading line;

the reading unit comprises a plurality of reading modules;

the reading module is connected with the reading line and is used for reading the electric signal on the reading line;

the reset unit comprises a plurality of reset modules; the control end of the reset module is connected with a reset control line;

the reset module is also connected with the reading line and used for controlling whether the reading line is connected with a reset voltage or not under the control of the reset control line;

the processing unit is connected with the reading module and used for calculating the brightness of the optical signal detected by the light sensing module according to the electric signal read by the reading module.

In practice, the reading module comprises:

the positive phase input end of the operational amplifier is connected with the reference voltage end, the negative phase input end of the operational amplifier is connected with the reading line, and the output end of the operational amplifier is connected with the processing unit; and the number of the first and second groups,

the reset module includes: the control end of the reset switch is connected with a reset control line, the first end of the reset switch is connected with the negative phase input end of the operational amplifier, and the second end of the reset switch is connected with the output end of the operational amplifier;

the light sense module includes: the anode of the photodiode is connected with the photoelectric voltage end, and the cathode of the photodiode is connected with the first end of the switch module;

The invention also provides an optical detection method, which is applied to the optical detection circuit, wherein the optical detection circuit comprises a processing unit, a reading unit, a reset control line, N rows of M columns of optical detection units, N rows of gating lines and M columns of reading lines; the reading unit comprises M reading modules; the reset unit comprises M reset modules; n and M are both integers greater than 1; each detection period comprises N detection time periods; n is a positive integer less than or equal to N;

the light detection method includes: during a detection cycle, during an nth detection period,

in the first reset stage, under the control of each row strobe line, each switch module controls the corresponding light sensing module to be connected with the corresponding column readout line; under the control of a reset control line, each reset module controls a corresponding row reading line to access a reset voltage so as to reset the light sensing module and release residual charges in the light sensing module;

in the first accumulation stage, under the control of each row strobe line, each switch module controls to disconnect the connection between the corresponding light sensing module and the corresponding column readout line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage;

in the first sampling stage, under the control of each row strobe line, each switch module controls to disconnect the connection between the corresponding light sensing module and the corresponding column readout line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage; each reading module reads the first electric signal on the corresponding column reading line;

in the second reset stage, under the control of each row strobe line, each switch module controls the corresponding light sensing module to be connected with the corresponding column readout line; under the control of the reset control line, each reset module controls the corresponding row reading line to access a reset voltage so as to reset the light sensing module and release the residual charges in the light sensing module;

in the second accumulation stage, under the control of each row strobe line, each switch module controls to disconnect the connection between the corresponding light sensing module and the corresponding column readout line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage;

in the second sampling stage, under the control of the gate line of the nth row, the switch modules included in the light detection units positioned in the nth row control the corresponding light sensing modules to be connected with the corresponding row reading lines; under the control of the reset control line, each reset module controls the corresponding row reading line not to be connected with reset voltage, and each reading module reads a second electric signal on the corresponding row reading line; the processing unit calculates the brightness of the optical signal detected by the light sensing module included in the light detection unit positioned on the nth row according to the first electric signal and the second electric signal.

In practice, during the nth detection period,

the first reset phase, the first accumulation phase, the first sampling phase, the second reset phase, the second accumulation phase and the second sampling phase are sequentially arranged; or,

The invention also provides a display device comprising the light detection circuit.

Compared with the prior art, the light detection unit and method, the light detection circuit and method and the display device are additionally provided with the reset module, and the output light brightness does not have noise caused by electric leakage by controlling the time sequence of the reset control signal on the reset control line.

Drawings

FIG. 1 is a block diagram of a light detection unit according to an embodiment of the present invention;

FIG. 2 is a block diagram of a light detection unit according to another embodiment of the present invention;

FIG. 3 is a circuit diagram of one embodiment of a light detection unit according to the present invention;

FIG. 4 is a circuit diagram of an embodiment of a light detection circuit according to the present invention;

fig. 5 is a schematic diagram of connection relations between the photodetection pixel located in the mth column and the mth reading module, the mth resetting module and the processing unit included in the photodetection circuit according to the present invention;

FIG. 6 is a first timing diagram of the operation of an embodiment of the light detection circuit of the present invention;

fig. 7 is a second operation timing diagram of the embodiment of the photodetection circuit according to the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics. In the embodiment of the present invention, in order to distinguish two poles of the transistor except for the gate, one of the two poles is referred to as a first pole, and the other pole is referred to as a second pole. In practical operation, the first pole may be a drain, and the second pole may be a source; alternatively, the first pole may be a source and the second pole may be a drain.

As shown in fig. 1, the light detection unit according to the embodiment of the present invention includes a switch module 11, a reset module 12, a reading module 13, a processing module 14, and a light sensing module 15 for detecting a light signal;

the control end of the switch module 11 is connected with a gate line SEL, the first end of the switch module 11 is connected with the light sensing module 15, and the second end of the switch module 11 is connected with a reading line RL;

the reading module 13 is connected to the reading line RL and configured to read an electrical signal on the reading line RL;

the control end of the reset module 12 is connected with a reset control line RST; the reset module 12 is further connected to the read line RL, and is configured to control whether the read line RL is connected to a reset voltage under the control of the reset control line RST;

the processing module 14 is configured to calculate the brightness of the optical signal detected by the light sensing module 15 according to the electrical signal read by the reading module 13.

In the embodiment of the light detecting unit shown in fig. 1, the reset module 12 is added, the reset module 12 resets the light sensing module at each reset stage by controlling the timing of the reset control signal on the reset control line RST to release the charges remaining in the light sensing module, the switch module 11 is controlled to switch on the connection between the light sensing module 15 and the readout line RL by controlling the timing of the gate control signal on the gate line SEL, and the processing module 14 can calculate the brightness of the light signal without the leakage current noise according to the electrical signal read by the readout module 13, so that the output light brightness does not have the noise generated by the leakage current.

In practical implementation, in the light detection unit according to the embodiment of the present invention, the switch module 11 and the light sensing module 15 included in one light detection unit may be regarded as one light detection pixel included in the passive pixel detection array.

In practical operation, the photo sensing module 15 may include a photodiode, an anode of the photodiode is connected to the photovoltaic terminal, and a cathode of the photodiode is connected to the first terminal of the switch module; in general, the photovoltaic voltage output by the photovoltaic voltage terminal is a direct current voltage, and the value of the photovoltaic voltage can be selected according to actual conditions.

The embodiment of the light detection unit according to the invention as described in figure 1 is in operation,

in a first reset stage, under the control of the gate line SEL, the switch module 11 controls the light sensing module 15 to be connected to the readout line RL, and under the control of the reset control line RST, the reset module 12 controls the readout line RL to be connected to a reset voltage so as to reset the light sensing module 15 (when the light sensing module 15 includes a photodiode, the cathode of the photodiode is reset), and the residual charges in the light sensing module 15 are released;

in the first accumulation stage, under the control of the gate line SEL, the switch module 11 controls to disconnect the connection between the light sensing module 15 and the reading line RL, and under the control of the reset control line RST, the reset module controls the reading line not to be connected with the reset voltage; at this time, the leak current of the light detection pixel is accumulated in the storage capacitor included in the reading block 13;

in the first sampling stage, under the control of the gate line SEL, the switch module 11 controls to disconnect the connection between the light sensing module 15 and the reading line RL, and under the control of the reset control line RST, the reset module 12 controls the reading line RL not to be connected with the reset voltage; the reading module 13 reads the first electrical signal on the reading line RL; the first electrical signal includes a noise electrical signal caused by the above leakage current;

in the second reset stage, under the control of the gate line SEL, the switch module 11 controls the light sensing module 15 to be connected to the readout line RL, and under the control of the reset control line RST, the reset module 12 controls the readout line RL to be connected to a reset voltage so as to reset the light sensing module 15 (when the light sensing module 15 includes a photodiode, the cathode of the photodiode is reset), and the residual charges in the light sensing module 15 are released;

in the second accumulation phase, the switch module 11 controls to disconnect the connection between the light sensing module 15 and the reading line under the control of the gate line SEL, and the reset module 12 controls the reading line RL not to be connected with the reset voltage under the control of the reset control line RST;

in the second sampling stage, under the control of the gate line SEL, the switch module 11 controls the light sensing module 15 to be connected with the reading line RL, and under the control of the reset control line RST, the reset module 12 controls the reading line RL not to be connected with the reset voltage, and the reading module 13 reads a second electric signal on the reading line RL; the second electrical signal includes the noise electrical signal and a photoelectric signal obtained by converting the optical signal received by the optical sensing module 15; the processing module 14 calculates the brightness of the optical signal detected by the light sensing module according to the first electrical signal and the second electrical signal, specifically, the processing module 14 removes a noise electrical signal in the second electrical signal to obtain the photoelectric signal, and the processing module 14 calculates the brightness of the corresponding optical signal according to the photoelectric signal.

In actual operation, the first reset phase, the first accumulation phase, the first sampling phase, the second reset phase, the second accumulation phase and the second sampling phase may be set in sequence; that is, a noise electrical signal can be obtained by sampling at a first sampling stage, and then a second electrical signal containing the noise electrical signal and a photoelectric signal can be obtained by sampling at a second sampling stage;

or, the second reset phase, the second accumulation phase, the second sampling phase, the first reset phase, the first accumulation phase and the first sampling phase may be sequentially set; that is, the second electrical signal including the noise electrical signal and the photoelectric signal may be obtained by sampling in the second sampling stage, and then the noise electrical signal may be obtained by sampling in the first sampling stage.

Specifically, as shown in fig. 2, the reading module 13 includes:

an operational amplifier OP having a positive phase input terminal connected to a reference voltage terminal of the input reference voltage VCM, a negative phase input terminal connected to the read line RL, and an output terminal connected to the processing module 14; and the number of the first and second groups,

a first end of the storage capacitor CF is connected with a negative phase input end of the operational amplifier OP, and a second end of the storage capacitor CF is connected with an output end of the operational amplifier OP;

the reset module 12 includes: and a control end of the reset switch SR is connected with a reset control line RST, a first end of the reset switch SR is connected with a negative phase input end of the operational amplifier OP, and a second end of the reset switch SR is connected with an output end of the operational amplifier OP.

In practical operation, in each accumulation phase, the leakage current of the light detection pixel is accumulated in the storage capacitor CF included in the readout module 13, the operational amplifier OP is used for amplifying the voltage input by the readout line RL, and the reset switch SR included in the reset module 12 is used for controlling the connection between the readout line RL and the processing module 14 to be turned on or off under the control of the reset control line RST.

In an implementation, as shown in fig. 3, the light sensing module 15 may include: a photodiode PD having an anode connected to the photovoltaic voltage terminal TVP and a cathode connected to the first terminal of the switching module 11;

the switch module 11 includes: a switching transistor MS having a gate connected to the gate line SEL, a first electrode connected to the cathode of the photodiode PE, and a second electrode connected to the read line RL.

In the embodiment shown in fig. 3, the switching transistor MS is an n-type transistor, in which case the first pole is a drain and the second pole is a source, but in actual operation, the switching transistor MS may also be a p-type transistor, and the type of the switching transistor is not limited herein.

The light detection method according to an embodiment of the present invention is applied to the light detection unit, and includes:

In the light detection method according to the embodiment of the invention, the reset module resets the light sensing module in each reset stage by controlling the time sequence of the reset control signal on the reset control line to release the residual charges in the light sensing module, the switch module is controlled to connect the light sensing module with the read line by controlling the time sequence of the gate control signal on the gate line, and the processing module can calculate the brightness of the light signal without the leakage current noise according to the electrical signal read by the read module, so that the output light brightness has no noise generated by the leakage current.

The optical detection circuit comprises a processing unit, a reading unit, a reset unit, N rows of M columns of optical detection units, N rows of gating lines, M columns of reading lines and a reset control line; the M light detection units positioned on the same row are all connected with the same row of gate lines, and the N light detection units positioned on the same column are all connected with the same column of reading lines;

the n row and m column light detection unit comprises an n row and m column switch module and an n row and m column light sensing module which is corresponding to the n row and m column switch module and is used for sensing light signals; the control end of the nth row and mth column switch module is connected with the nth row and mth column gate line, the first end of the nth row and mth column switch module is connected with the nth row and mth column light sensing module, and the second end of the nth row and mth column switch module is connected with the mth column reading line;

the reading unit comprises M reading modules;

the m reading module is connected with the m reading line and used for reading the electric signal on the m reading line;

the reset unit comprises M reset modules; the control end of the reset module is connected with the reset control line;

the m reset module is also connected with the m reading line and is used for controlling the m reading line to be connected with a reset voltage or not under the control of the reset control line;

the processing unit is connected with the mth reading module and used for calculating the brightness of the optical signal detected by the optical sensing module in the mth column according to the electrical signal read by the mth reading module;

n and M are both integers greater than 1, N is a positive integer less than or equal to N, and M is a positive integer less than or equal to M.

In practical implementation, in the light detection circuit according to the embodiment of the present invention, one of the light detection units 15 may be regarded as one light detection pixel included in the passive pixel detection array. The embodiment of the light detection circuit of the embodiment of the invention adds the reset unit comprising M reset modules, wherein one reset module corresponds to one row of reading lines, namely one row of light detection pixels. The light detection circuit according to the embodiment of the invention resets the light sensing modules included in the light detection units in the corresponding row at each reset stage by controlling the time sequence of the reset control signal on the reset control line so as to release the residual charges in the light sensing modules, controls whether the connection between the light sensing modules and the corresponding row read lines is conducted by each switch module by controlling the time sequence of the gate control signal on the corresponding row gate line, and calculates the brightness of the light signal without the leakage current noise according to the electric signal read by the read module by the processing unit so that the output light brightness does not have the noise generated by the leakage current.

The light detection circuit according to the present invention will be described with reference to the drawings.

As shown in fig. 4, the light detection circuit according to the embodiment of the present invention includes a processing unit 41, a reading unit, a reset unit, N rows of M columns of light detection units, N rows of pass lines, M columns of reading lines, and a reset control line; the M light detection units positioned on the same row are all connected with the same row of gate lines, and the N light detection units positioned on the same column are all connected with the same column of reading lines;

the nth row and mth column light detection unit comprises an nth row and mth column switch module (in the embodiment shown in fig. 4, the nth row and mth column switch module comprises an nth row and mth column switch transistor) and an nth row and mth column light sensing module corresponding to the nth row and mth column switch module and used for sensing a light signal (in the embodiment shown in fig. 4, the nth row and mth column light sensing module comprises an nth row and mth column photodiode); the control end of the nth row and mth column switch module is connected with the nth row and mth column gate line, the first end of the nth row and mth column switch module is connected with the nth row and mth column light sensing module, and the second end of the nth row and mth column switch module is connected with the mth column reading line;

n and M are both integers greater than 1, N is a positive integer less than or equal to N, and M is a positive integer less than or equal to M;

in fig. 4, a first row and first column switching transistor denoted by M11 and included in a first row and first column light detecting unit, and a first row and first column photodiode denoted by PD11 and included in a first row and first column light detecting unit; a first row and second column switching transistor denoted by reference numeral M12 included in the first row and second column light detecting unit, and a first row and second column photodiode denoted by reference numeral PD12 included in the first row and second column light detecting unit; a first row mth column switching transistor denoted by reference numeral M1M included for the first row mth column light detecting unit, a first row mth column photodiode denoted by reference numeral PD1M included for the first row mth column light detecting unit; a first row mth column switching transistor denoted by reference numeral M1M included for the first row mth column light detecting unit, a first row mth column photodiode denoted by reference numeral PD1M included for the first row mth column light detecting unit;

an nth row and first column switching transistor labeled Mn1 and included in an nth row and first column light detection unit, and an nth row and first column photodiode labeled PDn1 and included in an nth row and first column light detection unit; an nth row and column switching transistor labeled Mn2 and included in an nth row and column light detection unit, and an nth row and column photodiode labeled PDn2 and included in an nth row and column light detection unit; an n row and m column switching transistor which is marked as Mnm and is included by the n row and m column light detection unit, and an n row and m column photodiode which is marked as PDnm and is included by the n row and m column light detection unit; an n row and M column switching transistor labeled MnM and included in the n row and M column photo-detecting unit, and an n row and M column photodiode labeled PDnM and included in the n row and M column photo-detecting unit;

an Nth row and first column switching transistor labeled MN1 and included in the Nth row and first column light detection unit, and an Nth row and first column photodiode labeled PDN1 and included in the Nth row and first column light detection unit; an Nth row and second column switching transistor labeled MN2 and included in an Nth row and second column light detection unit, and an Nth row and second column photodiode labeled PDN2 and included in an Nth row and second column light detection unit; an Nth row and mth column switching transistor marked as MNm and included by an Nth row and mth column light detection unit, and an Nth row and mth column photodiode marked as PDNm and included by an Nth row and mth column light detection unit; an Nth row and Mth column switching transistor labeled MNM and included by an Nth row and Mth column photo-detection unit, and an Nth row and Mth column photodiode labeled PDNM and included by an Nth row and Mth column photo-detection unit;

in FIG. 4, reference numeral RL1 is the first column read line, reference numeral RL2 is the second column read line, reference numeral RLm is the M-th column read line, reference numeral RLM is the M-th column read line;

the reading unit comprises M reading modules; the reading module comprises an operational amplifier and a storage capacitor; in fig. 4, reference numeral OP1 is a first operational amplifier included in the first read block, and reference numeral CF1 is a first storage capacitor included in the first read block; a second operational amplifier, reference OP2, included in the second read module, and a first storage capacitor, reference CF2, included in the second read module; an mth operational amplifier, labeled OPm, included in the mth read block, and an mth storage capacitor, labeled CFm, included in the mth read block; an Mth operational amplifier marked as OPM and included by the Mth reading module, and an Mth storage capacitor marked as CFM and included by the Mth reading module; (ii) a

The negative phase input end of the first operational amplifier OP1 is connected with a first column read line RL1 and is used for reading an electric signal on RL 1; the non-inverting input end of the first operational amplifier OP1 is connected with a reference voltage VCM; the output of the first operational amplifier OP1 is connected to the processing unit 41; a first terminal of the CF1 is connected to a negative input terminal of the OP1, and a second terminal of the CF1 is connected to an output terminal of the OP 1;

the negative phase input end of the second operational amplifier OP2 is connected with a second column read line RL2 and is used for reading an electric signal on RL 2; the non-inverting input end of the second operational amplifier OP2 is connected with the reference voltage VCM; the output of the second operational amplifier OP2 is connected to the processing unit 41; a first terminal of the CF2 is connected to a negative input terminal of the OP2, and a second terminal of the CF2 is connected to an output terminal of the OP 2;

the negative phase input end of the mth operational amplifier OPm is connected to the mth column read line RLm for reading the electrical signal on the RLm; the positive phase input end of the mth operational amplifier OPm is connected with a reference voltage VCM; the output of the mth operational amplifier OPm is connected to the processing unit 41; CFm has a first terminal connected to the negative input of OPm and a second terminal CFm connected to the output of OPm;

the negative phase input end of the M operational amplifier OPM is connected with the M column reading line RLM and is used for reading the electric signal on the RLM; the positive phase input end of the M operational amplifier OPM is connected with a reference voltage VCM; the output terminal of the mth operational amplifier OPM is connected to the processing unit 41; the first end of the CFM is connected with the negative phase input end of the OPM, and the second end of the CFM is connected with the output end of the OPM;

the reset unit comprises M reset modules; the reset module comprises a reset switch; in fig. 4, a first reset switch denoted by K1 is included in the first reset module, a second reset switch denoted by K2 is included in the second reset module, an mth reset switch denoted by Km is included in the mth reset module, and an mth reset switch denoted by Km is included in the mth reset module;

the control end of the first reset switch K1 is connected with a reset control line RST, and is used for controlling whether the first column read line RL1 is connected with a reset voltage under the control of the RST;

the control end of the second reset switch K2 is connected to the reset control line RST, and is used for controlling whether the second column read line RL2 is connected to a reset voltage under the control of the RST;

the control end of the mth reset switch Km is connected with the reset control line RST and used for controlling whether the mth row reading line RLm is connected with the reset voltage or not under the control of the RST;

the control end of the Mth reset switch KM is connected with the reset control line RST and is used for controlling whether the Mth row reading line RLM is connected with a reset voltage or not under the control of the RST;

the processing unit 41 is connected to the output end of the first operational amplifier OP1, and is used for calculating the brightness of the optical signal detected by the photodiode in the first column according to the electrical signal output by the first operational amplifier OP 1;

the processing unit 41 is connected to the output end of the second operational amplifier OP2, and is used for calculating the brightness of the optical signal detected by the photodiode in the second column according to the electrical signal output by the second operational amplifier OP 2;

the processing unit 41 is connected to the output end of the mth operational amplifier OPm, and is configured to calculate, according to the electrical signal output by the mth operational amplifier OPm, the brightness of the optical signal detected by the photodiode located in the mth column;

the processing unit 41 is connected to the output end of the mth operational amplifier OPM, and is configured to calculate the brightness of the optical signal detected by the photodiode in the mth column according to the electrical signal output by the mth operational amplifier OPM.

The embodiment of the light detection circuit of the present invention shown in fig. 4 is operated such that, during a detection cycle, during the nth detection period,

in a first reset stage, under the control of each row gate line, each switching transistor controls the corresponding photodiode to be connected with the corresponding column read line; under the control of a reset control line, each reset module controls a corresponding column reading line to access a reset voltage so as to reset the photodiode and release residual charges in the photodiode;

in a first accumulation phase, each switching transistor is controlled to disconnect the connection between the corresponding photodiode and the corresponding column read line under the control of each row gate line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage; in the first accumulation phase, the integrated output of the drain currents of all the light detection pixels located in the mth column is accumulated in the mth storage capacitor CFm included in the mth readout block and reflected in the first electrical signal output from the mth operational amplifier OPm in the first sampling phase;

in a first sampling phase, under the control of each row gate line, each switching transistor controls to disconnect the connection between the corresponding photodiode and the corresponding column read line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage; each reading module reads the first electric signal on the corresponding column reading line; the first electric signal output from the mth operational amplifier OPm includes a noise electric signal caused by the leak current of all the light detection pixels located in the mth column;

in a second reset phase, under the control of each row strobe line, each switching transistor controls the corresponding photodiode to be connected with the corresponding column readout line; under the control of the reset control line, each reset module controls a corresponding column reading line to access a reset voltage so as to reset the photodiode and release residual charges in the photodiode;

in a second accumulation phase, each switching transistor is controlled to disconnect the connection between the corresponding photodiode and the corresponding column read line under the control of each row gate line; under the control of the reset control line, each reset module controls the corresponding column reading line not to be connected with reset voltage;

in the second sampling stage, under the control of the gate line of the nth row, the switching transistors included in the light detection units positioned in the nth row control the corresponding photodiodes to be connected with the corresponding column reading lines; under the control of the reset control line, each reset module controls the corresponding row reading line not to be connected with reset voltage, and each reading module reads a second electric signal on the corresponding row reading line; the second electrical signal output by the mth operational amplifier OPm includes a noise electrical signal caused by leakage currents of all the light detection pixels located in the mth column and a photoelectric signal obtained by converting the received optical signal by the photodiode located in the mth row and column; the processing unit calculates the brightness of the optical signal detected by the photodiode included in the optical detection unit positioned in the nth row and the mth column according to the first electric signal and the second electric signal.

In a specific implementation, the reading module may include:

the reset module may include: the control end of the reset switch is connected with a reset control line, the first end of the reset switch is connected with the negative phase input end of the operational amplifier, and the second end of the reset switch is connected with the output end of the operational amplifier;

The operation of the m-th row of light detection pixels will be described based on the connection relationship and signal transmission relationship between the m-th row of light detection pixels and the m-th reading module, and between the m-th reset module and the processing unit.

In actual operation, there are N light detection pixels located in the m-th column; in fig. 5, reference numeral PD1M denotes a photodiode located in the mth column in the first row, and reference numeral M1M denotes a switching transistor located in the mth column in the first row; a photodiode at the mth column in the second row is denoted by reference numeral PD2M, and a switching transistor at the mth column in the second row is denoted by reference numeral M2M; a photodiode in the mth column of the nth row denoted by PDNm, and a switching transistor in the mth column of the nth row denoted by MNm;

the gate of M1M is connected to the first row strobe line SEL1, and the gate of M2M is connected to the second row strobe line SEL 2; the gate of MNm is connected with an Nth row strobe line SELN;

the first pole of M1M is connected with the cathode of PD1M, and the second pole of M1M is connected with RLm; the first pole of M2M is connected with the cathode of PD2M, and the second pole of M2M is connected with RLm; a first pole of MNm is connected to the cathode of PDNm and a second pole of MNm is connected to RLm;

the anode of PD1m, the anode of PD2m and the anode of PDNm are all connected with a photoelectric voltage terminal TVP;

the mth column, labeled RLm;

the mth reading module includes: an mth operational amplifier OPm having a positive phase input terminal connected to a reference voltage terminal of the input reference voltage VCM, a negative phase input terminal connected to the mth column read line RLm, and an output terminal connected to the processing unit 41; and the number of the first and second groups,

a storage capacitor CFm having a first terminal connected to the negative phase input terminal of the mth operational amplifier OPm and a second terminal connected to the output terminal of the mth operational amplifier OPm;

the output end of the OPm is used for outputting the mth output voltage Voutm;

the reset module may include: and a reset switch Km having a control terminal connected to a reset control line RST, a first terminal connected to the negative input terminal of the mth operational amplifier OPm, and a second terminal connected to the output terminal of the mth operational amplifier Opm.

In the embodiment shown in fig. 5, reference numeral 41 is a processing unit.

In the embodiment shown in fig. 5, each switching transistor is an n-type transistor, but in actual operation, each switching transistor may be a p-type transistor, and the type of the switching transistor is not limited herein.

As shown in fig. 6, in operation of the light detecting pixel of the m-th column of fig. 5 of the present invention, during a detection period,

at the first detection time period S1,

in the first reset period T11 included in S1, RST and each row gate line all output a high level (as shown in fig. 6, SEL1 and SEL2 both output a high level), each switching transistor is turned on, Km controls the connection between the negative phase input terminal of OPm and the output terminal of Opm to be turned on, the voltage of the cathodes of all the photodiodes in the m-th column is reset, and the voltage of the cathodes of all the photodiodes in the m-th column is set to Vcom through RLm to discharge the residual charge in the photodiodes in the m-th column. Vcom is the common electrode voltage;

in the first accumulation phase T12 included in S1, RST and all the rows and lines of the gate lines output low (as shown in fig. 6, SEL1 and SEL2 both output low), each switching transistor is turned off, Km controls to disconnect the negative phase input terminal of OPm and the output terminal of Opm, the sum ILK output of the leakage currents of the m-th column of light detection pixels is accumulated in CFm, and is reflected in Voutm delivered to the processing unit 41 by the m-th read block in the first sampling phase T13;

during a first sampling period T13 included in S1, RST and all the rows and gates output low (as shown in fig. 6, SEL1 and SEL2 both output low) each switching transistor is turned off, and Voutm received by the processing unit 41 is a noise voltage signal corresponding to the sum ILK of the leakage currents of the m-th column of light detection pixels;

in the second reset period T14 included in S1, RST and each row gate line all output a high level (as shown in fig. 6, SEL1 and SEL2 both output a high level), each switching transistor is turned on, Km controls the connection between the negative phase input terminal of OPm and the output terminal of Opm to be turned on, the voltage of the cathodes of all the photodiodes in the m-th column is reset, and the voltage of the cathodes of all the photodiodes in the m-th column is set to Vcom through RLm to discharge the residual charge in the photodiodes in the m-th column. Vcom is the common electrode voltage;

included at S1 is that during the second accumulation phase T15, the switching transistors are turned off, RST and the gate lines of each row are all outputting low level (as shown in fig. 6, SEL1 and SEL2 both output low level), Km controls to turn off the connection between the negative phase input terminal of OPm and the output terminal of Opm, and the sum ILK output of the leakage currents of the m-th column of photo-detection pixels is accumulated at CFm, thereby being reflected in Voutm delivered to the processing unit 41 by the m-th read block at the second sampling phase T16;

during the second sampling period T16 included in S1, RST and the gate lines other than SEL1 all output a low level (in fig. 6, SEL2 outputs a low level), SEL1 outputs a high level, the switching transistors in the M-th column other than M1M are all turned off, M1M is turned on, Km control disconnects the connection between the negative phase input terminal of OPm and the output terminal of Opm, Voutm received by the processing unit 41 includes a noise voltage signal corresponding to the sum ILK of the leakage currents of the M-th column of light detection pixels and a voltage signal corresponding to the photocurrent accumulated by PD 1M; the processing unit 41 subtracts the mth output voltage Voutm received at T16 from the mth output voltage Voutm received at T13, so as to obtain a voltage signal corresponding to the photocurrent accumulated by the PD1m, obtain the luminance of the optical signal sensed by the PD1m according to the voltage signal, and eliminate most of the influence of ILK;

in the second detection stage S2,

in the first reset period T21 included in S2, RST and each row gate line all output a high level (as shown in fig. 6, SEL1 and SEL2 both output a high level), each switching transistor is turned on, Km controls the connection between the negative phase input terminal of OPm and the output terminal of Opm to be turned on, the voltage of the cathodes of all the photodiodes in the m-th column is reset, and the voltage of the cathodes of all the photodiodes in the m-th column is set to Vcom through RLm to discharge the residual charge in the photodiodes in the m-th column. Vcom is the common electrode voltage;

in the first accumulation phase T22 included in S2, RST and all the rows of gate lines output low level (as shown in fig. 6, SEL1 and SEL2 both output low level), each switching transistor is turned off, Km controls to disconnect the negative phase input terminal of OPm and the output terminal of Opm, the sum ILK output of the leakage currents of the m-th column of light detection pixels is accumulated in CFm, and is reflected in Voutm delivered to the processing unit 41 by the m-th read block in the first sampling phase T13;

during a first sampling period T23 included in S2, RST and all the rows and gates output a low level (as shown in fig. 6, SEL1 and SEL2 both output a low level), each switching transistor is turned off, Voutm received by the processing unit 41 is a noise voltage signal corresponding to the sum ILK of the leakage currents of the m-th column of light detection pixels;

in the second reset period T24 included in S2, RST and each row gate line all output a high level (as shown in fig. 6, SEL1 and SEL2 both output a high level), each switching transistor is turned on, Km controls the connection between the negative phase input terminal of OPm and the output terminal of Opm to be turned on, the voltage of the cathodes of all the photodiodes in the m-th column is reset, and the voltage of the cathodes of all the photodiodes in the m-th column is set to Vcom through RLm to discharge the residual charge in the photodiodes in the m-th column. Vcom is the common electrode voltage;

included at S2 is that during the second accumulation phase T25, RST and each row gate line output low (as shown in fig. 6, SEL1 and SEL2 both output low), each switching transistor is turned off, Km controls the connection between the negative phase input terminal of OPm and the output terminal of Opm to be opened, and the sum ILK output of the leakage currents of the m-th column of photo-detection pixels is accumulated in CFm to be reflected in Voutm delivered to the processing unit 41 by the m-th read block at the second sampling phase T16;

during the second sampling period T16 included in S2, RST and the gate lines other than SEL2 all output a low level (in fig. 6, SEL2 outputs a low level), SEL2 outputs a high level, the switching transistors in the M-th column other than M2M are all turned off, M2M is turned on, Km control disconnects the connection between the negative phase input terminal of OPm and the output terminal of Opm, Voutm received by the processing unit 41 includes a noise voltage signal corresponding to the sum ILK of the leakage currents of the M-th column of light detection pixels and a voltage signal corresponding to the photocurrent accumulated by PD 2M; the processing unit 41 subtracts the mth output voltage Voutm received at T26 from the mth output voltage Voutm received at T23, so as to obtain a voltage signal corresponding to the photocurrent accumulated by the PD2m, obtain the luminance of the optical signal sensed by the PD2m according to the voltage signal, and eliminate most of the influence of ILK;

by analogy, in the nth detection period, a carry different from the first detection stage and the second detection stage is carried out, in the second sampling stage included in the nth detection period, the nth gate line outputs a high level, Mnm is turned on, and in the nth detection period, the processing unit 41 may obtain the luminance of the optical signal sensed by PDnm until the luminance reading of the optical signals sensed by all the photodiodes located in the mth column is completed.

In actual operation, as shown in fig. 7, the second reset phase T14 included in S1, the second accumulation phase T15 included in S1, the second sampling phase T16 included in S1, the first reset phase T11 included in S1, the first accumulation phase T12 included in S1, and the first sampling phase T13 included in S1 may be sequentially set; the second reset phases T24 and S2 included in S2 include the second accumulation phases T25 and S2 include the second sampling phases T26 and S2 include the first reset phases T21 and S2 include the first accumulation phases T22 and S2 include the first sampling phases T23, which may be sequentially set.

The optical detection method is applied to the optical detection circuit, and the optical detection circuit comprises a processing unit, a reading unit, a reset control line, N rows of M columns of optical detection units, N rows of gating lines and M columns of reading lines; the reading unit comprises M reading modules; the reset unit comprises M reset modules; n and M are both integers greater than 1; each detection period comprises N detection time periods; n is a positive integer less than or equal to N;

The light detection method applied to the light detection circuit in the embodiment of the invention resets the light sensing modules included in the light detection units in the corresponding columns in each reset stage by controlling the time sequence of the reset control signal on the reset control line so as to release the residual charges in the light sensing modules, controls whether the connection between the light sensing modules and the corresponding column reading lines is conducted by each switch module by controlling the time sequence of the gating control signal on the corresponding row gating line, and can calculate the brightness of the light signal without the leakage current noise according to the electric signal read by the reading module by the processing unit so that the output light brightness does not have the noise generated by the leakage current.

In actual operation, during the nth detection period,

the first reset phase, the first accumulation phase, the first sampling phase, the second reset phase, the second accumulation phase and the second sampling phase may be set in sequence; that is, a noise electrical signal can be obtained by sampling at a first sampling stage, and then a second electrical signal containing the noise electrical signal and a photoelectric signal can be obtained by sampling at a second sampling stage;

The display device provided by the embodiment of the invention comprises the light detection circuit.

While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A light detection unit is characterized by comprising a switch module, a reset module, a reading module, a processing module and a light sensing module for detecting light signals;

the processing module is used for calculating the brightness of the optical signal detected by the light sensing module according to the electric signal read by the reading module;

the switch module is used for controlling the light sensing module to be connected with the reading line under the control of the gate line in a first reset stage; the reset module is used for controlling the reading line to access a reset voltage under the control of the reset control line in a first reset stage so as to reset the photosensitive module and release residual charges in the photosensitive module;

the switch module is used for controlling to disconnect the connection between the light sensing module and the reading line under the control of the gate line in a first accumulation stage; the reset module is used for controlling the reading line not to be connected with reset voltage under the control of the reset control line in a first accumulation stage;

the switch module is used for controlling to disconnect the connection between the light sensing module and the reading line under the control of the gate line in a first sampling stage; the reset module is used for controlling the reading line not to be connected with reset voltage under the control of the reset control line in a first sampling stage; the reading module is used for reading a first electric signal on the reading line in a first sampling stage;

the switch module is used for controlling the light sensing module to be connected with the reading line under the control of the gate line in a second reset stage; the reset module is used for controlling the reading line to access a reset voltage under the control of the reset control line in a second reset stage so as to reset the photosensitive module and release residual charges in the photosensitive module;

the switch module is used for controlling to disconnect the connection between the light sensing module and the reading line under the control of the gate line in a second accumulation stage; the reset module is used for controlling the reading line not to be connected with reset voltage under the control of the reset control line in a second accumulation stage;

the switch module is used for controlling the light sensing module to be connected with the reading line under the control of the gate line in the second sampling stage; the reset module is used for controlling the reading line not to be connected with reset voltage under the control of the reset control line in a second sampling stage; the reading module is used for reading a second electric signal on the reading line in a second sampling stage; the processing module is used for calculating the brightness of the optical signal detected by the light sensing module according to the first electric signal and the second electric signal in a second sampling stage.

2. The light detection unit of claim 1, wherein the reading module comprises:

3. A light detecting unit as defined in claim 2, wherein the light sensing module comprises: the anode of the photodiode is connected with the photoelectric voltage end, and the cathode of the photodiode is connected with the first end of the switch module;

4. A light detection method applied to the light detection unit according to any one of claims 1 to 3, characterized by comprising:

5. A light detection method as defined in claim 4, wherein the first reset phase, the first accumulation phase, the first sampling phase, the second reset phase, the second accumulation phase, and the second sampling phase are arranged in sequence; or,

6. A light detection circuit is characterized by comprising a processing unit, a reading unit, a reset unit, a plurality of rows and columns of light detection units, a plurality of rows of gate lines, a plurality of columns of reading lines and a reset control line; the multiple light detection units positioned on the same row are all connected with the same row gate line, and the multiple light detection units positioned on the same column are all connected with the same column reading line;

the reading unit comprises a plurality of reading modules;

the processing unit is connected with the reading module and used for calculating the brightness of the optical signal detected by the light sensing module according to the electric signal read by the reading module;

each detection period comprises N detection time periods; n is an integer greater than 1;

each switch module is used for controlling the corresponding light sensing module to be connected with the corresponding column reading line under the control of each row gate line in the first reset stage in the nth detection time period; each reset module is used for controlling a corresponding row reading line to access a reset voltage under the control of a reset control line in a first reset stage in the nth detection time period so as to reset the light sensing module and release the residual charges in the light sensing module;

each switch module is also used for controlling the disconnection between the corresponding light sensing module and the corresponding column reading line under the control of each row gate line in the first accumulation stage in the nth detection time period; each reset module is further configured to control, in a first accumulation stage and in an nth detection period, a corresponding column read line not to be connected to a reset voltage under the control of the reset control line;

each switch module is also used for controlling the disconnection between the corresponding light sensing module and the corresponding column reading line under the control of each row gate line in the first sampling stage in the nth detection time period; each reset module is further configured to control, in a first sampling stage and in an nth detection time period, a corresponding column read line not to be connected to a reset voltage under the control of the reset control line; each reading module is used for reading a first electric signal on a corresponding column reading line in a first sampling stage in an nth detection time period;

each switch module is also used for controlling the corresponding light sensing module to be connected with the corresponding column reading line under the control of each row gate line in the second reset stage in the nth detection time period; each reset module is further used for controlling a corresponding row reading line to access a reset voltage under the control of the reset control line in a second reset stage in an nth detection time period so as to reset the light sensing module and release residual charges in the light sensing module;

each switch module is also used for controlling the disconnection between the corresponding light sensing module and the corresponding column reading line under the control of each row gate line in the second accumulation stage in the nth detection time period; each reset module is further configured to control, in an nth detection period and in a second accumulation stage, the corresponding column read line not to be connected to a reset voltage under the control of the reset control line;

the switch modules included in the light detection units positioned on the nth row are used for controlling the corresponding light sensing modules to be connected with the corresponding column reading lines under the control of the nth row strobe line in the nth detection time period and the second sampling stage; each reset module is further configured to control, in a second sampling stage and in an nth detection time period, a corresponding column read line not to be connected to a reset voltage under the control of the reset control line, and each read module reads a second electrical signal on the corresponding column read line; the processing unit is used for calculating the brightness of the optical signals detected by the optical sensing modules included in the optical detection units in the nth row in a second sampling stage according to the first electric signal and the second electric signal in the nth detection time period;

n is a positive integer less than or equal to N.

7. The light detection circuit of claim 6, wherein the read module comprises:

8. A light detection method applied to the light detection circuit according to claim 6 or 7, the light detection circuit comprising a processing unit, a reading unit, a reset control line, N rows and M columns of light detection units, N rows of strobe lines, and M columns of reading lines; the reading unit comprises M reading modules; the reset unit comprises M reset modules; n and M are both integers greater than 1; each detection period comprises N detection time periods;

in the second sampling stage, under the control of the gate line of the nth row, the switch modules included in the light detection units positioned in the nth row control the corresponding light sensing modules to be connected with the corresponding row reading lines; under the control of the reset control line, each reset module controls the corresponding row reading line not to be connected with reset voltage, and each reading module reads a second electric signal on the corresponding row reading line; the processing unit calculates the brightness of the optical signal detected by the light sensing module included in the light detection unit positioned on the nth row according to the first electric signal and the second electric signal;

n is a positive integer less than or equal to N.

9. A light detection method as defined in claim 8, wherein, during an nth detection period,

10. A display device characterized by comprising the photodetection circuit according to claim 6 or 7.