CN108074527A - A kind of bilateral scanning driving circuit, method of work and display device - Google Patents

A kind of bilateral scanning driving circuit, method of work and display device Download PDF

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Publication number
CN108074527A
CN108074527A CN201611012709.9A CN201611012709A CN108074527A CN 108074527 A CN108074527 A CN 108074527A CN 201611012709 A CN201611012709 A CN 201611012709A CN 108074527 A CN108074527 A CN 108074527A
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CN
China
Prior art keywords
scan drive
drive cell
transistor
input
clock signal
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CN201611012709.9A
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Chinese (zh)
Inventor
周兴雨
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EverDisplay Optronics Shanghai Co Ltd
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EverDisplay Optronics Shanghai Co Ltd
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Priority to CN201611012709.9A priority Critical patent/CN108074527A/en
Publication of CN108074527A publication Critical patent/CN108074527A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Abstract

The invention discloses a kind of bilateral scanning driving circuits, method of work and display device, the bilateral scanning driving circuit includes cascade N number of scan drive cell, the output terminal of 1 scan drive cell of the first input end of k-th of scan drive cell and kth is connected in N number of scan drive cell, the output terminal of+1 scan drive cell of the second input terminal of k-th of scan drive cell and kth is connected, first clock signal terminal of k-th of scan drive cell is for the first clock signal of reception, the second clock signal of k-th of scan drive cell is used to receive second clock signal, the output terminal of k-th of scan drive cell is used for output drive signal.It can ensure to realize positive and negative bilateral scanning pattern in displayer.

Description

A kind of bilateral scanning driving circuit, method of work and display device
Technical field
The present embodiments relate to display technology field more particularly to a kind of bilateral scanning driving circuit, method of work and Display device.
Background technology
With the evolution of photoelectricity and semiconductor technology, also driven liquid crystal display (Liquid Crystal Display, Flourishing LCD), and in many liquid crystal displays, active matrix organic light-emitting diode display (Active- Matrix organic light emitting diode, AMOLED) because with broader visual angle, higher refresh rate and more Many advantageous characteristics such as thin size, have been applied to the various aspects of production and living.
At present, in existing displayer, using scan drive circuit according to certain scanning direction to more Scan line provides scanning signal.However, in actual application, different clients and different application application requirements turntable driving Circuit can realize different scanning directions, therefore scan drive circuit how to be made to realize that different scanning directions is urgent need to resolve A technical problem.
The content of the invention
The embodiment of the present invention provides a kind of bilateral scanning driving circuit, method of work and display device, in AMOLED Positive and negative bilateral scanning pattern is realized in display.
A kind of bilateral scanning driving circuit provided in an embodiment of the present invention, including:Cascade N number of scan drive cell, N are Positive integer more than 2;
K-th of scan drive cell includes first input end, the second input terminal, first in N number of scan drive cell Clock signal terminal, second clock signal end, the first power input, second source input terminal and output terminal;K-th of the scanning The first input end of driving unit is connected with the output terminal of -1 scan drive cell of kth, k-th of scan drive cell Second input terminal is connected with the output terminal of+1 scan drive cell of kth;The first clock letter of k-th of scan drive cell Number end is for receiving the first clock signal, and the second clock signal of k-th of scan drive cell is for receiving second clock Signal, the electricity for the first clock signal that the first clock signal terminal of k-th of scan drive cell receives described in same period Level values are different from the level value for the second clock signal that the second clock signal end receives;K-th of scan drive cell The first power input it is different from the voltage value of the input of the second source input terminal of k-th of scan drive cell;Institute The output terminal of k-th of scan drive cell is stated for output drive signal, 2≤k < N;
Wherein, the first input end of the 1st scan drive cell is swept for receiving forward direction in N number of scan drive cell Retouch driving initial signal, the second input terminal of n-th scan drive cell is for receiving reversely in N number of scan drive cell Turntable driving initial signal.
Optionally, for any scan drive cell in N number of scan drive cell, the scan drive cell includes The first transistor, second transistor, third transistor and the 4th transistor;Wherein
The grid of the first transistor is the first input end of the scan drive cell, the of the first transistor One electrode is the second source input terminal of the scan drive cell, and the second electrode of the first transistor is brilliant with described second The grid connection of body pipe;
The first electrode of the second transistor is the first clock signal terminal of the scan drive cell, and described second is brilliant The second electrode of body pipe is connected with the first electrode of the 4th transistor;
The grid of the third transistor is the second input terminal of the scan drive cell, the of the third transistor One electrode is connected with the second electrode of the first transistor, and the second electrode of the third transistor is the turntable driving list First power input of member;
The grid of 4th transistor be the scan drive cell second clock signal end, the 4th transistor Second electrode be connected with the 3rd power supply;
The junction of the second electrode of the second transistor and the first electrode of the 4th transistor is the scanning The output terminal of driving unit;And
A capacitance is connected between the grid of the second transistor and second electrode, for storing the first transistor Second electrode output level value.
Optionally, the bilateral scanning driving circuit is when carrying out forward scan driving, and the of each scan drive cell One power input input high level, the second source input terminal input low level of each scan drive cell;
When the bilateral scanning driving circuit carries out reverse scan driving, the first power supply of each scan drive cell Input terminal input low level;The second source input terminal input high level of each scan drive cell.
Optionally, the first transistor, the second transistor, the third transistor and the 4th transistor are P type field effect transistor.
Optionally, the bilateral scanning driving circuit carry out forward scan driving when described in k-th of scan drive cell Voltage value and the reverse scan of input of the first power input k-th of scan drive cell described in when driving second source The voltage value of the input of input terminal is identical, is swept for k-th described in when the bilateral scanning driving circuit carries out forward scan driving Retouch k-th of scan drive cell described in when the voltage value of the input of the second source input terminal of driving unit drives with reverse scan The first power input input voltage value it is identical.
Correspondingly, the embodiment of the present invention additionally provides a kind of method of work of bilateral scanning driving circuit, applied to above-mentioned Bilateral scanning driving circuit, including:
When the first input end of the 1st scan drive cell receives low level, the bilateral scanning driving circuit performs Forward scan drives;
When the second input terminal of n-th scan drive cell receives low level, the bilateral scanning driving circuit performs Reverse scan drives, and N is the positive integer more than 2.
Optionally, the bilateral scanning driving circuit performs forward scan driving, including:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives Low level, the second input terminal receive high level, the first clock signal terminal receives high level and second clock signal end receives During to low level, the first transistor conducting of k-th of scan drive cell, the first of k-th of scan drive cell The low level that the first electrode of transistor receives is input to the grid of the second transistor of k-th of scan drive cell, Turn on the second transistor of k-th of scan drive cell, the first clock signal termination of k-th of scan drive cell The high level received is exported from the output terminal of k-th of scan drive cell, 2≤k < N;
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive high level, the first clock signal terminal receives low level and second clock signal end receives During to high level, the first transistor cut-off of k-th of scan drive cell, the capacitance of k-th of scan drive cell The low level of middle storage is input to the grid of the second transistor of k-th of scan drive cell, conducting k-th of the scanning The second transistor of driving unit, the low level that the first clock signal terminal of k-th of scan drive cell receives is from institute State the output terminal output of k-th of scan drive cell;
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive low level, the first clock signal terminal receives high level and second clock signal end receives During to low level, the third transistor conducting of k-th of scan drive cell, the 3rd of k-th of scan drive cell the The high level that the second electrode of transistor receives is input to the grid of the second transistor of k-th of scan drive cell, The second transistor cut-off of k-th of scan drive cell, the second clock signal termination of k-th of scan drive cell 4th transistor of low level conducting k-th of the scan drive cell received, the 4th of k-th of scan drive cell the The high level that the second electrode of transistor receives is exported from the output terminal of k-th of scan drive cell;
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive high level, the first clock signal terminal receives low level and second clock signal end receives During to high level, the first transistor cut-off of k-th of scan drive cell, the capacitance of k-th of scan drive cell The high level of middle storage is input to the grid of the second transistor of k-th of scan drive cell, k-th of turntable driving The second transistor cut-off of unit, the output terminal of k-th of scan drive cell keep output high level.
Optionally, do not received after the 4th moment and in the second input terminal of k-th of scan drive cell Before low level, the output terminal of k-th of scan drive cell keeps output high level.
Optionally, the bilateral scanning driving circuit performs reverse scan driving, including:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive low level, the first clock signal terminal receives high level and second clock signal end receives During to low level, the third transistor conducting of k-th of scan drive cell, the 3rd of k-th of scan drive cell the The low level that the second electrode of transistor receives is input to the grid of the second transistor of k-th of scan drive cell, Turn on the second transistor of k-th of scan drive cell, the first clock signal termination of k-th of scan drive cell The high level received is exported from the output terminal of k-th of scan drive cell, 2≤k < N;
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive high level, the first clock signal terminal receives low level and second clock signal end receives During to high level, the third transistor cut-off of k-th of scan drive cell, the capacitance of k-th of scan drive cell The low level of middle storage is input to the grid of the second transistor of k-th of scan drive cell, conducting k-th of the scanning The second transistor of driving unit, the low level that the first clock signal terminal of k-th of scan drive cell receives is from institute State the output terminal output of k-th of scan drive cell;
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives Low level, the second input terminal receive high level, the first clock signal terminal receives high level and second clock signal end receives During to low level, the first transistor conducting of k-th of scan drive cell, the first of k-th of scan drive cell The high level that the first electrode of transistor receives is input to the grid of the second transistor of k-th of scan drive cell, The second transistor cut-off of k-th of scan drive cell, the second clock signal termination of k-th of scan drive cell 4th transistor of low level conducting k-th of the scan drive cell received, the 4th of k-th of scan drive cell the The high level that the second electrode of transistor receives is exported from the output terminal of k-th of scan drive cell;
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives High level, the second input terminal receive high level, the first clock signal terminal receives low level and second clock signal end receives During to high level, the third transistor cut-off of k-th of scan drive cell, the capacitance of k-th of scan drive cell The high level of middle storage is input to the grid of the second transistor of k-th of scan drive cell, k-th of turntable driving The second transistor cut-off of unit, the output terminal of k-th of scan drive cell keep output high level.
Optionally, do not received after the 4th moment and in the first input end of k-th of scan drive cell Before low level, the output terminal of k-th of scan drive cell keeps output high level.
Optionally, after the 1st scan drive cell performs reverse scan driving, the 1st turntable driving The first input end of unit receives low level;
After the execution forward scan driving of the n-th scan drive cell, the n-th scan drive cell Second input terminal receives low level.
Correspondingly, the embodiment of the present invention additionally provides a kind of display device, including above-mentioned bilateral scanning driving circuit.
Bilateral scanning driving circuit provided in an embodiment of the present invention, including cascade N number of scan drive cell, N number of scanning The output terminal of -1 scan drive cell of the first input end of k-th of scan drive cell and kth is connected in driving unit, kth The output terminal of+1 scan drive cell of the second input terminal and kth of a scan drive cell is connected, k-th of scan drive cell The first clock signal terminal for receiving the first clock signal, the second clock signal of k-th of scan drive cell is for receiving Second clock signal, the first clock signal that the first clock signal terminal of k-th of scan drive cell receives in same period Level value it is different from the level value for the second clock signal that second clock signal end receives, the first power input and second electricity The voltage value of the input of source input terminal is different, and the output terminal of k-th of scan drive cell is used for output drive signal, wherein, it is N number of The first input end of the 1st scan drive cell is N number of to sweep for receiving forward scan driving initial signal in scan drive cell The second input terminal of n-th scan drive cell in driving unit is retouched for receiving reverse scan driving initial signal.Pass through the 1st The first input end of a scan drive cell receives forward scan driving initial signal, so as to drive the 1st scan drive cell Operation, when the 1st scan drive cell output drive signal, can also drive the 2nd scan drive cell operation, and so on, Realize the forward scan driving of the bilateral scanning driving circuit, when reverse scan drives, order is on the contrary, thereby may be ensured that Positive and negative bilateral scanning pattern is realized in displayer.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly introduced, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for this For the those of ordinary skill in field, without creative efforts, other are can also be obtained according to these attached drawings Attached drawing.
Fig. 1 is a kind of structure diagram of bilateral scanning driving circuit provided in an embodiment of the present invention;
Fig. 2 is a kind of structure diagram of bilateral scanning driving circuit provided in an embodiment of the present invention;
Fig. 3 is a kind of structure diagram of scan drive cell provided in an embodiment of the present invention;
Fig. 4 is a kind of flow diagram of the method for work of bilateral scanning driving circuit provided in an embodiment of the present invention;
Fig. 5 a to Fig. 5 d are a kind of flow diagram for performing forward scan driving provided in an embodiment of the present invention;
Fig. 6 a to Fig. 6 d are a kind of flow diagram for performing reverse scan driving provided in an embodiment of the present invention.
Specific embodiment
In order to make the object, technical solutions and advantages of the present invention clearer, the present invention is made below in conjunction with attached drawing into It is described in detail to one step, it is clear that described embodiment is only the implementation of part of the embodiment of the present invention rather than whole Example.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without making creative work All other embodiment, belongs to the scope of protection of the invention.
In embodiments of the present invention, the first transistor, second transistor, third transistor, the 4th transistor are imitated for p-type field Transistor is answered, optionally, in practical application, it is also contemplated that n type field effect transistor.Two-way in the embodiment of the present invention is swept It retouches driving circuit and can be applied to AMOLED, the embodiment of the present invention is only example effect, this is not specifically limited.
Fig. 1 illustratively shows a kind of structure of bilateral scanning driving circuit provided in an embodiment of the present invention, such as Fig. 1 institutes Show, which includes cascade N number of scan drive cell, and each scan drive cell includes the first input End, the second input terminal, the first clock signal terminal, second clock signal end, the first power input, second source input terminal and defeated Outlet, N are the positive integer more than 2.
In order to clearly describe the connection relation of each scan drive cell, Fig. 2 shows kth -1, k-th of and Connection relation between kth+1, wherein, 2≤k < N.As shown in Fig. 2, the first input end and of k-th of scan drive cell The output terminal connection of k-1 scan drive cell, the second input terminal and+1 turntable driving of kth of k-th of scan drive cell The output terminal connection of unit, the first clock signal terminal of k-th of scan drive cell is for receiving the first clock signal, k-th The second clock signal of scan drive cell is for receiving second clock signal, k-th of scan drive cell in same period The second clock signal that receives of the first clock signal terminal level value and the second clock signal end of the first clock signal that receive Level value it is different, the second of the first power input of above-mentioned k-th of scan drive cell and k-th of scan drive cell is electric The voltage value of the input of source input terminal is different, and the output terminal of k-th of scan drive cell is used for output drive signal.
The first input end of the 1st scan drive cell drives for receiving forward scan in above-mentioned N number of scan drive cell Dynamic initial signal, the second input terminal of n-th scan drive cell drive initial signal for receiving reverse scan, that is, It says, the first input end of the 1st scan drive cell and the second input terminal of n-th scan drive cell are not scanned with others Driving unit is connected.The input of the first power input of above-mentioned k-th of scan drive cell when forward scan drives The voltage value phase of voltage value input of the second source input terminal of above-mentioned k-th of scan drive cell when being driven with reverse scan Together, when forward scan drives the voltage value of the input of the second source input terminal of above-mentioned k-th of scan drive cell with reversely The voltage value of the input of the first power input of above-mentioned k-th of scan drive cell is identical during turntable driving.For example, forward direction is swept When retouching driving, the voltage value of the input of the first power input of k-th of scan drive cell is high level, then reverse scan drives When, the voltage value of the input of the second source input terminal of k-th of scan drive cell is high level.If forward scan drives, The voltage value of the second source input of k-th of scan drive cell is low level, then when reverse scan drives, k-th of scanning is driven The voltage value of first power input of moving cell is low level.
Fig. 3 shows the structure of each scan drive cell, as shown in figure 3, appointing in above-mentioned N number of scan drive cell One scan drive cell, the scan drive cell include the first transistor, second transistor, third transistor and the 4th crystal Pipe.
Wherein, the grid of the first transistor be scan drive cell first input end, the first electrode of the first transistor For the second source input terminal of scan drive cell, the second electrode of the first transistor and the grid of second transistor connect.The The first electrode of two-transistor is the first clock signal terminal of scan drive cell, and the second electrode of second transistor is brilliant with the 4th The first electrode connection of body pipe.The grid of third transistor is the second input terminal of scan drive cell, the of third transistor The second electrode of one electrode and the first transistor connects, and the second electrode of third transistor is the first power supply of scan drive cell Input terminal.The grid of 4th transistor be scan drive cell second clock signal end, the second electrode of the 4th transistor with 3rd power supply connects.The junction of the second electrode of second transistor and the first electrode of the 4th transistor is scan drive cell Output terminal.A capacitance is connected between the grid of second transistor and second electrode, for storing the second of the first transistor The level value of electrode output.
In embodiments of the present invention, bilateral scanning driving circuit is when carrying out forward scan driving, each turntable driving list First power input input high level of member, the second source input terminal input low level of each scan drive cell.Into When row reverse scan drives, the first power input input low level of each scan drive cell, each scan drive cell Second source input terminal input high level.
The bilateral scanning driving circuit that above-described embodiment provides, including cascade N number of scan drive cell, N number of scanning is driven The output terminal of -1 scan drive cell of the first input end of k-th of scan drive cell and kth is connected in moving cell, k-th The output terminal of+1 scan drive cell of the second input terminal and kth of scan drive cell is connected, k-th scan drive cell First clock signal terminal is for receiving the first clock signal, and the second clock signal of k-th of scan drive cell is for receiving the Two clock signals, the first clock signal that the first clock signal terminal of k-th of scan drive cell receives in same period Level value is different from the level value for the second clock signal that second clock signal end receives, the first power input and second source The voltage value of the input of input terminal is different, and the output terminal of k-th of scan drive cell is used for output drive signal, wherein, it is N number of to sweep The first input end of the 1st scan drive cell in driving unit is retouched for receiving forward scan driving initial signal, N number of scanning The second input terminal of n-th scan drive cell drives initial signal for receiving reverse scan in driving unit.Pass through the 1st The first input end of scan drive cell receives forward scan driving initial signal, so as to drive the 1st scan drive cell fortune Row, when the 1st scan drive cell output drive signal, can also drive the 2nd scan drive cell operation, and so on, it is real The now forward scan driving of the bilateral scanning driving circuit, when reverse scan drives, order is on the contrary, thereby may be ensured that Positive and negative bilateral scanning pattern is realized in displayer.
Fig. 4 shows that the present invention implements a kind of stream of the method for work applied to above-mentioned bilateral scanning driving circuit provided Journey, the method for work can be performed by above-mentioned bilateral scanning driving circuit.
As shown in figure 4, the flow specific steps include:
Step 401, when the first input end of the 1st scan drive cell receives low level, the bilateral scanning Driving circuit performs forward scan driving.
In step 401, which performs forward scan driving, is specially:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives low electricity It is flat, the second input terminal receives high level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the first transistor conducting of k-th of scan drive cell, the first of the first transistor of k-th of scan drive cell The low level that electrode receives is input to the grid of the second transistor of k-th of scan drive cell, turns on k-th of turntable driving The second transistor of unit, the high level that the first clock signal terminal of k-th of scan drive cell receives drive from k-th of scanning The output terminal output of moving cell.
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the first transistor of k-th of scan drive cell ends, the low electricity stored in the capacitance of k-th of scan drive cell The grid of the flat second transistor for being input to k-th of scan drive cell turns on the second crystal of k-th of scan drive cell Pipe, the low level that the first clock signal terminal of k-th of scan drive cell receives is from the output terminal of k-th of scan drive cell Output.
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It is flat, the second input terminal receives low level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the third transistor conducting of k-th of scan drive cell, the second of the third transistor of k-th of scan drive cell The high level that electrode receives is input to the grid of the second transistor of k-th of scan drive cell, k-th of scan drive cell Second transistor cut-off, the low level that the second clock signal end of k-th of scan drive cell receives turns on k-th of scanning 4th transistor of driving unit, the high level that the second electrode of the 4th transistor of k-th of scan drive cell receives is from kth The output terminal output of a scan drive cell.
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the first transistor of k-th of scan drive cell ends, the height electricity stored in the capacitance of k-th of scan drive cell The grid of the flat second transistor for being input to k-th of scan drive cell, the second transistor of k-th of scan drive cell are cut Only, the output terminal of k-th of scan drive cell keeps output high level.
After the 4th moment and before the second input terminal of k-th of scan drive cell does not receive low level, k-th The output terminal of scan drive cell keeps output high level.When k-th scan drive cell performs forward scan driving, this Second input terminal of k scan drive cell can receive low level, receive low level subsequent time, k-th of scanning The output terminal output low level of driving unit.
Above-mentioned first electrode is source electrode, and second electrode is drain electrode or first electrode is drain electrode, and second electrode is source electrode, tool Body is specifically distinguished when applying.
In order to preferably explain the flow for performing forward scan driving, an embodiment of the present invention provides such as Fig. 5 a to Fig. 5 d institutes The bilateral scanning driving circuit shown performs the flow of forward scan driving.
In embodiments of the present invention, the first transistor M1, second transistor M2, third transistor M3, the 4th is brilliant Body pipe is M4, and capacitance C1, the first power supply is down, and second source up, the 3rd power supply is VDD (high level).First clock Signal is ckv1, and second clock signal is ckv2.Under Snm1 represents that the output signal of upper level scan drive cell, Snp1 represent The output signal of level-one scan drive cell, Sn represent the output signal when previous stage scan drive cell.Down is VDD, up For VEE (low level).
As shown in Figure 5 a, the first moment, Snp1 are high level, and M3 cut-offs, Snm1 is low level, and M1 is turned on, the low electricity of up It is flat to enter in capacitance C1, M2 is turned at this time, and the high level of ckv1 is written to Sn, and ckv2 is low level, and M4 is turned on, the height of VDD Level is also written to Sn, Sn input high levels.
As shown in Figure 5 b, the second moment, Snp1 are high level, and M3 cut-offs, Snm1 is high level, and M1 ends, in capacitance C1 Low level M2 is turned on, the low level of ckv1 is written to Sn, and ckv2 is high level, M4 cut-offs, Sn output low levels.
As shown in Figure 5 c, the 3rd moment, Snp1 are low level, and M3 conductings, Snm1 is high level, and M1 ends, the height of down Level is entered in capacitance C1, and M2 ends at this time, and ckv2 is low level, and M4 conductings, high level the write-in Sn, Sn of VDD export high Level.
As fig 5d, the 4th moment, Snp1 are high level, and M3 cut-offs, Snm1 is high level, and M1 ends, in capacitance C1 High level M2 is ended, ckv2 is high level, and M4 cut-offs, Sn persistently exports high level.
Step 402, when the second input terminal of the n-th scan drive cell receives low level, the bilateral scanning Driving circuit performs reverse scan driving.
In step 402, which performs reverse scan driving, is specially:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It is flat, the second input terminal receives low level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the third transistor conducting of k-th of scan drive cell, the second of the third transistor of k-th of scan drive cell The low level that electrode receives is input to the grid of the second transistor of k-th of scan drive cell, turns on k-th of turntable driving The second transistor of unit, the high level that the first clock signal terminal of k-th of scan drive cell receives drive from k-th of scanning The output terminal output of moving cell.
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the third transistor of k-th of scan drive cell is ended, the low electricity stored in the capacitance of k-th of scan drive cell The grid of the flat second transistor for being input to k-th of scan drive cell turns on the second crystal of k-th of scan drive cell Pipe, the low level that the first clock signal terminal of k-th of scan drive cell receives is from the output terminal of k-th of scan drive cell Output.
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives low electricity It is flat, the second input terminal receives high level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the first transistor conducting of k-th of scan drive cell, the first of the first transistor of k-th of scan drive cell The high level that electrode receives is input to the grid of the second transistor of k-th of scan drive cell, k-th of scan drive cell Second transistor cut-off, the low level that the second clock signal end of k-th of scan drive cell receives turns on k-th of scanning 4th transistor of driving unit, the high level that the second electrode of the 4th transistor of k-th of scan drive cell receives is from kth The output terminal output of a scan drive cell.
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the third transistor of k-th of scan drive cell is ended, the height electricity stored in the capacitance of k-th of scan drive cell The grid of the flat second transistor for being input to k-th of scan drive cell, the second transistor of k-th of scan drive cell are cut Only, the output terminal of k-th of scan drive cell keeps output high level.
After the 4th moment and before the first input end of k-th of scan drive cell does not receive low level, k-th The output terminal of scan drive cell keeps output high level.
Above-mentioned first electrode is source electrode, and second electrode is drain electrode or first electrode is drain electrode, and second electrode is source electrode, tool Body is specifically distinguished when applying.
In order to preferably explain the flow for performing reverse scan driving, an embodiment of the present invention provides such as Fig. 6 a to Fig. 6 d institutes The bilateral scanning driving circuit shown performs the flow of reverse scan driving.
In embodiments of the present invention, the first transistor M1, second transistor M2, third transistor M3, the 4th is brilliant Body pipe is M4, and capacitance C1, the first power supply is down, and second source up, the 3rd power supply is VDD.First clock signal is Ckv1, second clock signal are ckv2.Snm1 represents the output signal of upper level scan drive cell, and Snp1 represents that next stage is swept The output signal of driving unit is retouched, Sn represents the output signal when previous stage scan drive cell.Down is VEE, up VDD.
As shown in Figure 6 a, the first moment, Snm1 are high level, and M1 cut-offs, Snp1 is low level, and M3 conductings, down's is low Level is entered in capacitance C1, turns on M2 at this time, and the high level of ckv1 is written to Sn, and ckv2 is low level, and M4 is turned on, VDD's High level is also written to Sn, Sn input high levels.
As shown in Figure 6 b, the second moment, Snm1 are high level, and M1 cut-offs, Snp1 is high level, and M3 ends, in capacitance C1 Low level M2 is turned on, the low level of ckv1 is written to Sn, and ckv2 is high level, M4 cut-offs, Sn output low levels.
As fig. 6 c, the 3rd moment, Snm1 are low level, and M1 conductings, Snp1 is high level, and M3 cut-offs, up's is high electric Flat to enter in capacitance C1, M2 ends at this time, and ckv2 is low level, and M4 conductings, high level the write-in Sn, Sn of VDD export high electricity It is flat.
As shown in fig 6d, the 4th moment, Snm1 are high level, and M1 cut-offs, Snp1 is high level, and M3 ends, in capacitance C1 High level M2 is ended, ckv2 is high level, and M4 cut-offs, Sn persistently exports high level.
Above-mentioned bilateral scanning driving circuit performs reverse scan when performing turntable driving, in the 1st scan drive cell After driving, the first input end of the 1st scan drive cell receives low level, n-th scan drive cell execution just After turntable driving, the second input terminal of n-th scan drive cell receives low level, for switching positive and negative turntable driving mould Formula.
Based on identical technical concept, the embodiment of the present invention additionally provides a kind of display device, including above-mentioned bilateral scanning Driving circuit, concrete structure are described in above-described embodiment, repeated no more.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know basic creation Property concept, then can make these embodiments other change and modification.So appended claims be intended to be construed to include it is excellent It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art God and scope.In this way, if these modifications and changes of the present invention belongs to the scope of the claims in the present invention and its equivalent technologies Within, then the present invention is also intended to comprising including these modification and variations.

Claims (12)

1. a kind of bilateral scanning driving circuit, which is characterized in that including:Cascade N number of scan drive cell, N is more than 2 just Integer;
K-th of scan drive cell includes first input end, the second input terminal, the first clock in N number of scan drive cell Signal end, second clock signal end, the first power input, second source input terminal and output terminal;K-th of turntable driving The first input end of unit is connected with the output terminal of -1 scan drive cell of kth, and the second of k-th of scan drive cell Input terminal is connected with the output terminal of+1 scan drive cell of kth;First clock signal terminal of k-th of scan drive cell For receiving the first clock signal, the second clock signal of k-th of scan drive cell is used to receive second clock signal, The level value for the first clock signal that first clock signal terminal of k-th scan drive cell described in same period receives with The level value for the second clock signal that the second clock signal end receives is different;The first of k-th of scan drive cell Power input is different from the voltage value of the input of the second source input terminal of k-th of scan drive cell;Described k-th The output terminal of scan drive cell is used for output drive signal, 2≤k < N;
Wherein, the first input end of the 1st scan drive cell drives for receiving forward scan in N number of scan drive cell Dynamic initial signal, the second input terminal of n-th scan drive cell is for receiving reverse scan in N number of scan drive cell Drive initial signal.
2. bilateral scanning driving circuit as described in claim 1, which is characterized in that in N number of scan drive cell Any scan drive cell, it is brilliant that the scan drive cell includes the first transistor, second transistor, third transistor and the 4th Body pipe;Wherein
The grid of the first transistor is the first input end of the scan drive cell, and the first of the first transistor is electric The second source input terminal of extremely described scan drive cell, the second electrode of the first transistor and the second transistor Grid connection;
The first electrode of the second transistor be the scan drive cell the first clock signal terminal, the second transistor Second electrode be connected with the first electrode of the 4th transistor;
The grid of the third transistor is the second input terminal of the scan drive cell, and the first of the third transistor is electric Pole is connected with the second electrode of the first transistor, and the second electrode of the third transistor is the scan drive cell First power input;
The grid of 4th transistor is the second clock signal end of the scan drive cell, the of the 4th transistor Two electrodes are connected with the 3rd power supply;
The junction of the second electrode of the second transistor and the first electrode of the 4th transistor is the turntable driving The output terminal of unit;And
A capacitance is connected between the grid of the second transistor and second electrode, for storing the of the first transistor The level value of two electrodes output.
3. bilateral scanning driving circuit as claimed in claim 2, which is characterized in that the first transistor, second crystalline substance Body pipe, the third transistor and the 4th transistor are p type field effect transistor.
4. bilateral scanning driving circuit as described in claim 1, which is characterized in that the bilateral scanning driving circuit is carrying out When forward scan drives, the first power input input high level of each scan drive cell, each turntable driving list The second source input terminal input low level of member;
When the bilateral scanning driving circuit carries out reverse scan driving, the first power input of each scan drive cell Hold input low level, the second source input terminal input high level of each scan drive cell.
5. such as Claims 1-4 any one of them bilateral scanning driving circuit, which is characterized in that driven in the bilateral scanning The voltage value of the input of first power input of k-th of scan drive cell described in when dynamic circuit carries out forward scan driving with The voltage value of the input of the second source input terminal of k-th of scan drive cell is identical described in when reverse scan drives, described The input of the second source input terminal of k-th of scan drive cell described in during the progress forward scan driving of bilateral scanning driving circuit Voltage value input of the first power input of k-th of scan drive cell described in when being driven with reverse scan voltage value phase Together.
6. a kind of method of work of bilateral scanning driving circuit drives electricity applied to bilateral scanning as claimed in claim 2 or claim 3 Road, which is characterized in that including:
When the first input end of the 1st scan drive cell receives low level, the bilateral scanning driving circuit performs forward direction Turntable driving;
When the second input terminal of n-th scan drive cell receives low level, the bilateral scanning driving circuit performs reversed Turntable driving, N are the positive integer more than 2.
7. method of work as claimed in claim 6, which is characterized in that the bilateral scanning driving circuit performs forward scan and drives It is dynamic, including:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives low electricity It is flat, the second input terminal receives high level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the first transistor conducting of k-th of scan drive cell, the first crystal of k-th of scan drive cell The low level that the first electrode of pipe receives is input to the grid of the second transistor of k-th of scan drive cell, conducting The second transistor of k-th of scan drive cell, the first clock signal terminal of k-th of scan drive cell receive High level exported from the output terminal of k-th of scan drive cell, 2≤k < N;
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the first transistor of k-th of scan drive cell ends, and is deposited in the capacitance of k-th of scan drive cell The low level of storage is input to the grid of the second transistor of k-th of scan drive cell, turns on k-th of turntable driving The second transistor of unit, the low level that the first clock signal terminal of k-th of scan drive cell receives is from the kth The output terminal output of a scan drive cell;
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It is flat, the second input terminal receives low level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the third transistor conducting of k-th of scan drive cell, the 3rd crystal of k-th of scan drive cell The high level that the second electrode of pipe receives is input to the grid of the second transistor of k-th of scan drive cell, described The second transistor cut-off of k-th of scan drive cell, the second clock signal end of k-th of scan drive cell receive Low level turn on the 4th transistor of k-th of scan drive cell, the 4th crystal of k-th of scan drive cell The high level that the second electrode of pipe receives is exported from the output terminal of k-th of scan drive cell;
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the first transistor of k-th of scan drive cell ends, and is deposited in the capacitance of k-th of scan drive cell The high level of storage is input to the grid of the second transistor of k-th of scan drive cell, k-th of scan drive cell Second transistor cut-off, the output terminal of k-th of scan drive cell keeps output high level.
8. method of work as claimed in claim 7, which is characterized in that swept after the 4th moment and at described k-th Retouch driving unit the second input terminal do not receive low level before, the output terminal of k-th of scan drive cell keeps output High level.
9. method of work as claimed in claim 6, which is characterized in that the bilateral scanning driving circuit performs reverse scan and drives It is dynamic, including:
First moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It is flat, the second input terminal receives low level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the third transistor conducting of k-th of scan drive cell, the 3rd crystal of k-th of scan drive cell The low level that the second electrode of pipe receives is input to the grid of the second transistor of k-th of scan drive cell, conducting The second transistor of k-th of scan drive cell, the first clock signal terminal of k-th of scan drive cell receive High level exported from the output terminal of k-th of scan drive cell, 2≤k < N;
Second moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the third transistor of k-th of scan drive cell is ended, and is deposited in the capacitance of k-th of scan drive cell The low level of storage is input to the grid of the second transistor of k-th of scan drive cell, turns on k-th of turntable driving The second transistor of unit, the low level that the first clock signal terminal of k-th of scan drive cell receives is from the kth The output terminal output of a scan drive cell;
3rd moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives low electricity It is flat, the second input terminal receives high level, the first clock signal terminal receives high level and second clock signal end receive it is low During level, the first transistor conducting of k-th of scan drive cell, the first crystal of k-th of scan drive cell The high level that the first electrode of pipe receives is input to the grid of the second transistor of k-th of scan drive cell, described The second transistor cut-off of k-th of scan drive cell, the second clock signal end of k-th of scan drive cell receive Low level turn on the 4th transistor of k-th of scan drive cell, the 4th crystal of k-th of scan drive cell The high level that the second electrode of pipe receives is exported from the output terminal of k-th of scan drive cell;
4th moment, when the first input end of k-th of scan drive cell in N number of scan drive cell receives high electricity It puts down, the second input terminal receives high level, the first clock signal terminal receives low level and second clock signal end receives height During level, the third transistor of k-th of scan drive cell is ended, and is deposited in the capacitance of k-th of scan drive cell The high level of storage is input to the grid of the second transistor of k-th of scan drive cell, k-th of scan drive cell Second transistor cut-off, the output terminal of k-th of scan drive cell keeps output high level.
10. method of work as claimed in claim 9, which is characterized in that swept after the 4th moment and at described k-th Retouch driving unit first input end do not receive low level before, the output terminal of k-th of scan drive cell keeps output High level.
11. the method for work as described in claim 7 or 9, which is characterized in that performed in the 1st scan drive cell anti- After turntable driving, the first input end of the 1st scan drive cell receives low level;
After the execution forward scan driving of the n-th scan drive cell, the second of the n-th scan drive cell Input terminal receives low level.
12. a kind of display device, which is characterized in that including bilateral scanning driving electricity such as described in any one of claim 1 to 5 Road.
CN201611012709.9A 2016-11-17 2016-11-17 A kind of bilateral scanning driving circuit, method of work and display device Pending CN108074527A (en)

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Application publication date: 20180525