CN108063117A - Interconnection structure and forming method thereof - Google Patents

Interconnection structure and forming method thereof Download PDF

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Publication number
CN108063117A
CN108063117A CN201610986757.1A CN201610986757A CN108063117A CN 108063117 A CN108063117 A CN 108063117A CN 201610986757 A CN201610986757 A CN 201610986757A CN 108063117 A CN108063117 A CN 108063117A
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tan layers
barrier layer
interconnection structure
tan
layer
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CN108063117B (en
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邓浩
谷勋
周峰
杨小军
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832—Multiple layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H01L23/53295—Stacked insulating layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A kind of interconnection structure and forming method thereof, wherein forming method includes：Substrate is provided；Dielectric layer is formed over the substrate；Opening is formed in the dielectric layer；Barrier layer is formed in the open bottom and side wall, the barrier layer is the barrier layer of Si doping；It is formed in bottom and side wall in the opening on barrier layer and fills conductive material, form interconnection structure.The barrier layer formed in open bottom described in technical solution of the present invention and side wall, the barrier layer are the barrier layer of Si doping；It is formed in afterwards in the opening on the barrier layer and forms interconnection structure.Due in barrier layer doped with Si, Si atoms can be with the conductive material atomic reaction bonding of formation interconnection structure, so the blocking capability of Si doping blocking layers is stronger, the diffusion of conductive material atom can effectively be inhibited, the appearance of dielectric layer time breakdown phenomenon is advantageously reduced, so as to be conducive to improve the reliability for forming interconnection structure.

Description

Interconnection structure and forming method thereof
Technical field
The present invention relates to field of semiconductor manufacture, more particularly to a kind of interconnection structure and forming method thereof.
Background technology
With the continuous development of ic manufacturing technology, requirement of the people to the integrated level and performance of integrated circuit becomes It is higher and higher.In order to improve integrated level, cost is reduced, the critical size of component constantly becomes smaller, the circuit of IC interior Density is increasing, and this development is so that crystal column surface can not provide enough areas to make required interconnection line.
In order to meet needed for the interconnection line after critical dimension reduction, different metal layer or metal layer and substrate at present Conducting is realized by interconnection structure.With the propulsion of technology node, the size of interconnection structure also becomes less and less.
With the diminution of interconnection structure size, the reliability that the prior art forms interconnection structure has much room for improvement.
The content of the invention
The present invention solves the problems, such as to be to provide a kind of interconnection structure and forming method thereof, to improve the reliable of interconnection structure Property.
To solve the above problems, the present invention provides a kind of forming method of interconnection structure, including：
Substrate is provided；Dielectric layer is formed over the substrate；Opening is formed in the dielectric layer；In the open bottom With form barrier layer on side wall, the barrier layer is the barrier layer of Si doping；The opening on barrier layer is formed in bottom and side wall Interior filling conductive material forms interconnection structure.
Optionally, the step of forming the barrier layer includes：The barrier layer is formed using atom layer deposition process.
Optionally, in the step of forming the barrier layer, the material on the barrier layer includes the TaN of Si doping.
Optionally, the barrier layer is laminated construction；The step of forming the barrier layer includes：In the open bottom and The first Si is formed on side wall and adulterates TaN layers；TaN layers are formed on the first Si doping TaN layers；It is formed on TaN layers described 2nd Si adulterates TaN layers.
Optionally, formed in the step of the first Si adulterates TaN layers, by atomic quantity percentage, the first Si mixes The doping concentration of Si is in the range of 5% to 15% in TaN layers miscellaneous；It is formed in the step of the 2nd Si adulterates TaN layers, by atom Number percent, the 2nd Si adulterate the doping concentration of Si in TaN layers in the range of 5% to 15%.
Optionally, formed in the step of the first Si adulterates TaN layers, described TaN layers of side is directed toward along the dielectric layer Upwards, the doping concentration of Si is gradually reduced；It is formed in the step of the 2nd Si adulterates TaN layers, described in described TaN layers direction On the direction of opening, the doping concentration of Si gradually increases.
Optionally, forming the step of the first Si adulterates TaN layers includes：First mix Si materials at least once and sink Product, wherein, first includes the step of mixing Si materials deposition：In the first material layer containing Ta of the open bottom and deposited on sidewalls； The first material layer containing Si is deposited in first material layer containing Ta；The first material containing N is deposited in first material layer containing Si The bed of material；Wherein, the step of depositing the first material layer containing Si includes：The first reaction gas containing Si is passed through, described first reacts containing Si Gas includes silane；Remove first reaction gas containing Si；Forming the step of the 2nd Si adulterates TaN layers includes：It carries out Second mixes Si materials deposition at least once, wherein, second includes the step of mixing Si materials deposition：Is deposited on TaN layers described Two material layers containing Ta；The second material layer containing Si is deposited in second material layer containing Ta；In second material layer containing Si Deposit the second material layer containing N；Wherein, the step of depositing the second material layer containing Si includes：The second reaction gas containing Si is passed through, it is described Second reaction gas containing Si includes silane；Remove second reaction gas containing Si.
Optionally, carry out multiple first mix Si materials deposition the step of include：It is passed through silane in the first reaction gas containing Si Flow gradually reduce；Carry out multiple second mix Si materials deposition the step of include：It is passed through silane in the second reaction gas containing Si Flow gradually increase；Include alternatively, carrying out multiple first and mixing the step of Si materials deposit：It is passed through the burst length of silane gradually It reduces；Carry out multiple second mix Si materials deposition the step of include：Being passed through the burst length of silane gradually increases.
Optionally, in the step of forming the barrier layer, the first Si adulterates TaN layers of thickness, thickness TaN layers described Degree and the 2nd Si adulterate the ratio of TaN layers of thickness 1:1:1 to 2:1:In the range of 2.
Optionally, formed in the step of the first Si adulterates TaN layers, the thickness that the first Si adulterates TaN layers existsIt arrivesIn the range of；It is formed in the step of TaN layers described, thickness TaN layers described existsIt arrivesIn the range of；It is formed In the step of 2nd Si adulterates TaN layers, the thickness that the 2nd Si adulterates TaN layers existsIt arrivesIn the range of.
Optionally, in the step of forming dielectric layer, the material of the dielectric layer is ultra low-K material.
Optionally, the step of forming the interconnection structure includes：It is formed in the opening on barrier layer and fills out to bottom and side wall Conductive material is filled, forms conductive layer；The barrier layer and the conductive layer are made annealing treatment, form interconnection structure.
Optionally, in the step of forming interconnection structure, the conductive material is Cu.
Correspondingly, the present invention also provides a kind of interconnection structure, including：
Substrate；Dielectric layer on the substrate；Interconnection structure in the dielectric layer；Positioned at the mutual connection Barrier layer between structure and the dielectric layer, the barrier layer are the barrier layer of Si doping.
Optionally, the material on the barrier layer is the TaN of Si doping.
Optionally, the barrier layer is laminated construction；The barrier layer includes：Positioned at the dielectric layer and the mutual connection The first Si between structure adulterates TaN layers；The TaN layers of TaN layers between the interconnection structure are adulterated positioned at the first Si；It is located at Described TaN layers the 2nd Si between the interconnection structure adulterates TaN layers.
Optionally, the first Si adulterates TaN layers of thickness, thickness TaN layers described and the 2nd Si doping TaN The ratio of the thickness of layer is 1:1:1 to 2:1:In the range of 2.
Optionally, it is directed toward along the dielectric layer on described TaN layers of direction, the doping concentration of Si is gradually reduced；Described in TaN layers on the direction of the interconnection structure, the doping concentration of Si gradually subtracts increase.
Optionally, by atomic quantity percentage, the first Si adulterates the doping concentration of Si in TaN layers 5% to 15% In the range of；
By atomic quantity percentage, the 2nd Si adulterates the doping concentration of Si in TaN layers in the range of 5% to 15%.
Optionally, the thickness of TaN layers of the first Si doping existsIt arrivesIn the range of；Thickness TaN layers described existsIt arrivesIn the range of；The thickness that 2nd Si adulterates TaN layers existsIt arrivesIn the range of.
Compared with prior art, technical scheme has the following advantages：
The barrier layer formed in open bottom described in technical solution of the present invention and side wall, the barrier layer are Si doping Barrier layer；It is formed in afterwards in the opening on the barrier layer and forms interconnection structure.Due in barrier layer doped with Si, Si atoms It can be with forming the conductive material atomic reaction bonding of interconnection structure, it, can so the blocking capability of Si doping blocking layers is stronger The effective diffusion for inhibiting conductive material atom, advantageously reduces the appearance of dielectric layer time breakdown phenomenon, so as to be conducive to carry Height forms the reliability of interconnection structure.
In alternative of the present invention, the barrier layer is laminated construction, including being sequentially located at the open bottom and side wall On the first Si adulterate TaN layer, positioned at the first Si adulterate TaN layers on TaN layers and on the TaN layers second Si adulterates TaN layers.Since Si, C, O and TaN can form TaNSi-O-SiCH, the first Si doping TaN in local reaction The defects of layer can be repaired on described TaN layers and medium bed boundary, so as to improve the adherency on the barrier layer and the dielectric layer Property；Si, Cu and TaN can react to form TaN-Si-Cu, therefore TaN layers of the 2nd Si doping can improve the resistance Adhesiveness between barrier and the interconnection structure；So the first Si, which adulterates TaN layers and the 2nd Si, adulterates TaN layers Form the adherency effectively raised between the barrier layer and the dielectric layer and the barrier layer and the interconnection structure Property is conducive to improve the reliability of the interconnection structure.
In alternative of the present invention, the first Si adulterates TaN layers, described TaN layers and the 2nd Si and adulterates TaN layers It can be formed by way of atomic deposition, since the stepcoverage that atomic layer deposition mode forms film layer is preferable, so TaN layers of the first Si doping, TaN layers and the 2nd Si TaN layers of the doping can preferably cover the opening Bottom and side wall advantageously reduces the technology difficulty of filling conductive material, is conducive to expand process window.
Description of the drawings
Fig. 1 to Fig. 2 is the structure diagram corresponding to a kind of each step of interconnection structure forming method；
Fig. 3 to Fig. 7 is the structure diagram corresponding to each step of one embodiment of interconnection structure forming method of the present invention.
Specific embodiment
From background technology, formed in the prior art interconnection structure there are reliability it is relatively low the problem of.In conjunction with one The reason for forming method analysis interconnection structure reliability of kind of interconnection structure low problem：
Referring to figs. 1 to Fig. 2, the structure diagram corresponding to a kind of each step of interconnection structure forming method is shown.
As shown in Figure 1, provide substrate 10；Dielectric layer 11 is formed on the substrate 10；It is formed in the dielectric layer 11 Opening 12.
As shown in Fig. 2, form barrier layer 13 in 12 (as shown in Figure 1) bottom and side walls of the opening；Stop to being formed with Filling conductive material in the opening 12 of layer 13, forms interconnection structure 14.
The barrier layer 13 is usually formed by the way of atomic layer deposition.It is formed by the way of atomic layer deposition described Barrier layer 13 can reduce to the greatest extent forms protrusion on 12 side walls away from 10 one side of substrate of the opening (Overhang), so as to being conducive to the filling of conductive material.
But the consistency that barrier layer 13 is formed by atomic layer deposition mode is relatively low, therefore formed barrier layer 13 Blocking capability is weaker, and the atom of conductive material readily diffuses into dielectric layer 11, so as to cause the electric isolution of dielectric layer 11 It can decline, be susceptible to time breakdown (Time Dependent Dielectric Breakdown, TDDB) phenomenon, influence institute Form the reliability of interconnection structure.
To solve the technical problem, the present invention provides a kind of forming method of interconnection structure, including：
Substrate is provided；Dielectric layer is formed over the substrate；Opening is formed in the dielectric layer；In the open bottom With form barrier layer on side wall, the barrier layer is the barrier layer of Si doping；The opening on barrier layer is formed in bottom and side wall Interior filling conductive material forms interconnection structure.
The barrier layer formed in open bottom described in technical solution of the present invention and side wall, the barrier layer are Si doping Barrier layer；It is formed in afterwards in the opening on the barrier layer and forms interconnection structure.Due in barrier layer doped with Si, Si atoms It can be with forming the conductive material atomic reaction bonding of interconnection structure, it, can so the blocking capability of Si doping blocking layers is stronger The effective diffusion for inhibiting conductive material atom, advantageously reduces the appearance of dielectric layer time breakdown phenomenon, so as to be conducive to carry Height forms the reliability of interconnection structure.
It is understandable for the above objects, features and advantages of the present invention is enable to become apparent, below in conjunction with the accompanying drawings to the present invention Specific embodiment be described in detail.
With reference to figure 3 to Fig. 7, the structure corresponding to each step of one embodiment of interconnection structure forming method of the present invention is shown Schematic diagram.
With reference to figure 3, substrate 100 is provided.
The substrate 100 is basic for providing technological operation.In the present embodiment, the material of the substrate 100 is monocrystalline silicon. In other embodiments of the invention, the material of the substrate is also selected from polysilicon or non-crystalline silicon；The substrate also may be used To be selected from silicon, germanium, GaAs or silicon Germanium compound；The substrate can also be other semi-conducting materials, alternatively, the substrate is also Can be selected from has epitaxial layer or epitaxial layer silicon-on.
It should be noted that in the present embodiment, the substrate 100 is planar substrate.It is described in other embodiments of the invention Can also have semiconductor structure, such as the semiconductor structures such as fin on substrate.
With continued reference to Fig. 3, dielectric layer 110 is formed on the substrate 100.
The dielectric layer 110 is used to implement the electric isolution between adjacent semiconductor constructs.In the present embodiment, the dielectric layer 110 be interlayer dielectric layer, the electric isolution being used to implement between adjacent device layer.In the present embodiment, the material of the dielectric layer 110 For ultra low-K material, such as doping silicon dioxide, organic polymer and more empty materials etc..In other embodiments of the invention, given an account of The material of matter layer be also selected from silica, silicon nitride, silicon oxynitride, low-K dielectric material (dielectric constant be greater than or equal to 2.5, Less than one or more combinations 3.9) or in ultralow K dielectric materials (dielectric constant is less than 2.5).Specifically, the dielectric layer 110 can be formed by modes such as chemical vapor deposition, physical vapour deposition (PVD), atomic layer deposition or boiler tubes.
With continued reference to Fig. 3, opening 120 is formed in the dielectric layer 110.
The opening 120 forms interconnection structure for filling, to realize the connection with external circuit.In the present embodiment, institute It states 120 bottoms of opening and exposes the substrate 100, to realize the connection of the substrate 100 and external circuit.
It should be noted that in the present embodiment, interconnection structure is formed as double damask structure (Dual Damascene Structure).So the opening 120 includes groove (not indicated in figure), the dielectric layer of the groove through part thickness 110；And through hole (not indicated in figure), the through hole are located at the channel bottom and through the dielectric layer 110 of residual thickness, dew Go out the substrate 100.In other embodiments of the invention, interconnection structure or damascene structure (Single are formed Damascene Structure) or other forms interconnection structure.
With reference to figure 4, barrier layer 130 is formed in 120 bottom and side walls of the opening, the barrier layer 130 is adulterated for Si Barrier layer.
The barrier layer 130 is used to implement the isolation between formed interconnection structure and the dielectric layer 110, stops and is formed The conductive material atoms permeating of interconnection structure, prevents conductive material atoms permeating from entering dielectric layer 110 and influencing dielectric layer 110 It is electrically isolated performance.Due to the barrier layer that the barrier layer 130 is Si doping, and Si can with the atomic reaction of conductive material into Key, therefore the barrier layer of Si doping can effectively inhibit the diffusion of conductive material atom, be conducive to improve the barrier layer 130 Blocking capability, prevent conductive material atoms permeating from entering dielectric layer, reduce the dielectric layer 110 and time breakdown phenomenon occur, Improve the reliability for forming interconnection structure.In the present embodiment, in the step of forming barrier layer 130, the barrier layer 130 Material be Si doping TaN.
The step of forming barrier layer 130 includes：The barrier layer 130 is formed using atom layer deposition process.Due to The stepcoverage performance that atom layer deposition process forms film layer is preferable, so forming the stop by atom layer deposition process The way of layer 130 can reduce and form interconnection structure away from protrusion, reduction is formed on 100 one side side wall of substrate in opening 120 Technology difficulty, expand process window.
Specifically, the barrier layer 130 is laminated construction, so the step of forming barrier layer 130 includes：Described The first Si doping TaN layers 131 are formed in 120 bottom and side walls that are open；TaN layers are formed on the first Si doping TaN layers 131 132；The 2nd Si doping TaN layers 133 are formed on the TaN layers 132.
The first Si doping TaN layers 131 are used to implement the connection between the barrier layer 130 and the dielectric layer 110, The blocking capability on the barrier layer 130 is improved, strengthens the adhesiveness between the barrier layer 130 and the dielectric layer 110；It is described TaN layers 132 are used to prevent the conductive material atoms permeating of formed interconnection structure；The 2nd Si doping TaN layers 133 are for real Existing connection between the barrier layer 130 and formed interconnection structure is also used for and the conductive material atomic reaction bonding, resistance The conductive material atoms permeating is kept off, to improve the blocking capability on the barrier layer 130.
The doping in the barrier layer 130 and the interface of the dielectric layer 110, the first Si doping TaN layers 131 Si atoms can form TaNSi-O-SiCH with the material bonding of the TaN layers 132 and the dielectric layer 110, so as to repair boundary Local defect at face improves the consistency on the barrier layer 130, enhances the blocking capability on the barrier layer 130, improves institute's shape Into the reliability of interconnection structure.In addition, the material bonding of the Si atoms of doping and the TaN layers 132 and the dielectric layer 110, The adhesiveness between the barrier layer 130 and the dielectric layer 110 can also be enhanced.
The doping concentration of Si should not be too large also unsuitable too small in the first Si doping TaN layers 131.The first Si doping It, can be with the material bonding of the TaN layers 132 and the dielectric layer 110 if the doping concentration of Si is too small in TaN layers 131 Si atoms are very little, can influence the blocking capability on the barrier layer 130；If the doping of Si in the first Si doping TaN layers 131 Concentration is too big, can increase the resistance of formed interconnection structure.Specifically, the step of forming the first Si doping TaN layer 131 In, by atomic quantity percentage, the doping concentration of Si is in the range of 5% to 15% in the first Si doping TaN layers 131.
Further, since the Si atoms of doping are reacting bonding with the interface of the dielectric layer 110, away from the dielectric layer 110 Si atoms and the probability of 110 material of dielectric layer reaction bonding are smaller, to increasing 130 blocking capability of barrier layer Effect it is weaker；And the Si atoms away from the dielectric layer 110 can increase the resistance of formed interconnection structure.So in order to control System forms the resistance of interconnection structure, in the present embodiment, is formed in the step of the first Si adulterates TaN layer 131, edge is given an account of Matter layer 110 is directed toward on the direction of the TaN layers 132, and the doping concentration of Si is gradually reduced.
The doping in the barrier layer 130 and the interface of the interconnection structure, the 2nd Si doping TaN layers 133 Si atoms can react bonding with the TaN layers 132 and the interconnection structure, so as to enhance the stop energy on the barrier layer 130 Power improves the reliability for forming interconnection structure.In addition, Si atoms and the TaN layers 132 and the interconnection structure of doping Material bonding can also enhance the adhesiveness between the barrier layer 130 and the dielectric layer 110.
The doping concentration of Si should not be too large also unsuitable too small in the 2nd Si doping TaN layers 133.The 2nd Si doping It, can be former with the TaN layers 132 and the Si of the interconnection structure material bonding if the doping concentration of Si is too small in TaN layers 133 It is sub very little, the blocking capability on the barrier layer 130 can be influenced；If the doping concentration of Si in the 2nd Si doping TaN layers 133 It is too big, the resistance of formed interconnection structure can be increased.Specifically, in the step of forming the 2nd Si doping TaN layer 133, press Atomic quantity percentage, the 2nd Si adulterate the doping concentration of Si in TaN layers 133 in the range of 5% to 15%.
Further, since the Si atoms of doping are reacting bonding with the interface of interconnection structure, close to the TaN layers 132 Si atoms and the probability of interconnection structure material reaction bonding are smaller, weaker to the effect of increase 130 blocking capability of barrier layer； And the Si atoms of the close TaN layers 132 can increase the resistance of formed interconnection structure.So in the present embodiment, institute is formed In the step of stating the 2nd Si doping TaN layer 133, it is directed toward along the TaN layers 132 on the direction of the opening 120, the doping of Si is dense Degree gradually increase.
Specifically, the step of forming the first Si doping TaN layer 131 includes：It carries out first mixing Si materials at least once Deposition, wherein, first includes the step of mixing Si materials deposition：The first material containing Ta is deposited in 120 bottom and side walls of the opening The bed of material；The first material layer containing Si is deposited in first material layer containing Ta；First is deposited in first material layer containing Si Material layer containing N.
Wherein, the step of depositing the first material layer containing Si includes：The first reaction gas containing Si is passed through, described first is anti-containing Si Gas is answered to include silane；Remove first reaction gas containing Si.
In the present embodiment, forming the step of the first Si adulterates TaN layer 131 includes：It carries out multiple first and mixes Si materials Deposition.So when Si materials deposition is mixed in progress multiple first, the flow for being passed through silane in the first reaction gas containing Si gradually reduces； Alternatively, being passed through the burst length of silane gradually reduces；Alternatively, the flow for being passed through silane in the first reaction gas containing Si gradually reduces And the burst length for being passed through silane gradually reduces.This way can reduce the probability that Si atoms participate in reaction, and reduction is formed Atomic layer in Si atoms doping concentration, and then formed the first Si is made to adulterate in TaN layers 131 along the dielectric layer 110 It is directed toward on the direction of the TaN layers 132, the doping concentration of Si is gradually reduced.
It is mixed it should be noted that carrying out multiple first in the step of Si materials deposit, silane in the first reaction gas containing Si Flow should not it is too big also should not be too small.If the flow of silane is too big in the first reaction gas containing Si, can make to form the first Si The Si adulterated in doping TaN layers 131 is very little, can influence the blocking capability on formed barrier layer 130；First reaction gas containing Si If the flow of middle silane is too small, it is too many to make to be formed the Si adulterated in the first Si doping TaN layers 131, can increase institute's shape Into the resistance of interconnection structure.Specifically, in the present embodiment, carry out multiple first and mix in the step of Si materials deposit, described first In reaction gas containing Si the flow of silane from 300sccm to 500sccm in the range of be gradually reduced to 50sccm to 100sccm scopes It is interior.
It carries out in multiple first the step of mixing Si materials deposition, the rate for being passed through the gradually reduction of silane pulse time should not be too It greatly also should not be too small.If the rate for being passed through the gradually reduction of silane pulse time is too big, can make to form TaN layers of the first Si doping The Si adulterated in 131 is very little, can influence the blocking capability on formed barrier layer 130；Being passed through the silane pulse time is gradually reduced If rate it is too small, it is too many to make to be formed the Si adulterated in the first Si doping TaN layers 131, can increase to form interconnection The resistance of structure.Specifically, in the present embodiment, carry out multiple first and mix in the step of Si materials deposit, be passed through the pulse of silane Time from 300 milliseconds to 500 milliseconds in the range of gradually reduce in the range of 50 milliseconds to 100 milliseconds.
It should be noted that before the first material layer containing Si is deposited, first further includes the step of mixing Si materials deposition： The first material layer containing Ta is deposited in 120 bottom and side walls of the opening.Specifically, the step of the first material layer containing Ta of deposition, wraps It includes：The first reaction gas containing Ta is passed through, first reaction gas containing Ta includes five (dimethylamino) tantalum (V) (Pentakis (dimethylamino) tantalum (V), PDMAT)；Remove first reaction gas containing Ta.It is passed through the first reaction gas containing Ta The technical solution of body step is same as the prior art, and details are not described herein by the present invention.
After depositing the first material layer containing Si, first further includes the step of mixing Si materials deposition：In first material containing Si The first material layer containing N is deposited on the bed of material.Specifically, the step of the first material layer containing N of deposition, includes：It is passed through the first reaction gas containing N Body, first reaction gas containing N include ammonia；Remove first reaction gas containing N.It is passed through the first reaction gas containing N step Rapid technical solution is same as the prior art, and details are not described herein by the present invention.
The step of forming the 2nd Si doping TaN layer 133 includes：Carry out at least once second mix Si materials deposition, In, second includes the step of mixing Si materials deposition：The second material layer containing Ta is deposited on the TaN layers 132；Contain described second The second material layer containing Si is deposited in Ta material layers；The second material layer containing N is deposited in second material layer containing Si.
Wherein, the step of depositing the second material layer containing Si includes：The second reaction gas containing Si is passed through, described second is anti-containing Si Gas is answered to include silane；Remove second reaction gas containing Si.
In the present embodiment, forming the step of the 2nd Si adulterates TaN layer 133 includes：It carries out multiple second and mixes Si materials Deposition.So when Si materials deposition is mixed in progress multiple second, the flow for being passed through silane in the second reaction gas containing Si gradually increases； Alternatively, being passed through the burst length of silane gradually increases；Alternatively, the flow for being passed through silane in the second reaction gas containing Si gradually increases And the burst length for being passed through silane gradually increases.This way can increase the probability that Si atoms participate in reaction, and raising is formed Atomic layer in Si atoms doping concentration, and then formed the first Si is made to adulterate in TaN layers 131 along the TaN layers 132 finger On the direction of the opening 120, the doping concentration of Si gradually increases.
It is mixed it should be noted that carrying out multiple second in the step of Si materials deposit, silane in the second reaction gas containing Si Flow should not it is too big also should not be too small.If the flow of silane is too big in the second reaction gas containing Si, can make to form the 2nd Si The Si adulterated in doping TaN layers 133 is too many, can increase the resistance of formed interconnection structure；Silicon in second reaction gas containing Si If the flow of alkane is too small, the blocking capability on formed barrier layer 130 can be influenced.Specifically, in the present embodiment, multiple the is carried out One mix Si materials deposition the step of in, in second reaction gas containing Si the flow of silane from 50sccm to 100sccm scope Inside gradually increase in the range of 300sccm to 500sccm.
It carries out multiple second to mix in the step of Si materials deposit, being passed through the silane pulse time, gradually increased rate should not be too It greatly also should not be too small.If being passed through the silane pulse time, gradually increased rate is too big, can make to form TaN layers of the 2nd Si doping The Si adulterated in 133 is too many, can increase the resistance of formed interconnection structure；It is passed through silane pulse time gradually increased rate If too small, it is very little to make to be formed the Si adulterated in the 2nd Si doping TaN layers 133, can influence formed barrier layer 130 Blocking capability.Specifically, in the present embodiment, carry out multiple second and mix in the step of Si materials deposit, when being passed through the pulse of silane Between from 50 milliseconds to 100 milliseconds in the range of gradually increase in the range of 300 milliseconds to 500 milliseconds.
It should be noted that being formed after TaN layers 132, before depositing the second material layer containing Ta, second mixes Si materials deposition The step of further include：The second material layer containing Ta is deposited on the TaN layers 132.Specifically, the step of the second material layer containing Ta of deposition Suddenly include：The second reaction gas containing Ta is passed through, second reaction gas containing Ta includes five (dimethylamino) tantalums (V) (Pentakis (dimethylamino) tantalum (V), PDMAT)；Remove second reaction gas containing Ta.It is passed through second The technical solution of the step of reaction gas containing Ta is same as the prior art, and details are not described herein by the present invention.
After depositing the second material layer containing Ta, second further includes the step of mixing Si materials deposition：In second material containing Si The second material layer containing N is deposited on the bed of material.Specifically, the step of the second material layer containing N of deposition, includes：It is passed through the second reaction gas containing N Body, second reaction gas containing N include ammonia；Remove second reaction gas containing N.It is passed through the second reaction gas containing N step Rapid technical solution is same as the prior art, and details are not described herein by the present invention.
It should be noted that it carries out the first number for mixing Si materials deposition and forms the thickness of the first Si doping TaN layers 131 Degree is related；The number that Si materials deposition is mixed in progress second is related to the thickness for forming the 2nd Si doping TaN layers 133.So root According to the preset thickness of the first Si doping TaN layers 131 and the preset thickness of the 2nd Si doping TaN layers 133, determine that carrying out first mixes Si The number of material deposition and the second number for mixing Si materials deposition is carried out, and set technological parameter (such as the in the reasonable scope The flow of one reaction gas containing Si and the burst length of silane), with improve formation interconnection structure performance.
The thickness of first Si doping TaN layers 131 should not too greatly also should not be too small.If the first Si adulterates TaN The thickness of layer 131 is too big, then the space that can make remaining opening 120 is too small, makes the depth-to-width ratio increase of the opening 120, Jin Erzeng The technology difficulty of big follow-up filling conductive material；If the thickness of the first Si doping TaN layers 131 is too small, institute can be influenced The blocking capability on barrier layer 130 is formed, is unfavorable for increasing the blocking capability on the barrier layer 130.Specifically, in the present embodiment, In the step of forming the first Si doping TaN layer 131, the thickness of the first Si doping TaN layers 131 existsIt arrives In the range of.
The thickness of the TaN layers 132 should not it is too big also should not be too small.If the thickness of the TaN layers 132 is too big, can The space for making remaining opening 120 is too small, makes the depth-to-width ratio increase of the opening 120, and then increases follow-up filling conductive material Technology difficulty；If the thickness of the TaN layers 132 is too small, the blocking capability on formed barrier layer 130 can be influenced.Specifically, In the present embodiment, in the step of forming TaN layers 132, the thickness of the TaN layers 132 existsIt arrivesIn the range of.
The thickness of 2nd Si doping TaN layers 133 should not too greatly also should not be too small.If the 2nd Si adulterates TaN The thickness of layer 133 is too big, then the space that can make remaining opening 120 is too small, makes the depth-to-width ratio increase of the opening 120, Jin Erzeng The technology difficulty of big follow-up filling conductive material；If the thickness of the 2nd Si doping TaN layers 133 is too small, institute can be influenced The blocking capability on barrier layer 130 is formed, is unfavorable for increasing the blocking capability on the barrier layer 130.Specifically, in the present embodiment, In the step of forming the 2nd Si doping TaN layer 133, the thickness of the 2nd Si doping TaN layers 133 existsIt arrives In the range of.
It should also be noted that, in the step of forming barrier layer 130, the thickness of the first Si doping TaN layers 131 The ratio of degree, thickness TaN layers described and the 2nd Si doping TaN layers 133 can influence the resistance of formed interconnection structure With the blocking capability on the barrier layer 130, the barrier layer 130 and the dielectric layer 110 and the barrier layer 130 can be also influenced Adhesiveness between interconnection structure.
If in formed barrier layer 130, the first Si doping TaN layers 131 and the 2nd Si doping TaN layer 133 Proportion is excessive, i.e., the thickness of described first Si doping TaN layers 131 and the thickness of the 2nd Si doping TaN layers 133 account for institute It is excessive to state the proportion of 130 overall thickness of barrier layer, then the resistance of formed interconnection structure can be made excessive；If formed barrier layer In 130, the first Si doping TaN layers 131 and the 2nd Si doping TaN 133 proportions of layer are too small, i.e., described first Si The thickness of doping TaN layers 131 and the thickness of the 2nd Si doping TaN layers 133 account for the 130 overall thickness proportion mistake of barrier layer It is small, then be unfavorable for improving the blocking capability on the barrier layer 130, can also influence the barrier layer 130 and the dielectric layer 110 and Adhesiveness between interconnection structure.In the present embodiment, in the step of forming the barrier layer, the first Si doping TaN layers 131 Thickness, TaN layers 132 thickness and the 2nd Si doping TaN layers 133 thickness ratio 1:1:1 to 2:1:2 In the range of.
It should be noted that with reference to figure 5, in order to improve the blocking capability on the barrier layer 130, in the present embodiment, then shape Into after the 2nd Si doping TaN layers 133, then also wrapped the step of 120 bottom and side walls of the opening form barrier layer 130 It includes：Supplement TaN layers 134 are formed on the 2nd Si doping TaN layers 133；Adhesion layer is formed on the supplement TaN layers 134 135。
The supplement TaN layers 134 are for stopping the conductive material atoms permeating, to strengthen the resistance on the barrier layer 130 Gear ability；The adhesion layer 134 is used to implement the follow-up connection formed between interconnection structure and the barrier layer 130, improves Adhesiveness between formed barrier layer 130 and the interconnection structure.
In the step of forming adhesion layer 135, the material of the adhesion layer 135 is Ta.Specifically, form the supplement One or two step in the step of the step of TaN layers 134 and formation adhesion layer 135 includes：It is sunk using physical vapor Product technique is formed.In the present embodiment, the supplement TaN layers 134 and the adherency are formed by physical gas-phase deposition Layer 135.
It should be noted that the thickness of the supplement TaN layers 134 and the adhesion layer 135 should not too greatly also should not be too small. If the thickness of the supplement TaN layers 134 is too big, the space that can make remaining opening 120 is too small, so as to increase the opening 120 Depth-to-width ratio, and then increase the technology difficulty of follow-up filling conductive material；If the thickness of the supplement TaN layers 134 is too small, no Beneficial to the blocking capability for enhancing the barrier laminate 130.Specifically, in the step of forming supplement TaN layer 134, the benefit The thickness for filling TaN layers 134 existsIt arrivesIn the range of.
If the thickness of the adhesion layer 135 is too big, the space that can make remaining opening 120 is too small, so as to increase described open The depth-to-width ratio of mouth 120, and then increase the technology difficulty of follow-up filling conductive material；If the thickness of the adhesion layer 135 is too small, It can influence the adhesiveness between formed barrier laminate 130 and the interconnection structure.Specifically, form the adhesion layer 135 In step, the thickness of the adhesion layer 135 existsIt arrivesIn the range of.
It should be noted that in other embodiments of the invention, can also TaN layers of realization directly be adulterated by the 2nd Si Connection between interconnection structure and the dielectric layer, so as to reduce the thickness on formed barrier layer, the size of enlarged openings reduces The technology difficulty of conductive material is filled, expands process window.
With reference to figure 6 to Fig. 7, filling in the opening 120 (as shown in Figure 5) on barrier layer 130 is formed with to bottom and side wall and is led Electric material forms interconnection structure 150 (as shown in Figure 7).
In the present embodiment, the interconnection structure 150 is double damask structure, and the opening 120 includes groove (in figure not Mark) and through hole (not indicated in figure) positioned at channel bottom, so the interconnection structure 150 includes being located in the through hole Plug (not indicated in figure) and the line (not indicated in figure) in the groove.
Specifically, the step of forming interconnection structure 150 includes：
With reference to figure 6, filling conduction material in the opening 120 (as shown in Figure 5) on barrier layer 130 is formed with to bottom and side wall Material forms conductive layer 151.
The conductive layer 151 is used to form interconnection structure with the connection with external circuit.In the present embodiment, the conduction material Expect for Cu, so the material of the conductive layer 151 formed is Cu.
So it is mixed in the barrier layer 130 and the interface of the conductive layer 151, the 2nd Si doping TaN layers 133 Miscellaneous Si atoms can form Cu-Si-TaN with the TaN layers 132 and the conductive material bonding, so as to inhibit the conduction The diffusion of material atom improves the blocking capability on the barrier layer 130, improves the reliability for forming interconnection structure 150；This Outside, Si atoms form Cu-Si-TaN with the TaN layers 132 and the conductive material bonding, can also enhance the TaN layers 132 Adhesiveness between the conductive material.
Specifically, the step of forming conductive layer 151 includes：Seed Layer is formed in 120 bottom and side walls of the opening； Conduction material is filled into the opening 120 by the mode of electroless plating (Electro chemical plating, ECP) afterwards Material forms conductive layer 151.
With reference to figure 7, annealing 140 is carried out to the barrier layer 130 and the conductive layer 151 (as shown in Figure 6), is formed Interconnection structure 150.
The annealing 140 is additionally operable to make the Si atoms in the barrier layer 130 to expand for forming interconnection structure 150 It dissipates, Si atoms is made to react bonding with the dielectric layer 110 and the interconnection structure 150, to improve the stop on the barrier layer 130 Ability, and improve the barrier layer 130 and the adhesiveness of the dielectric layer 110 and the interconnection structure 150.Specifically, In the first Si doping TaN layers 131 and the interface of the dielectric layer 110 and the first Si doping TaN layers 131 and institute The interface of TaN layers 132 is stated, the annealing 140 makes Si atoms permeatings enter the dielectric layer 110 and TaN layers 132 Interior, Si atoms and TaN and O, C and H form TaNSi-O-SiCH in local reaction bonding, so as to repair with it is TaN layers described 132 and the defects of 110 interface of dielectric layer, the consistency of the TaN layers 132 is improved, enhances the resistance of the TaN layers 132 Gear ability is conducive to improve the blocking capability on the barrier layer 130, improves the reliability of the interconnection structure 150.
In the 2nd Si doping TaN layers 133 TaN layers are adulterated with the interface of the TaN layers 132 and the 2nd Si 133 and the boundary layer of the interconnection structure 150, the annealing 140 makes silicon atom diffuse into the TaN layers 132 and institute It states in interconnection structure 150, Si atoms and TaN, Cu atomic reaction bonding form Cu-Si-TaN, so as to inhibit the expansion of Cu atoms It dissipates, improves the adhesiveness of the TaN layers 132 and the interconnection structure 150, be conducive to improve the stop energy on the barrier layer 130 Power improves the reliability of the interconnection structure 150.
Specifically, in the step of carrying out annealing 140, annealing temperature should not it is too high also should not be too big.Annealing temperature If degree is too high, unnecessary process risk can be caused, increases the possibility that other semiconductor structures are damaged on substrate 100；Annealing If temperature is too low, the diffusion of Si atoms can be influenced, is unfavorable for Si atoms and the TaN layers 132 and the interconnection structure 150 Material atom reacts bonding, is unfavorable for improving forming the blocking capability on barrier layer 130, be also unfavorable for raising barrier layer 130 and Adhesiveness between the interconnection structure 150 and the dielectric layer 110.Specifically, in the step of being made annealing treatment, annealing temperature Degree is in the range of 300 DEG C to 375 DEG C.
Annealing time it is unsuitable it is too long also should not be too short.If annealing time is too long, unnecessary process risk can be caused, is increased The possibility that other semiconductor structures are damaged on big substrate 100；If annealing time is too short, silicon atom can not fully be spread, no Beneficial to Si atoms and the TaN layers 132 and 150 material atom of the interconnection structure reaction bonding, it is unfavorable for improving forming resistance The blocking capability of barrier 130 is also unfavorable for improving between barrier layer 130 and the interconnection structure 150 and the dielectric layer 110 Adhesiveness.Specifically, in the step of being made annealing treatment, annealing time is in the range of 3 minutes to 6 minutes.
It should be noted that in the present embodiment, in the step of forming conductive layer 151, the conductive layer 151 is also located at On the dielectric layer 110；And in the step of forming barrier layer 130, the barrier layer 130 also is located at the dielectric layer On 110.So being formed after conductive layer 151, before carrying out annealing 140, the forming method further includes：It is planarized Processing to remove conductive layer 151 and the barrier layer 130 on the dielectric layer 110, forms and is located at the opening 120 (as schemed Shown in 5) in interconnection structure 150.
Specifically, the planarization process is carried out by way of chemical mechanical grinding, and the planarization process is extremely Expose 110 surface of dielectric layer to stop.
Correspondingly, the present invention also provides a kind of interconnection structures.With reference to figure 7, one embodiment of interconnection structure of the present invention is shown Structure diagram.
The interconnection structure includes：Substrate 100；Dielectric layer 110 on the substrate 100；Positioned at the dielectric layer Interconnection structure 150 in 110；Barrier layer 130 between the interconnection structure 150 and the dielectric layer 110, the stop The barrier layer that layer 130 adulterates for Si.
The substrate 100 is basic for providing technological operation.In the present embodiment, the material of the substrate 100 is monocrystalline silicon. In other embodiments of the invention, the material of the substrate is also selected from polysilicon or non-crystalline silicon；The substrate also may be used To be selected from silicon, germanium, GaAs or silicon Germanium compound；The substrate can also be other semi-conducting materials, alternatively, the substrate is also Can be selected from has epitaxial layer or epitaxial layer silicon-on.
It should be noted that in the present embodiment, the substrate 100 is planar substrate.It is described in other embodiments of the invention Can also have semiconductor structure, such as the semiconductor structures such as fin on substrate.
The dielectric layer 110 is used to implement the electric isolution between adjacent semiconductor constructs.In the present embodiment, the dielectric layer 110 be interlayer dielectric layer, the electric isolution being used to implement between adjacent device layer.The material of the dielectric layer 110 can be selected from oxygen SiClx, silicon nitride, silicon oxynitride, low-K dielectric material (dielectric constant is greater than or equal to 2.5, less than 3.9) or super low-K dielectric material One or more combinations in material (dielectric constant is less than 2.5).In the present embodiment, the material of the dielectric layer 110 is ultralow K materials Material, such as doping silicon dioxide, organic polymer and more empty materials etc..
The interconnection structure 150 is used to implement the connection with external circuit.Specifically, the interconnection structure 150 is double big Ma Shige structures, so the interconnection structure 150 includes the plug (not indicated in figure) being located in the through hole and positioned at described Line (not indicated in figure) in groove.In the present embodiment, the material of the interconnection structure 150 is conductive material, such as Cu.
The barrier layer 130 is used to implement the isolation between the interconnection structure and the dielectric layer 110, stops and is formed mutually Link the conductive material atoms permeating of structure, prevent conductive material atoms permeating from entering dielectric layer 110 and influencing the electricity of dielectric layer 110 Isolation performance.
Due to the barrier layer 130 be Si doping barrier layer, and Si can with the atomic reaction bonding of conductive material, because The barrier layer of this Si doping can effectively inhibit the diffusion of conductive material atom, be conducive to improve the resistance on the barrier layer 130 Gear ability prevents conductive material atoms permeating from entering dielectric layer, reduces the dielectric layer 130 and time breakdown phenomenon occurs, improves The reliability of the interconnection structure 150.In the present embodiment, the material on the barrier layer 130 is the TaN of Si doping.
The barrier layer 130 is laminated construction, including：Between the dielectric layer 110 and the interconnection structure 150 First Si doping TaN layers 131；TaN layers 132 between the first Si doping TaN layers 131 and the interconnection structure 150； The 2nd Si doping TaN layers 133 between the TaN layers 132 and the interconnection structure 150.
The first Si doping TaN layers 131 are used to implement the connection between the barrier layer 130 and the dielectric layer 110, The blocking capability on the barrier layer 130 is improved, strengthens the adhesiveness between the barrier layer 130 and the dielectric layer 110；It is described TaN layers 132 are used to prevent the conductive material atoms permeating of the interconnection structure 150；The 2nd Si doping TaN layers 133 are used for Realize the connection between the barrier layer 130 and the interconnection structure 150, be also used for the conductive material atomic reaction into Key stops the conductive material atoms permeating, to improve the blocking capability of the resistance lamination 130.
The doping in the barrier layer 130 and the interface of the dielectric layer 110, the first Si doping TaN layers 131 Si atoms can form TaNSi-O-SiCH with the material bonding of the TaN layers 132 and the dielectric layer 110, so as to repair boundary Local defect at face improves the consistency on the barrier layer 130, enhances the blocking capability on the barrier layer 130, described in raising The reliability of interconnection structure 150.In addition, the material bonding of the Si atoms of doping and the TaN layers 132 and the dielectric layer 110, The adhesiveness between the barrier layer 130 and the dielectric layer 110 can also be enhanced.
Specifically, in 131 interface with the dielectric layer 110 of the first Si doping TaN layers and the first Si The interface of TaN layers 131 and the TaN layers 132 is adulterated, Si atoms permeatings enter the dielectric layer 110 and TaN layers 132 Interior, Si atoms and TaN and O, C and H form TaNSi-O-SiCH in local reaction bonding, so as to repair with it is TaN layers described 132 and the defects of 110 interface of dielectric layer, the consistency of the TaN layers 132 is improved, enhances the resistance of the TaN layers 132 Gear ability is conducive to improve the blocking capability on the barrier layer 130, improves the reliability of the interconnection structure 150.
The doping in the barrier layer 130 and the interface of the interconnection structure 150, the 2nd Si doping TaN layers 133 Si atoms can with the TaN layers 132 and the interconnection structure reaction bonding, so as to enhance the stop on the barrier layer 130 Ability improves the reliability of the interconnection structure 150.In addition, the Si atoms of doping and the TaN layers 132 and the mutual connection The material bonding of structure 150 can also enhance the adhesiveness between the barrier layer 130 and the dielectric layer 110.
In the 2nd Si doping TaN layers 133 TaN layers are adulterated with the interface of the TaN layers 132 and the 2nd Si 133 and the boundary layer of the interconnection structure 150, Si atoms permeatings are into the TaN layers 132 and the interconnection structure 150, Si Atom and TaN, Cu atomic reaction bonding, form Cu-Si-TaN, so as to improve the TaN layers 132 and the interconnection structure 150 Adhesiveness, be conducive to improve the blocking capability on the barrier layer 130, improve the reliability of the interconnection structure 150.
The doping concentration of Si should not be too large also unsuitable too small in the first Si doping TaN layers 131.The first Si doping It, can be with the material bonding of the TaN layers 132 and the dielectric layer 110 if the doping concentration of Si is too small in TaN layers 131 Si atoms are very little, can influence the blocking capability on the barrier layer 130；If the doping of Si in the first Si doping TaN layers 131 Concentration is too big, can increase the resistance of the interconnection structure 150.Specifically, by atomic quantity percentage, the first Si doping The doping concentration of Si is in the range of 5% to 15% in TaN layers 131.
Further, since the Si atoms of doping are reacting bonding with the interface of the dielectric layer 110, away from the dielectric layer 110 Si atoms and the probability of 110 material of dielectric layer reaction bonding are smaller, to increasing 130 blocking capability of barrier layer Effect it is weaker；And the Si atoms away from the dielectric layer 110 can increase the resistance of the interconnection structure 150.So in order to It controls the resistance of the interconnection structure 150, in the present embodiment, is directed toward along the dielectric layer 110 on the direction of the TaN layers 132, The doping concentration of Si is gradually reduced.
The doping concentration of Si should not be too large also unsuitable too small in the 2nd Si doping TaN layers 133.The 2nd Si doping It, can be with 150 material bonding of the TaN layers 132 and the interconnection structure if the doping concentration of Si is too small in TaN layers 133 Si atoms are very little, can influence the blocking capability on the barrier layer 130；If the doping of Si in the 2nd Si doping TaN layers 133 Concentration is too big, can increase the resistance of the interconnection structure 150.Specifically, by atomic quantity percentage, the 2nd Si doping The doping concentration of Si is in the range of 5% to 15% in TaN layers 133.
Further, since the Si atoms of doping are reacting bonding with the interface of interconnection structure 150, close to the TaN layers 132 Si atoms and 150 material of interconnection structure reaction bonding probability it is smaller, to increasing 130 blocking capability of barrier layer Effect is weaker；And the Si atoms of the close TaN layers 132 can increase the resistance of the interconnection structure 150.So the present embodiment In, in the 2nd Si doping TaN layers 133, it is directed toward along the TaN layers 132 on the direction of the interconnection structure 150, Si's mixes Miscellaneous concentration gradually subtracts increase.
The thickness of first Si doping TaN layers 131 should not too greatly also should not be too small.If the first Si adulterates TaN The thickness of layer 131 is too big, then can increase the technology difficulty of filling conductive material；If the thickness of the first Si doping TaN layers 131 Degree is too small, then can influence the blocking capability on the barrier layer 130, be unfavorable for increasing the blocking capability on the barrier layer 130.Specifically , in the present embodiment, the thickness of the first Si doping TaN layers 131 existsIt arrivesIn the range of.
The thickness of the TaN layers 132 should not it is too big also should not be too small.If the thickness of the TaN layers 132 is too big, can The technology difficulty of increase filling conductive material；If the thickness of the TaN layers 132 is too small, the barrier layer 130 can be influenced Blocking capability.Specifically, in the present embodiment, the thickness of the TaN layers 132 existsIt arrivesIn the range of.
The thickness of 2nd Si doping TaN layers 133 should not too greatly also should not be too small.If the 2nd Si adulterates TaN The thickness of layer 133 is too big, then the space that can make remaining opening 120 is too small, makes the depth-to-width ratio increase of the opening 120, Jin Erzeng The technology difficulty of big follow-up filling conductive material；If the thickness of the 2nd Si doping TaN layers 133 is too small, institute can be influenced The blocking capability on barrier layer 130 is stated, is unfavorable for increasing the blocking capability on the barrier layer 130.Specifically, in the present embodiment, institute The thickness for stating the 2nd Si doping TaN layers 133 existsIt arrivesIn the range of.
It should also be noted that, thickness and the institute of the thickness of the first Si doping TaN layers 131, TaN layers 132 The resistance of the interconnection structure 150 and the stop energy on the barrier layer 130 can be influenced by stating the ratio of the 2nd Si doping TaN layers 133 Power can be also influenced between the barrier layer 130 and the dielectric layer 110 and the barrier layer 130 and the interconnection structure 150 Adhesiveness.
If in the barrier layer 130,133 institute of the first Si doping TaN layers 131 and the 2nd Si doping TaN layers Accounting weight is excessive, i.e. the thickness and the 2nd Si of the first Si doping TaN layers 131 adulterate TaN layers 133 thickness account for described in The proportion of 130 overall thickness of barrier layer is excessive, then the resistance that can make the interconnection structure 150 is excessive；If the barrier layer 130 In, the first Si doping TaN layers 131 and the 2nd Si doping TaN 133 proportions of layer are too small, i.e., described first Si mixes It is too small that the thickness of the thickness of miscellaneous TaN layers 131 and the 2nd Si doping TaN layers 133 accounts for the 130 overall thickness proportion of barrier layer, Then it is unfavorable for improving the blocking capability on the barrier layer 130, can also influences the barrier layer 130 and the dielectric layer 110 and institute State the adhesiveness between interconnection structure 150.It is the thickness of the first Si doping TaN layers 131, TaN layers described in the present embodiment The ratio of the thickness of 132 thickness and the 2nd Si doping TaN layers 133 is 1:1:1 to 2:1:In the range of 2.
It should be noted that in order to improve the blocking capability on the barrier layer 130, in the present embodiment, the barrier layer 130 It further includes：Supplement TaN layers 134 between the 2nd Si doping TaN layers 133 and the interconnection structure 150；And it is located at Adhesion layer 135 between the supplement TaN layers 134 and the interconnection structure 150.Specifically, the material of the adhesion layer 135 is Tantalum.
The supplement TaN layers 134 are for stopping the conductive material atoms permeating, to strengthen the resistance on the barrier layer 130 Gear ability；The adhesion layer 134 is used to implement the connection between the interconnection structure 150 and the barrier layer 130, described in raising Adhesiveness between barrier layer 130 and the interconnection structure 150.
It should be noted that the thickness of the supplement TaN layers 134 and the adhesion layer 135 should not too greatly also should not be too small. If the thickness of the supplement TaN layers 134 is too big, the space that can make remaining opening 120 is too small, so as to increase the opening 120 Depth-to-width ratio, and then increase the technology difficulty of follow-up filling conductive material；If the thickness of the supplement TaN layers 134 is too small, no Beneficial to the blocking capability for enhancing the barrier layer 130.Specifically, the thickness of the supplement TaN layers 134 existsIt arrivesScope It is interior.
If the thickness of the adhesion layer 135 is too big, the space that can make remaining opening 120 is too small, so as to increase described open The depth-to-width ratio of mouth 120, and then increase the technology difficulty of follow-up filling conductive material；If the thickness of the adhesion layer 135 is too small, It can influence the adhesiveness between the barrier layer 130 and the interconnection structure 150.Specifically, the thickness of the adhesion layer 135 existsIt arrivesIn the range of.
It should be noted that in other embodiments of the invention, can also TaN layers of realization directly be adulterated by the 2nd Si Connection between interconnection structure 150 and the dielectric layer, so as to reduce the thickness on the barrier layer, the size of enlarged openings, drop The technology difficulty of low filling conductive material, expands process window.
To sum up, the barrier layer formed on open bottom described in technical solution of the present invention and side wall, the barrier layer are Si The barrier layer of doping；It is formed in afterwards in the opening on the barrier layer and forms interconnection structure.Due in barrier layer doped with Si, Si atoms can with formed interconnection structure conductive material atomic reaction bonding, so the blocking capability of Si doping blocking layers compared with By force, it can effectively inhibit the diffusion of conductive material atom, advantageously reduce the appearance of dielectric layer time breakdown phenomenon, so as to have The reliability of interconnection structure is formed beneficial to raising.And in alternative of the present invention, the barrier layer is laminated construction, including It is sequentially located at the first Si in the open bottom and side wall and adulterates TaN layers, the TaN on the first Si doping TaN layers Layer and the 2nd Si on the TaN layers adulterate TaN layers.Since Si, C, O and TaN can be formed in local reaction TaNSi-O-SiCH, thus the first Si adulterate TaN layer can repair described TaN layers with medium bed boundary on the defects of, so as to carry The high barrier layer and the adhesiveness of the dielectric layer；Si, Cu and TaN can react to form TaN-Si-Cu, therefore described 2nd Si adulterates the TaN layers of adhesiveness that can be improved between the barrier layer and the interconnection structure；So the first Si mixes TaN layers of formation of miscellaneous TaN layers and the 2nd Si doping effectively raises the barrier layer and the dielectric layer and described Adhesiveness between barrier layer and the interconnection structure is conducive to improve the reliability of the interconnection structure.In addition, the present invention can It selects in scheme, TaN layers of the first Si doping, TaN layers and the 2nd Si TaN layers of the doping can be sunk by atom Long-pending mode is formed, since the stepcoverage that atomic layer deposition mode forms film layer is preferable, so the first Si adulterates TaN TaN layers of layer, TaN layers and the 2nd Si doping bottom and side wall that can preferably cover the opening, are conducive to The technology difficulty of filling conductive material is reduced, is conducive to expand process window.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute Subject to the scope of restriction.

Claims (20)

1. a kind of forming method of interconnection structure, which is characterized in that including：
Substrate is provided；
Dielectric layer is formed over the substrate；
Opening is formed in the dielectric layer；
Barrier layer is formed in the open bottom and side wall, the barrier layer is the barrier layer of Si doping；
It is formed in bottom and side wall in the opening on barrier layer and fills conductive material, form interconnection structure.
2. forming method as described in claim 1, which is characterized in that the step of forming the barrier layer includes：
The barrier layer is formed using atom layer deposition process.
3. forming method as described in claim 1, which is characterized in that in the step of forming the barrier layer,
The material on the barrier layer includes the TaN of Si doping.
4. the forming method as described in claim 1 or 3, which is characterized in that the barrier layer is laminated construction；
The step of forming the barrier layer includes：
The first Si is formed in the open bottom and side wall and adulterates TaN layers；
TaN layers are formed on the first Si doping TaN layers；
The 2nd Si is formed on the TaN layers and adulterates TaN layers.
5. forming method as claimed in claim 4, which is characterized in that formed in the step of the first Si adulterates TaN layers, pressed Atomic quantity percentage, the first Si adulterate the doping concentration of Si in TaN layers in the range of 5% to 15%；
It is formed in the step of the 2nd Si adulterates TaN layers, by atomic quantity percentage, the 2nd Si adulterates Si in TaN layers Doping concentration in the range of 5% to 15%.
6. forming method as claimed in claim 4, which is characterized in that formed in the step of the first Si adulterates TaN layers, edge The dielectric layer is directed toward on described TaN layers of direction, and the doping concentration of Si is gradually reduced；
It is formed in the step of the 2nd Si adulterates TaN layers, is directed toward along described TaN layers on the direction of the opening, the doping of Si Concentration gradually increases.
7. forming method as claimed in claim 4, which is characterized in that forming the step of the first Si adulterates TaN layers includes： Carry out at least once first mix Si materials deposition, wherein, first mix Si materials deposition the step of include：In the open bottom and The first material layer containing Ta of deposited on sidewalls；The first material layer containing Si is deposited in first material layer containing Ta；Described first The first material layer containing N is deposited in material layer containing Si；Wherein, the step of depositing the first material layer containing Si includes：First is passed through containing Si Reaction gas, first reaction gas containing Si include silane；Remove first reaction gas containing Si；
Forming the step of the 2nd Si adulterates TaN layers includes：Carry out at least once second mix Si materials deposition, wherein, second The step of mixing Si materials deposition includes：The second material layer containing Ta is deposited on the TaN layers；In second material layer containing Ta Deposit the second material layer containing Si；The second material layer containing N is deposited in second material layer containing Si；Wherein, deposition second contains Si The step of material layer, includes：The second reaction gas containing Si is passed through, second reaction gas containing Si includes silane；Remove described Two reaction gas containing Si.
8. forming method as claimed in claim 7, which is characterized in that progress multiple first is mixed the step of Si materials deposition and wrapped It includes：The flow for being passed through silane in the first reaction gas containing Si gradually reduces；Carry out multiple second mix Si materials deposition the step of wrap It includes：The flow for being passed through silane in the second reaction gas containing Si gradually increases；
Include alternatively, carrying out multiple first and mixing the step of Si materials deposit：Being passed through the burst length of silane gradually reduces；It carries out more Secondary second includes the step of mixing Si materials deposition：Being passed through the burst length of silane gradually increases.
9. forming method as claimed in claim 4, which is characterized in that in the step of forming the barrier layer, the first Si Thickness, thickness TaN layers described and the 2nd Si of TaN layers of doping adulterate the ratio of TaN layers of thickness 1:1:1 to 2: 1:In the range of 2.
10. forming method as claimed in claim 4, which is characterized in that it is formed in the step of the first Si adulterates TaN layers, The thickness that first Si adulterates TaN layers existsIt arrivesIn the range of；
It is formed in the step of TaN layers described, thickness TaN layers described existsIt arrivesIn the range of；
It is formed in the step of the 2nd Si adulterates TaN layers, the thickness that the 2nd Si adulterates TaN layers existsIt arrivesScope It is interior.
11. forming method as described in claim 1, which is characterized in that in the step of forming dielectric layer, the material of the dielectric layer Expect for ultra low-K material.
12. forming method as described in claim 1, which is characterized in that the step of forming the interconnection structure includes：
It is formed with to bottom and side wall in the opening on barrier layer and fills conductive material, form conductive layer；
The barrier layer and the conductive layer are made annealing treatment, form interconnection structure.
13. the forming method as described in claim 1 or 12, which is characterized in that in the step of forming interconnection structure, the conduction Material is Cu.
14. a kind of interconnection structure, which is characterized in that including：
Substrate；
Dielectric layer on the substrate；
Interconnection structure in the dielectric layer；
Barrier layer between the interconnection structure and the dielectric layer, the barrier layer are the barrier layer of Si doping.
15. interconnection structure as claimed in claim 14, which is characterized in that the material on the barrier layer is the TaN of Si doping.
16. the interconnection structure as described in claims 14 or 15, which is characterized in that the barrier layer is laminated construction；The resistance Barrier includes：The first Si between the dielectric layer and the interconnection structure adulterates TaN layers；It is adulterated positioned at the first Si TaN layers between TaN layers and the interconnection structure；TaN is adulterated positioned at described TaN layers the 2nd Si between the interconnection structure Layer.
17. interconnection structure as claimed in claim 16, which is characterized in that the first Si adulterates TaN layers of thickness, described TaN layers of thickness and the 2nd Si adulterate the ratio of TaN layers of thickness 1:1:1 to 2:1:In the range of 2.
18. interconnection structure as claimed in claim 16, which is characterized in that the first Si is adulterated in TaN layers, along the medium Layer is directed toward on described TaN layers of direction, and the doping concentration of Si is gradually reduced；
2nd Si is adulterated in TaN layers, and along described TaN layers on the direction of the interconnection structure, the doping concentration of Si is gradual Subtract increase.
19. interconnection structure as claimed in claim 16, which is characterized in that by atomic quantity percentage, the first Si doping The doping concentration of Si is in the range of 5% to 15% in TaN layers；
By atomic quantity percentage, the 2nd Si adulterates the doping concentration of Si in TaN layers in the range of 5% to 15%.
20. interconnection structure as claimed in claim 16, which is characterized in that the thickness that the first Si adulterates TaN layers exists It arrivesIn the range of；Thickness TaN layers described existsIt arrivesIn the range of；The thickness that 2nd Si adulterates TaN layers existsIt arrivesIn the range of.
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