CN107797441A

CN107797441A - The time-amplitude modulation numeric field method for expressing of low-jitter clock signal

Info

Publication number: CN107797441A
Application number: CN201610810646.5A
Authority: CN
Inventors: 宋茂忠; 宋纪康
Original assignee: Nanjing University of Aeronautics and Astronautics
Current assignee: Nanjing University of Aeronautics and Astronautics
Priority date: 2016-09-05
Filing date: 2016-09-05
Publication date: 2018-03-13
Anticipated expiration: 2036-09-05
Also published as: CN107797441B

Abstract

The invention discloses a kind of time-amplitude of clock signal to modulate numeric field method for expressing, the clock that it is different from general waveform domain or sequential relationship to represent, but the data structure sequence for passing through numeric field, to represent the forward position due in clock each cycle, afterwards along due in, positive half cycle length and negative half period length parameter, in being represented ahead of the curve with the due on rear edge, the fraction due in clock signal forward position or rear edge is represented using two fixed intervals sample magnitudes, the sample quantization of fraction due in is converted into the quantization of sample amplitude, realize clock leading edge or after along due in time-amplitude modulation Serial No. represent, produced for the numeral of low-jitter clock signal, transmission, synchronous and digital processing provides conveniently.

Description

The time-amplitude modulation numeric field method for expressing of low-jitter clock signal

First, technical field

The invention belongs to Design of Signal and signal processing technology field, more particularly to using clock come the satellite that is handled The method of the Design of Digital System such as ranging, communication and radar and signal transacting when navigation, survey, is a kind of high-precision low-jitter clock Signal produces and the new technology of processing.

2nd, background technology

Clock signal is the digitized premise of all contemporary electronic systems, and without clock reference and driving, digital display circuit will It can not work.The effect of clock signal be with certain frequency or cycle, by forward position due in or after along due in come Driving digital system operation, the characteristic sooner or later and systematic function and reliability of multiple clock due ins are closely related.When at present Clock signal is mainly described with waveform characteristic, and frequency and arrival time relation are portrayed by the relative timing of waveform.But pair when When clock signal analyse in depth processing, waveform description is not easy to digital processing, and the sample quantization of clock signal is also very difficult. Although time interval measurement is likely to be breached the magnitude of several psecs, the forward position due in that picosecond is obtained to clock signal is taken out Sample or expression, in general method will have 10¹²Hz reference clock, it is very unrealistic.

More prolonged frequency and the stability characteristic of clock signal research, jittering characteristic are also mainly to be carried out from spectral domain Analyze, the slight change in temporal properties or a cycle can only be portrayed by waveform domain.The forward position of waveform domain description is special Property transmit and radio wave propagation in had a great influence by channel, be not easy to digital modeling or digital processing.With high-frequency clock reference The shake for sample or enter all unmanageable forward position due in of row clock generation to clock signal, it is overall to digital display circuit The raising of performance brings difficulty.And the change or shake of clock leading edge influence significantly on the performance indications of whole system.During to surveying System determines time difference method, and range accuracy is determined to navigation and radar signal, determines synchronization accuracy to signal of communication, therefore to carry The performance of high digital display circuit must start with from basic forward position due in characteristic.Therefore this patent provides a kind of low-jitter clock The time-amplitude modulation numeric field method for expressing of signal, generation and processing for low-jitter clock provide possibility.

Time-amplitude transfer or time-to-digital converter are to survey after having compared popularization, its main purpose in measurement in the time Single time interval is measured, except that the time-amplitude modulation of invention is to be modulated to a series of forward position arrival times In clock sampled sequence, arrival time is represented using the amplitude of sampling samples.Arrival time number of the solution never on sampled point Word sampled representation problem.

3rd, the content of the invention

1st, goal of the invention

It is an object of the invention to provide it is a kind of can accurately reflect clock signal forward position or after along due in change time Amplitude modulated digital domain mathematical notation method, solve clock signal mathematical description, the numeral production of low jitter or controllable due in Raw and digital processing basic problem.

2nd, technical scheme

In order to reach foregoing invention purpose, the present invention comprises the following steps：

(1) the time-amplitude modulation method for expressing of clock signal pulse forward position due in

In order to solve the waveform sampling to being clock signal under s (t), it is impossible to collect clock leading edge or after along due in Temporal information problem, invented with the amplitude ab in Fig. 1 to represent the time-amplitude modulator approach of forward position moment p point.It is if preceding Time along due in p from sampling instant a is ap=yT_S, T_SFor the sampled reference clock cycle, 0≤y ＜ 1, then sampling sample is taken This ab=-y, cd=1-y.So, any forward position due in can use the two neighboring sample magnitude value of equal interval sampling To represent.Ab normalization amplitude length just directly represents forward position due in p points to sampling instant a T_SWhen normalized Between.The quantified precision of forward position due in translates into amplitude of samples sample ab quantified precision.Therefore, can be with using the present invention With more low-frequency benchmark sample sequence Precise Representation pulse front edge due in, the modulation of clock signal time-amplitude is realized Digital domain representation.

(2) the compressed data structure method for expressing of clock signal

If to a clock signal with after a reference clock sequential sampling, clock signal characteristic passes through a series of samplings Value sequence provides, but information redundancy is more, to carry out stored digital and treatment effeciency is not high, the present invention devise as it is next when The data structure in clock cycle：

Structure s_clock (i)={ n_positive, p_back, n_nagitive, y_leading }

Wherein i represents i-th of clock cycle, and n_positive represents+1 number that positive half cycle samples in this cycle, p_ Back represents trailing edge zero crossing to the time at previous sampled point moment, with normalization sampling clock cycle T_SRepresent.n_ Nagitive is -1 number sampled in negative half period, is represented with positive integer.Y_leading represents the forward position moment in next cycle To the time of previous sampled point, with normalization sampling clock cycle T_SRepresent.Such as s_clock (10)={ 3,0.2,4,0.6 }.

The method for expressing of clock signal first phase can also represent with similar structures, such as：

Structure s_clock (0)={ n_positive, p_back, n_nagitive, y_leading }=0,0, Or s_clock (0)={ 0,0,2,0.8 }, or s_clock (0)={ 0,0.1,9,0.8 } 0,0.5 }.

(3) calculation method of parameters of the clock signal Serial No. of high-precision forward position due in

If the clock cycle to be generated is T₀, the sampled reference clock cycle is T_S, initial phase is that a cycle forward position is arrived Up to the zero point that the moment is time shaft, there occurs 0.5T for first sampled point_SPlace, then the first phase data structure of clock signal is

S_clock (0)={ n_positive, p_back, n_nagitive, y_leading }={ 0,0,0,0.5 }.

Since a cycle, clock data structure calculation method of parameters below is as follows：

If (i)M is positive integer, 0≤x ＜ 1；

(ii)

Fix (u) represents less than the maximum positive integer equal to u, y_leading (i)=y_leading (i-1)+x,

If y_leading (i) >=1, y_leading (i)=y_leading (i) -1,

And n_nagitive (i)=n_nagitive (i)+1；

(iii) p_back (i)=y_leading (i)+0.5x,

If p_back (i) >=1, p_back (i)=p_back (i) -1.

3rd, the device have the advantages that

Numeric field method for expressing is modulated using the clock signal time-amplitude of the present invention, can be with than relatively low reference clock Sequence carrys out sampled clock signal, accurately reflects clock signal forward position with the clock signal data structure in each cycle or rear along arrival Moment changing rule, solves the clock signal mathematical description of low jitter or controllable due in, numeral produces and digital processing Basic problem, to high-precision low-jitter clock signal produce and digital processing provider just.

4th, illustrate

The time-amplitude modulation of the digital sample of Fig. 1 clock signals represents figure.

The oscillogram of Fig. 2 1.023MHz clocks caused by 10MHz clock samplings.

5th, embodiment

Embodiment one：Ignore the simplification clock signal numerical method of trailing edge

Many occasions are only concerned the rising edge time of clock, how to change without concern for trailing edge, corresponding clock data Structure can is reduced to：

The first structure：S_clock (i)={ n_positive, 0, n_nagitive, y_leading }, i.e. p_back= 0, trailing edge moment oversampled points；

Second of structure：S_clock (i)={ n_positive, p_back, n_nagitive, y_leading }, i.e. p_ Back=y_leading, i.e., within each clock cycle, forward position sample magnitude is equal along sample magnitude with after, the folding of zero crossing One positive one negative, variation characteristic antisymmetry of line slope.

The method for expressing of both structures can simplify trailing edge parameter p_back calculating, but caused clock positive half period Asymmetric with negative half-cycle, its clock signal averaging is not 0, and trailing edge due in is not also in 0.5T₀Place.

Embodiment two：The generation algorithm of low sampling rate low-jitter clock signal

If clock frequency to be generated is 1.023MHz, sampled reference clock frequency is 10MHz, if the sampling with routine Method, caused 1.023MHz clock leading edges will be uniformly distributed in [0,0.1 μ s], it is difficult to ranging when realizing high-precision survey. If with the method for the present invention, 10MHz clock waveform is produced in FPGA, then is exported by D/A, its forward position precision is solely dependent upon D/A and digital waveform quantizing bit number.During 8 bit quantization, caused 1.023MHz clock leading edges will be at [0,0.00078 μ s] Inside it is uniformly distributed, forward position precision improves 128 times.If with 16 bit quantizations, forward position precision improves 215 times.

The algorithmic procedure of clock data structure parameter is：

(2) s_clock (0)={ n_positive, p_back, n_nagitive, y_leading }={ 0,0,0,0.5 }；

Caused clock waveform figure is shown in accompanying drawing 2.

Claims

1. the time-amplitude modulation numeric field method for expressing of a kind of low-jitter clock signal, it is characterised in that pass through numeric field Data structure sequence, come represent clock each cycle forward position due in, after along due in, positive half cycle length and negative half period Length parameter, the data structure parameter of adjacent periods can be calculated using iterative algorithm, make the generation of clock, transmission, same Step and processing can be directed to this data structure parameter and carry out.

2. the time-amplitude modulation numeric field method for expressing of low-jitter clock signal as claimed in claim 1, it is characterised in that Ahead of the curve due in and after along the expression of due in, employ time-amplitude modulator approach, by clock signal forward position or The fraction due on edge is modulated on the sample magnitude of two adjacent spaces samplings afterwards, and the broken line and clock for making sample sequence are believed Number zero crossing is overlapped, and the sample quantization of fraction due in is converted into the quantization of sample amplitude, realize clock leading edge and after Along the high accuracy number domain representation of due in.