CN107481926A - A kind of fill method of tungsten - Google Patents
A kind of fill method of tungsten Download PDFInfo
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- CN107481926A CN107481926A CN201710772342.9A CN201710772342A CN107481926A CN 107481926 A CN107481926 A CN 107481926A CN 201710772342 A CN201710772342 A CN 201710772342A CN 107481926 A CN107481926 A CN 107481926A
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 title claims abstract description 58
- 229910052721 tungsten Inorganic materials 0.000 title claims abstract description 58
- 239000010937 tungsten Substances 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 53
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 claims abstract description 29
- 230000008569 process Effects 0.000 claims abstract description 22
- 239000001257 hydrogen Substances 0.000 claims abstract description 21
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 21
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 20
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 20
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 19
- 230000008021 deposition Effects 0.000 claims abstract description 11
- 239000007789 gas Substances 0.000 claims abstract description 11
- 238000000151 deposition Methods 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 19
- 230000007547 defect Effects 0.000 abstract description 9
- 230000015654 memory Effects 0.000 description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000004062 sedimentation Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000009527 percussion Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
- C23C16/14—Deposition of only one other metal element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
Abstract
The present invention provides a kind of fill method of tungsten, filling applied to the control gate of 3D NAND devices, silicon nitride layer in stack layer of the fill process in 3D NAND devices is carried out after being removed, in fill process, reacting gas is hydrogen and tungsten hexafluoride, and pressure is 5 30torr, and temperature is 250 430 DEG C, the flow of hydrogen is 7500 20000sccm, and the flow of tungsten hexafluoride is 60 500sccm.This method is particularly suitable for use in the filling of more deep hole and more high-aspect-ratio, and deposition during filling is low, can effectively reduce the filling defect in the gap and cavity in filling, improve filling quality.
Description
Technical field
The present invention relates to 3D nand memories part and its manufacturing field, more particularly to a kind of fill method of tungsten.
Background technology
Nand flash memory is a kind of storage device more more preferable than hard disk drive, with people pursue low in energy consumption, light weight and
The non-volatile memory product of excellent performance, is widely used in electronic product.At present, the nand flash memory of planar structure has been
The limit of nearly true extension, in order to further improve memory capacity, reduce the carrying cost per bit, it is proposed that 3D structures
Nand memory.
In 3D nand memory structures, by the way of vertical stacking multi-layer data memory cell, stack is realized
3D nand memory structures.When forming 3D nand memories, first, silicon nitride (Si is formed on substrate3N4) layer and oxidation
Silicon (SiO2) layer stack layer, the side wall of stack layer is ladder pattern；Then, raceway groove hole is formed in stack layer
(Channelhole), raceway groove hole is used to form memory block；Formed in raceway groove hole after memory block, by the nitridation in stack layer
Silicon layer removes, and then carries out the filling of metal material, so as to which the silicon nitride layer in stack layer is replaced with into metal level, each layer
Metal level is the control gate of each layer of memory cell, and each layer of ladder of stack layer is used for the contact for forming each layer of control gate
Plug.
At present, the filling of tungsten (W) is typically carried out, to form metal using chemical vapor deposition (CVD) technique
Layer.And as the continuous improvement of integrated level, the number of plies of stack layer are also continuously increased, the size of grid line also constantly reduces, and is filling
During, it may appear that the defects of gap (seam) or empty (void), this can cause to leak electricity and generate heat the problems such as abnormal, shadow
The yield and reliability of Chinese percussion instrument part.
The content of the invention
In view of this, it is an object of the invention to provide a kind of fill method of tungsten, filling defect is reduced, raising is filled out
Mesenchymal amount.
To achieve the above object, the present invention has following technical scheme：
A kind of fill method of tungsten, the stack layer with 3D NAND devices, and the stack layer are formed on substrate
In silicon nitride layer be removed after；The filling of tungsten is carried out, the fill process of the tungsten includes：
Reacting gas is hydrogen and tungsten hexafluoride, and pressure 5-30torr, temperature is 250-430 DEG C, and the flow of hydrogen is
7500-20000sccm, the flow of tungsten hexafluoride is 60-500sccm.
Alternatively, before the filling of tungsten is carried out, the deposition of tungsten Seed Layer is included.
Alternatively, the depositing operation of the tungsten Seed Layer includes：Reacting gas is diborane and tungsten hexafluoride, pressure, temperature
The flow flow with the pressure in the fill process of the tungsten, temperature and tungsten hexafluoride respectively of degree and tungsten hexafluoride
Identical, the flow of diborane is 300-750sccm.
Alternatively, the flow of diborane is 400-500sccm.
Alternatively, the number of plies of the silicon nitride layer of the removal in the stack layer is 32 layers or 64 layers.
Alternatively, in the fill process of the tungsten, pressure 5-15torr.
Alternatively, in the fill process of the tungsten, temperature is 250-300 DEG C, and the flow of tungsten hexafluoride is 100-
300sccm, the flow of hydrogen is 9000-19000.
Alternatively, in the fill process of the tungsten, pressure 30torr, temperature is 250 DEG C, the flow of tungsten hexafluoride
For 60sccm, the flow of hydrogen is 9500sccm.
The fill method of tungsten provided in an embodiment of the present invention, applied to the filling of the control gate of 3D NAND devices,
Silicon nitride layer of the fill process in the stack layer of 3DNAND devices is carried out after being removed, in fill process, reacting gas
For hydrogen and tungsten hexafluoride, pressure 5-30torr, temperature is 250-430 DEG C, and the flow of hydrogen is 7500-20000sccm, six
The flow of tungsten fluoride is 60-500sccm.This method is particularly suitable for use in the filling of more deep hole and more high-aspect-ratio, heavy during filling
Product rate is low, can effectively reduce the filling defect in the gap and cavity in filling, improve filling quality.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are the present invention
Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
These accompanying drawings obtain other accompanying drawings.
Fig. 1-Fig. 5 shows the cross-sectional view in 3D NAND device manufacturing processes.
Embodiment
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with the accompanying drawings to the present invention
Embodiment be described in detail.
Many details are elaborated in the following description to facilitate a thorough understanding of the present invention, still the present invention can be with
It is different from other manner described here using other to implement, those skilled in the art can be without prejudice to intension of the present invention
In the case of do similar popularization, therefore the present invention is not limited by following public specific embodiment.
Secondly, combination schematic diagram of the present invention is described in detail, when the embodiment of the present invention is described in detail, for purposes of illustration only, table
Show that the profile of device architecture can disobey general proportion and make partial enlargement, and the schematic diagram is example, and it should not herein
Limit the scope of protection of the invention.In addition, the three-dimensional space of length, width and depth should be included in actual fabrication.
As the description in background technology, in the manufacturing process of 3D nand memories, using vertical stacking multi-layer data
The mode of memory cell, the 3D nand memory structures of stack are realized, be by the nitrogen in stack layer when forming control gate
After SiClx layer removes, tungsten is filled into, so as to form control gate, the position of filling is filled out between two layers of silicon oxide layer
Easily occur the defects of gap (seam) or empty (void) in filling, especially after integrated level continuous improvement, stack layer
The number of plies be also continuously increased, the size of grid line also constantly reduces, and defect is more obvious, in device in use, electric leakage occurs
The problems such as problem and abnormal heating, influence the yield and reliability of device.
Therefore, the present invention proposes a kind of fill method of tungsten, the heap with 3D NAND devices is formed on substrate
Lamination, and after the silicon nitride layer in the stack layer is removed；Carry out the filling of tungsten, the fill process of the tungsten
Including：
Reacting gas is hydrogen and tungsten hexafluoride, and pressure 5-30torr, temperature is 250-430 DEG C, and the flow of hydrogen is
7500-20000sccm, the flow of tungsten hexafluoride is 60-500sccm.
This method is the filling of tungsten when control gate is formed in the manufacture of 3D NAND devices, and this method is particularly suitable for use in
The filling of more deep hole and more high-aspect-ratio, deposition during filling is low, can effectively reduce gap in filling and cavity
Filling defect, improve filling quality.
Technical scheme for a better understanding of the present invention and technique effect, carried out below with reference to specific embodiment detailed
Thin description.
With reference to shown in figure 1, this method is to form the stack layer 110 with 3D NAND devices on the substrate 100, and described
Silicon nitride layer 1102 in stack layer 110 is removed what is carried out afterwards.
In order to be better understood from technical scheme, the system before first being filled in conjunction with specific embodiments to tungsten
Technique is made to be described in detail.
First, there is provided substrate 100, form stack layer 110 on the substrate 100, the stack layer 110 is nitride layer 1102
It is alternately stacked to form with oxide skin(coating) 1101, with reference to shown in figure 1.
Substrate 100 is Semiconductor substrate, for example, can be Si substrates, Ge substrates, SiGe substrate, SOI (silicon-on-insulator,
Silicon OnInsulator) or GOI (germanium on insulator, GermaniumOnInsulator) etc..In other embodiments,
The Semiconductor substrate can also be to include the substrate of other elements semiconductor or compound semiconductor, for example, GaAs, InP or
SiC etc., can also be laminated construction, such as Si/SiGe etc. can be with other epitaxial structures, such as SGOI (germanium on insulator
Silicon) etc..Normally, substrate is body silicon substrate.
Stack layer 110 is formed by silicon nitride layer and oxide skin(coating) are alternately laminated, what is formed according to needed for vertical direction deposit
The number of storage unit determines the number of plies of stack layer 110, and the number of plies of stack layer 110 is such as can be 32 layers, 64 layers, heap herein
The number of plies of lamination refers to the number of plies of wherein silicon nitride layer, and the silicon nitride layer is sacrifice layer, be will be replaced with subsequent steps
Metal level, is the control gate of memory device, and the number of plies determines the number of memory cell in vertical direction, therefore, stack layer
The number of plies is more, can more improve integrated level.
Chemical vapor deposition, ald or other suitable deposition process can be used, alternating deposit nitrogenizes successively
Silicon and silica, form the stack layer 110；Then, etching technics is passed through so that the edge of stack layer 110 is hierarchic structure, rank
Terraced structure is used for the contact being subsequently formed on control gate, and the middle section of stack layer is used to form depositing in raceway groove hole and raceway groove hole
Storage area.
Then, raceway groove hole 120 is formed in stack layer.
The raceway groove hole 120 is the through hole in stack layer 110, can use lithographic technique, such as RIE (reactive ion etching)
Method, etch stack layer, until exposing substrate surface, or over etching section substrate, so as to, to form the raceway groove hole 120.
Formed after raceway groove hole 120, generally, by selective epitaxial growth (Selective EpitaxialGrowth), first in raceway groove
The bottom growth in situ of hole 110 goes out epitaxial structure 122, and the epitaxial structure 122 plays a part of the memory block in connection raceway groove hole, with
And play a part of support stack layer when removing silicon nitride layer.
Then, memory block is formed in raceway groove hole.
The memory block of nand memory part includes electric charge capture layer and channel layer, in the step, is first formed in raceway groove hole
Electric charge capture layer, in specific embodiment, electric charge capture layer is ONO lamination, and ONO (Oxide-Ntride-Oxide) is aoxidized
Thing, nitride and oxide.The electric charge capture layer of the ONO can be formed by the method for ald (ALD).Depositing
Afterwards, the side wall in raceway groove hole and bottom are covered with electric charge capture layer.Then, the formation of channel layer, specific embodiment are carried out
In, channel layer is formed using polysilicon.The finally fill oxide in raceway groove hole, so as to complete memory block in raceway groove hole
Manufacture.
Then, stack layer 110 is etched with reference to figure 2, forms grid line gap (Gate Line Seam) 130, stitched by grid line
Gap 130 removes the silicon nitride layer 1102 in stack layer 110, with reference to shown in figure 3.
In the silicon nitride layer 1102 in removing stack layer, the acid solution of the high selectivity to silicon nitride and silica is selected,
While silicon nitride is removed in realization, the removal of silica is avoided, in actual process, generally use phosphoric acid (H3PO4) nitrogenized
The removal of silicon layer.
After silicon nitride layer removal, with reference to shown in figure 3, stack layer 110 is engraved structure, between oxide skin(coating) 1101
For vacancy layer 1103, grid line is formed after filling metal wherein, is the control gate of memory cell.The filling of the tungsten of the present invention
Method is exactly the filling of the tungsten of progress after silicon nitride layer removal, compared to the formation of tungsten in other semiconductor technologies,
Tungsten is filled in the engraved structure, it is necessary to which lower fill rate, to improve filling quality, avoids the production of filling defect
It is raw.
During chemical vapor deposition (CVD) deposits tungsten, the reacting gas used is hydrogen (H2) and tungsten hexafluoride (WF6), reaction
The formula of speed i.e. sedimentation rate is as follows：
DepRate=R0e-E/kT[H2]0.5[WF6]0
Wherein：K、R0, E be related sedimentation coefficient；[H2] be hydrogen partial pressure；[WF6] it is WF6Partial pressure；T is temperature.
It can be seen that the speed when partial pressure of the temperature and reacting gas during mainly by reacting is to reduce deposition,
And when being filled for engraved structure in 3D NAND devices, only by the reduction of partial pressure and temperature, to reduce deposition speed
Rate, can bring the resistivity of tungsten high and stress becomes the problem of big, and now control gate of the tungsten as memory, resistance
Rate is high and stress becomes the problem of conference is brought in performance, can not meet the requirement on filling quality and performance simultaneously.
Therefore, inventor passes through research, it is proposed that the problem of the filling for the grid line being directed in above-mentioned 3D NAND devices,
A kind of fill method of tungsten is proposed, now, the stack layer 110 on substrate 100 is engraved structure, with reference to shown in figure 3, is filled out
Technique when filling includes：
Reacting gas is hydrogen and tungsten hexafluoride, and pressure 5-30torr, temperature is 250-430 DEG C, and the flow of hydrogen is
7500-20000sccm, the flow of tungsten hexafluoride is 60-500sccm.
In the filling, pressure when depositing further is reduced, with reference to appropriate temperature and flow, can be obtained preferably
Filling quality, while ensure that the performances such as resistivity and stress also meet to require.
Before tungsten filling is carried out, more preferably, the deposition of tungsten Seed Layer is first carried out.
In the depositing operation of tungsten Seed Layer, reacting gas is diborane (B2H6) and tungsten hexafluoride, tungsten Seed Layer and tungsten fill out
Fill and generally carried out in same equipment, pressure, temperature and tungsten hexafluoride flow are in whole process in the two depositions
Setting can be identical, when specifically depositing, first, technological temperature is selected from 250-430 DEG C of temperature range, from pressure model
Enclose and operation pressure is selected in 5-30torr, B2H6Range of flow be 300-750sccm, WF6Flow be 60-500sccm,
Under this process conditions, the deposition of tungsten is carried out, forms tungsten Seed Layer；Afterwards, B is stopped2H6Supply, and be passed through hydrogen, the stream of hydrogen
Measure as 7500-20000sccm, other process conditions are constant, keep temperature, pressure and WF during previous deposition6Flow,
The filling of the tungsten of more thick-layer is carried out, after filling, the metal level of tungsten is filled between oxide skin(coating) 1101, so as to stack
Grid line 1104 is formed in the vacancy layer of layer, with reference to shown in figure 4, while side wall and heap in grid line gap 130 is stacked on can also sink
Product layer of metal tungsten layer 140, then, can be removed the metal tungsten layer 140 of the part, with reference to figure 5 by wet-etching technology
It is shown.
In more preferred embodiment, the scope of pressure is 5-15torr, and the scope of temperature is 250-300 DEG C, B2H6's
Range of flow is 750-1500sccm, WF6Range of flow be 100-300sccm, H2Range of flow be 9000-
19000sccm.It should be noted that the scope of the parameter such as temperatures above, pressure, flow refers to, and in depositing operation, these ginsengs
Number selection parameter value from the scope.
In a more excellent embodiment, in the fill process of the tungsten, pressure 30torr, temperature is 250 DEG C,
The flow of tungsten hexafluoride is 60sccm, B2H6Flow be 450sccm, the flow of hydrogen is 9500sccm, in the process conditions
Under, sedimentation rate is
In a specific embodiment, pressure 40torr, temperature is 300 DEG C, WF6Flow be 400sccm, H2's
Flow is 19000sccm, and now, the sedimentation rate of tungsten is
In a specific embodiment, pressure 30torr, temperature is 300 DEG C, WF6Flow be 400sccm, H2's
Flow is 19000sccm, and now, the sedimentation rate of tungsten is
In a specific embodiment, pressure 40torr, temperature is 250 DEG C, WF6Flow be 400sccm, H2's
Flow is 19000sccm, and now, the sedimentation rate of tungsten is
In a specific embodiment, pressure 30torr, temperature is 250 DEG C, WF6Flow be 400sccm, H2's
Flow is 19000sccm, and now, the sedimentation rate of tungsten is
More than the deposition of tungsten be particularly suitable for use in the filling of more deep hole and more high-aspect-ratio, applied to 32 layers, 64 layers
3D memory devices grid line fill process in, deposition during filling is low, can effectively reduce the gap in filling and sky
The filling defect in hole, filling quality is improved, while ensure that the performances such as resistivity and the stress of grid line meet to require.
Described above is only the preferred embodiment of the present invention, although the present invention is disclosed as above, so with preferred embodiment
And it is not limited to the present invention.Any those skilled in the art, technical solution of the present invention ambit is not being departed from
Under, many possible changes and modifications are all made to technical solution of the present invention using the methods and technical content of the disclosure above,
Or it is revised as the equivalent embodiment of equivalent variations.Therefore, every content without departing from technical solution of the present invention, according to the present invention's
Technical spirit still falls within the technology of the present invention side to any simple modification, equivalent variation and modification made for any of the above embodiments
In the range of case protection.
Claims (8)
- A kind of 1. fill method of tungsten, it is characterised in that the stack layer with 3D NAND devices is formed on substrate, and After silicon nitride layer in the stack layer is removed；The filling of tungsten is carried out, the fill process of the tungsten includes：Reacting gas is hydrogen and tungsten hexafluoride, and pressure 5-30torr, temperature is 250-430 DEG C, and the flow of hydrogen is 7500- 20000sccm, the flow of tungsten hexafluoride is 60-500sccm.
- 2. according to the method for claim 1, it is characterised in that before the filling of tungsten is carried out, in addition to tungsten seed The deposition of layer.
- 3. according to the method for claim 2, it is characterised in that the depositing operation of the tungsten Seed Layer includes：Reacting gas For diborane and tungsten hexafluoride, the flow of pressure, temperature and tungsten hexafluoride respectively with the fill process of the tungsten The flow of pressure, temperature and tungsten hexafluoride is identical, and the flow of diborane is 300-750sccm.
- 4. according to the method for claim 3, it is characterised in that the flow of diborane is 400-500sccm.
- 5. according to the method for claim 1, it is characterised in that the number of plies of the silicon nitride layer of the removal in the stack layer is 32 layers or 64 layers.
- 6. according to the method any one of claim 1-5, it is characterised in that in the fill process of the tungsten, pressure Power is 5-15torr.
- 7. according to the method for claim 6, it is characterised in that in the fill process of the tungsten, temperature 250-300 DEG C, the flow of tungsten hexafluoride is 100-300sccm, and the flow of hydrogen is 9000-19000.
- 8. according to the method any one of claim 1-5, it is characterised in that in the fill process of the tungsten, pressure Power is 30torr, and temperature is 250 DEG C, and the flow of tungsten hexafluoride is 60sccm, and the flow of hydrogen is 9500sccm.
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