CN107481693A - A kind of display driver circuit and its control method, display device - Google Patents
A kind of display driver circuit and its control method, display device Download PDFInfo
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- CN107481693A CN107481693A CN201710800726.7A CN201710800726A CN107481693A CN 107481693 A CN107481693 A CN 107481693A CN 201710800726 A CN201710800726 A CN 201710800726A CN 107481693 A CN107481693 A CN 107481693A
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- signal
- pulse width
- time schedule
- schedule controller
- control signal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
Abstract
The embodiment of the present invention provides a kind of display driver circuit and its control method, display device, is related to display technology field, can avoid showing that bad picture is shown.The display driver circuit includes gate drivers, pulse width regulator, time schedule controller and detecting signal unit；Detecting signal unit is used to judge whether the first control signal that pulse width regulator provides to gate drivers and the second control signal that time schedule controller provides to gate drivers are short-circuit；And when the first control signal or the second control signal short circuit, to pulse width regulator, and/or, time schedule controller output feedback signal；Pulse width regulator is used for the first enable signal closed according to feedback signal, generation control backlight module；Time schedule controller is used to show the second enable signal of black picture according to feedback signal, generation control display panel.The display driver circuit is used to drive display panel to be shown.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of display driver circuit and its control method, display device.
Background technology
Display, such as (Thin Film Transistor Liquid Crystal Display, film are brilliant by TFT-LCD
Body pipe-liquid crystal display) a kind of panel display apparatus is used as, because it has small volume, low in energy consumption, radiationless and cost of manufacture
The features such as relatively low, and be applied to more and more among high-performance display field.
It is in matrix that the grid line and data wire for setting transverse and longitudinal to intersect in TFT-LCD, the grid line and data wire intersection, which define multiple,
The sub-pix of form arrangement.TFT-LCD is during display, above-mentioned to gate line by line by being scanned line by line to grid line
Sub-pix.Then data voltage is exported to corresponding sub-pix by data wire, to drive sub-pix to be shown.
However, in the prior art, when TFT-LCD during display by extraneous factor, such as noise influence when, meeting
Cause for short circuit to occur to the control signal for driving the drive circuit of above-mentioned grid line to provide so that the control signal of display panel
Lack, it is abnormal so as to cause the gate drive signal that part grid line receives to occur.So, during display,
It is bad to will appear from the display such as not working bright line or region, so that user causes vision after above-mentioned bad picture is seen
Fatigue.
The content of the invention
Embodiments of the invention provide a kind of display driver circuit and its control method, display device, can avoid showing
Bad picture is shown.
To reach above-mentioned purpose, embodiments of the invention adopt the following technical scheme that：
The one side of the embodiment of the present invention, there is provided a kind of display driver circuit, including gate drivers, the display driving
Circuit also includes pulse width regulator, time schedule controller and detecting signal unit；The detecting signal unit respectively with institute
Pulse width regulator is stated with the time schedule controller to be connected；The detecting signal unit is used to judge that the pulse width is adjusted
What the first control signal and the time schedule controller that section device provides to the gate drivers provided to the gate drivers
Whether the second control signal is short-circuit；And when first control signal or the second control signal short circuit, the signal
Detection unit is additionally operable to the pulse width regulator, and/or, the time schedule controller output feedback signal；The pulse
Width adjustor is used for the first enable signal closed according to the feedback signal, generation control backlight module；The sequential control
Device processed is used to show the second enable signal of black picture according to the feedback signal, generation control display panel.
Preferably, the detecting signal unit includes logic judgment module, the first NOT gate, the second NOT gate and OR gate；Institute
The input for stating logic judgment module is connected with the pulse width regulator and the time schedule controller respectively；The logic
Judge module is used to judge whether first control signal of the pulse width regulator output is short-circuit, and will determine that result
Exported by the first output end of the logic judgment module；And/or the logic judgment module is used to judge the sequential control
Whether second control signal of device output processed is short-circuit, and will determine that second output of the result by the logic judgment module
End output；First output end of the logic judgment module connects the first NOT gate input, described in the connection of the second output end
The input of second NOT gate；The output end of first NOT gate is connected with the first input end of the OR gate, and described second is non-
The output end of door is connected with the second input of the OR gate；The output end of the OR gate respectively with the pulse width modulation
Device is connected with the time schedule controller.
Preferably, the display driver circuit also includes electric pressure converter；The electric pressure converter and the pulse width
Adjuster is connected with the time schedule controller；The electric pressure converter is used for described in pulse width regulator output
First control signal and second control signal of time schedule controller output carry out voltage conversion, and export to the grid
Driver.
It is further preferred that the detecting signal unit is integrated in the electric pressure converter.
Preferably, the display driver circuit also includes the source electrode driver being connected with the time schedule controller；It is described
Source electrode driver is used for the second enable signal exported according to the time schedule controller, second makes with this to the output of each sub-pix
The data voltage that energy signal matches.
The another aspect of the embodiment of the present invention, there is provided a kind of display device includes any one display driving as described above
Circuit.
Preferably, the display device also includes backlight module, the backlight module with the display driver circuit
Pulse width regulator is connected.
The embodiment of the present invention provides a kind of side for being used to be controlled any one display driver circuit as described above
Method, methods described include：Detecting signal unit judges the first control signal that pulse width regulator provides to gate drivers
It is whether short-circuit；The detecting signal unit judges whether is the second control signal that time schedule controller provided to the gate drivers
Short circuit；When first control signal or the second control signal short circuit, the detecting signal unit is wide to the pulse
Spend adjuster, and/or, pulse width regulator described in the time schedule controller output feedback signal according to the feedback signal,
The first enable signal that generation control backlight module is closed；The time schedule controller is aobvious according to the feedback signal, generation control
Show the second enable signal of Display panel black picture.
Preferably, when the detecting signal unit includes logic judgment module, the detecting signal unit is to the arteries and veins
Width adjustor is rushed, and/or, the time schedule controller output feedback signal includes：The logic judgment module judges the arteries and veins
Whether short-circuit rush first control signal of width adjustor output, and will determine that result passes through the logic judgment module
First output end exports；And/or the logic judgment module judges second control signal of the time schedule controller output
Whether short circuit is judged, and will determine that result is exported by the second output end of the logic judgment module.
Preferably, when the display driver circuit also includes electric pressure converter, methods described also includes：Electric pressure converter
Second control of first control signal and time schedule controller output to pulse width regulator output
Signal carries out voltage conversion, and will export to the gate drivers.
The embodiment of the present invention provides a kind of display driver circuit and its control method, display device.This is aobvious from the above
Show that detecting signal unit can judge the first control that pulse width regulator provides to gate drivers respectively in drive circuit
Whether the second control signal that signal and time schedule controller provide to gate drivers is short-circuit, when the first control signal or described
During two control signal short circuits, detecting signal unit is additionally operable to pulse width regulator and time schedule controller output feedback signal.
In the case, after pulse width regulator receives above-mentioned feedback signal, it can generate control according to the feedback signal
The first enable signal that backlight module is closed.In addition, after time schedule controller receives above-mentioned feedback signal, it is according to above-mentioned anti-
Feedback signal, generation control display panel show the second enable signal of black picture.In the case, even if above-mentioned first control
Short circuit occurs for any one control signal in signal, the second control signal, due to being shown under the control of the first enable signal
Panel meeting blackening, and/or, cause display panel to show black picture under the control of the second enable signal, therefore due to the short circuit
Caused picture bad phenomenon will not be observed by user, so as to avoid the bad picture from causing asking for user's visual fatigue
Topic.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of structural representation of display device provided in an embodiment of the present invention；
Fig. 2 is the concrete structure schematic diagram of gate drivers in Fig. 1；
Fig. 3 is the structural representation of another display device provided in an embodiment of the present invention；
Fig. 4 is the concrete structure schematic diagram of detecting signal unit in Fig. 1 or Fig. 3；
Fig. 5 is a kind of control method flow chart of display driver circuit provided in an embodiment of the present invention.
Reference：
01- display driver circuits；02- display panels；03- backlight modules；10- pulse width regulators；20- SECO
Device；30- electric pressure converters；301- detecting signal units；311- logic judgment modules；The NOT gates of 321- first；The NOT gates of 331- second；
341- OR gates；40- gate drivers；50- source electrode drivers.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of display driver circuit 01, as shown in figure 1, including pulse width regulator (Pulse
Width Modulation, PWM) 10, time schedule controller (Timer Control, TCON) 20, detecting signal unit 301 and
Gate drivers (Gate on Array, GOA) 40.
Wherein, pulse width regulator 10 is used to provide the first control signal to gate drivers 40.For example, first control
Signal processed can be the supply voltage VGH and VGL exported in the form of analog signal (Analog Signal).
In addition, the time schedule controller 20 is used to provide the second control signal to gate drivers 40.For example, this and control
Signal can be in the form of data signal (Digital Signal) export initial signal STV (Start Vertical) with
And clock signal clk.
Based on this, because time schedule controller 20 and pulse width regulator 10 state the offer of gate drivers 40 directly up
The amplitude of signal is too small, and the grid line on display panel 02 is driven insufficient for gate drivers 40.Therefore need
Between time schedule controller 20 and gate drivers 40, and level is set between pulse width regulator 10 and gate drivers 40
Converter (Level Shift) 30.
In the case, electric pressure converter 30 is connected with pulse width regulator 10.Electric pressure converter 30 is used for arteries and veins
Above-mentioned first control signal of the output of width adjustor 10 is rushed, i.e., above-mentioned VGH, VGL are changed, and obtain the signal of amplitude raising
VGH ', VGL ', and export to gate drivers 40.
In addition, the electric pressure converter 30 is also connected with time schedule controller 20.The electric pressure converter 30 is additionally operable to sequential
Above-mentioned second control signal that controller 20 exports, i.e., above-mentioned STV, CLK carry out voltage conversion, obtain the signal of amplitude raising
STV ', CLK ', and export to gate drivers 40.
Hereinafter, above-mentioned first control signal exported with electric pressure converter 30 to above-mentioned pulse width regulator 10, i.e., on
State exemplified by VGH, VGL changed, the transfer process of the electric pressure converter 30 is illustrated.Specifically, pulse width modulation
In above-mentioned first control signal that device 10 exports, VGH is usually 3.3V, and VGL is usually 0V.In the case, voltage is passed through
After converter 30 is changed to above-mentioned first control signal, obtained signal VGH ' is about 30V, and VGL ' is about -6V.So
One, input can be increased to the amplitude of the control signal of gate drivers 40 so that the grid of the gate drivers 40 output
Drive signal can gate to grid line.
Based on this, as shown in Fig. 2 above-mentioned gate drivers 40 including multiple cascades shift register cell (RS1,
RS2……RSn)。
Wherein, level translator 30 to every one-level shift register cell provide signal VGH ' after voltage conversion,
VGL ' and CLK '.So that per one-level shift register cell by respective signal output part OUT, to coupled
Grid line (G1, G2 ... or Gn) output gated sweep signal.
In addition, level translator 30 is provided by electricity to first order shift register cell RS1 signal input part INPUT
Signal STV ' after pressure conversion.After signal STV ' exports initial signal, above-mentioned gate drivers 40 are started working.
On this basis, above-mentioned detecting signal unit 301 is used to judge pulse width regulator 10 to raster data model respectively
The second control signal that the first control signal (VGH, VGL) and time schedule controller 20 that device 40 provides provide to gate drivers 40
Whether (STV, CLK) be short-circuit.
In the case, when the first control signal or the second control signal short circuit, detecting signal unit 301 is also used
In to the output feedback signal FB of pulse width regulator 10；Or the detecting signal unit 301 is additionally operable to time schedule controller 20
Output feedback signal FB；Or detecting signal unit 301 be additionally operable to it is defeated to pulse width regulator 10 and time schedule controller 20
Go out feedback signal FB.
It should be noted that the first control signal short circuit (Short) refers to that VGH, VGL in the first control signal are mutual
Short circuit or respectively be grounded terminal shortcircuit.Specifically include：VGH and VGL Short；VGH and GND Short；VGL and GND
Short。
Or above-mentioned second control signal short circuit refers to that STV, CLK in the second control signal are short with earth terminal respectively
Road.Specifically include：STV and GND Short；CLK and GND Short.
Based on this.After pulse width regulator 10 receives above-mentioned feedback signal FB, the pulse width regulator 10 is used
In the first enable signal closed according to feedback signal FB, generation control backlight module (Backlight Module, BLM) 03
CN1。
Specifically, specific pin (PIN) can be set to make for sending above-mentioned first in pulse width regulator 10
Can signal CN1.In the case, after backlight module 03 receives above-mentioned first enable signal CN1, the backlight mould can be controlled
Light source in group 03 is closed, and is stopped luminous.The now blackening due to no backlight of display panel 02.
And/or after time schedule controller 20 receives above-mentioned feedback signal FB, the time schedule controller 20 is used for according to above-mentioned
Feedback signal FB, generation control display panel 02 show the second enable signal CN2 of black picture.Now display panel 02 is shown
Black picture.
In the case, even if appointing in above-mentioned first control signal (VGH, VGL), the second control signal (STV, CLK)
Short circuit occurs for one control signal of meaning, due to the meeting of display panel 02 blackening under the first enable signal CN1 control, and/or,
Second enable signal CN2 controls are lower to cause display panel 02 to show black picture, therefore because picture caused by the short circuit is bad
Phenomenon will not observe by user, the problem of so as to avoid the bad picture from causing user's visual fatigue.
On this basis, in order to reduce the area that above-mentioned detecting signal unit 301 takes wiring area, it is preferred that such as Fig. 3
Shown, the detecting signal unit 301 can be integrated in electric pressure converter 30.
Hereinafter, the structure of above-mentioned detecting signal unit 301 is described in detail.It is specifically, as shown in figure 4, above-mentioned
Detecting signal unit 301 includes logic judgment module 311, the first NOT gate 321, the second NOT gate 331 and OR gate 341.
Specifically, the input of logic judgment module 311 respectively with above-mentioned pulse width regulator 10 and time schedule controller
20 are connected, so that the logic judgment module 311 can receive the first control letter of the output of pulse width regulator 10
Number (VGH, VGL), and receive the second control signal (STV, CLK) of the output of time schedule controller 20.
In the case, the logic judgment module 311 is used for above-mentioned first control for judging that pulse width regulator 10 exports
Whether signal (VGH, VGL) processed is short-circuit, and will determine that result is exported by the first output terminals A of the logic judgment module 311.
And/or the logic judgment module 311 is used for above-mentioned second control signal for judging that time schedule controller 20 exports
Whether (STV, CLK) be short-circuit, and will determine that result is exported by the second output end B of the logic judgment module 311.
From the foregoing, the first control signal (VGH, VGL) is analog signal, and the second control signal (STV, CLK) number
Word signal.Therefore above-mentioned logic judgment module 311 can be judged the short-circuit state of analog signal and data signal respectively,
And it will determine that result is exported by different output terminals As or B.
On this basis, the first output terminals A connection input of the first NOT gate 321 of above-mentioned logic judgment module 311, second
The input of the second NAND gate of output end B connections 331.
In addition, the output end of the first NOT gate 321 is connected with the first input end of above-mentioned OR gate 341, the second NOT gate 331
Output end is connected with the second input of the OR gate 341.Also, the output end of the OR gate 341 respectively with pulse width modulation
Device 10 is connected with time schedule controller 20.
In the case, by the true of form non-of above-mentioned first NOT gate 321, the second NOT gate 331 and OR gate 341 plus OR gate
It is as shown in table 1 to be worth table.
Table 1
| Signal condition | A | B | C | D | E |
| VGH and VGL Short | 0 | 0/1 | 1 | 1 | 1 |
| VGH and GND Short | 0 | 0/1 | 1 | 1 | 1 |
| CLK and GND Short | 0/1 | 0 | 1 | 1 | 1 |
| STV and GND Short | 0/1 | 0 | 1 | 1 | 1 |
| VGL and GND Short | 0 | 0/1 | 1 | 1 | 1 |
| Without short circuit | 1 | 1 | 0 | 0 | 0 |
Wherein, during the first output terminals A output " 0 " of logic judgment module 311, represent to input to this in the form of analog voltage
The short-circuit condition described in table 1, such as VGH be present in the signal in the first control signal (VGH, VGL) of logic judgment module 311
With VGL Short, VGH and GND Short or VGL and GND Short.And when the first output terminals A of logic judgment module 311
When exporting " 1 ", represent input to any one signal in the first control signal (VGH, VGL) of the logic judgment module 311
Short circuit does not occur.
In addition, during the second output end B outputs " 0 " of logic judgment module 311, represent to input to this in the form of digital voltage
The short-circuit condition described in table 1, such as CLK be present in the signal in the second control signal (STV, CLK) of logic judgment module 311
With GND Short or STV and GND Short.And when the second output end B of logic judgment module 311 exports " 1 ", represent
Short circuit does not occur for input to any one signal in the second control signal (STV, CLK) of the logic judgment module 311.
Specifically, above-mentioned table 1 is illustrated by taking VGH and VGL Short as an example, when signal VGH and signal VGL generations are short
Lu Shi, there is above-mentioned the first output terminals A output " 0 " for understanding logic judgment module 311.In the case, no matter the second control is believed
Signal in number (STV, CLK) exports " 0 " or defeated with the presence or absence of short circuit, i.e. the second output end B of the logic judgment module 311
Go out " 1 ", after above-mentioned non-plus OR gate, the feedback signal FB of the output end C outputs of OR gate 341 is " 1 ".
In the case, the input D of pulse width regulator 10 receives the above-mentioned feedback signal FB for " 1 ", according to
Feedback signal FB generates the first enable signal CN1, and exports to backlight module 03, to cause backlight module 03 by its inside
Light source turns off.
And/or the input E of time schedule controller 20 receives the above-mentioned feedback signal FB for " 1 ", according to the feedback signal
FB generates the second enable signal CN2.
In the case, when above-mentioned display driver circuit 01, as shown in figure 3 or 4, in addition to the phase of time schedule controller 20
During the source electrode driver 50 of connection.The source electrode driver 50 can receive above-mentioned second enable signal CN2, and according to this second
Enable signal CN2, the data voltage to match to the output of each sub-pix with second enable signal CN2.Specifically, due to
Two enable signal CN2 can control display panel 02 to show black picture.Therefore, above-mentioned source electrode driver 50 receive this second
Can be to the data voltage Vdata that the output of each sub-pix matches with grey decision-making L0 after enable signal CN2.
The embodiment of the present invention provides a kind of display device, including as above searches any one display driver circuit 01 of book.Should
Display device has the identical beneficial effect of display driver circuit 01 provided with previous embodiment, and here is omitted.
It should be noted that in embodiments of the present invention, above-mentioned display device can specifically include liquid crystal display device, example
Such as display device can be display, TV, DPF, mobile phone or any product with display function of tablet personal computer
Or part.
On this basis, as shown in figure 1, the display device also includes backlight module 03, the backlight module 03 drives with display
Pulse width regulator 10 in dynamic circuit 01 is connected.In the case, the pulse width regulator 10 can be to backlight mould
The luminosity of group 03 is adjusted.In addition, when pulse width regulator 10 receives the feedback of the output of detecting signal unit 301
During signal FB, the pulse width regulator 10 can also be provided for turn off the back of the body by specific pin to backlight module 03
First enable signal CN1 of light source in optical mode group 03.
Offer of the embodiment of the present invention is a kind of to be used for what any one display driver circuit 01 as described above was controlled
Method, as shown in figure 5, the above method includes：
S101, as shown in Figure 1, detecting signal unit 301 judges that pulse width regulator 10 carries to gate drivers 40
Whether the first control signal (VGH, VGL) supplied is short-circuit.
S102, above-mentioned detecting signal unit 301 judge the second control that time schedule controller 20 provides to gate drivers 40
Whether signal (STV, CLK) is short-circuit.
It should be noted that the present invention is not limited above-mentioned steps S101 and step S102 sequencing.Preferably,
When input to the first control signal (VGH, VGL) of the detecting signal unit 301 and the signal of the second control signal (STV, CLK)
When transmission speed is suitable, above-mentioned steps S101 and step S102 can be carried out simultaneously.
S103, when above-mentioned first control signal (VGH, VGL) or the second control signal (STV, CLK), the signal detection
Unit 301 is to the output feedback signal FB of pulse width regulator 10；
Or when above-mentioned first control signal (VGH, VGL) or the second control signal (STV, CLK), signal detection list
Member 301 exports above-mentioned feedback signal FB to time schedule controller 20；
Or when above-mentioned first control signal (VGH, VGL) or the second control signal (STV, CLK), signal detection
Unit 301 exports above-mentioned feedback signal FB to pulse width regulator 10 and time schedule controller 20.
S104, when the pulse width regulator 10 receives above-mentioned feedback signal FB, the pulse width regulator 10
According to feedback signal FB, the first enable signal CN1 of the generation control closing of backlight module 03.
S105, when the time schedule controller 20 receives above-mentioned feedback signal FB, the time schedule controller 20 is according to feedback letter
Number FB, generation control display panel 02 show the second enable signal CN2 of black picture.
It should be noted that when pulse width regulator 10 and time schedule controller 20 receive above-mentioned feedback signal FB
When, the present invention is not limited above-mentioned steps S104 and step S105 sequencing.Preferably, when input to pulse width is adjusted
When section device 10 is suitable with the feedback signal FB of time schedule controller 20 signaling rate, above-mentioned steps S104 and step S105 can
To carry out simultaneously.
On this basis, when detecting signal unit 301 includes logic judgment module 311 as shown in Figure 4, the signal detection
Unit 301 to pulse width regulator 10, and/or, the output feedback signal FB of time schedule controller 20 includes：
Logic judgment module 311 judges whether the first control signal (VGH, VGL) that pulse width regulator 10 exports is short
Road, and will determine that result is exported by the first output terminals A of logic judgment module 311.
Wherein, logic judgment module 311 to the first control signal (VGH, VGL) whether the deterministic process as above institute of short circuit
State, here is omitted.
And/or logic judgment module 311 judge time schedule controller 20 export the second control signal (STV, CLK) whether
Short circuit is judged, and will determine that result is exported by the second output end B of the logic judgment module 311.
Wherein, logic judgment module 311 to the second control signal (STV, CLK) whether the deterministic process as above institute of short circuit
State, here is omitted.
On this basis, it is above-mentioned as such as Fig. 1 of display driver circuit 01 or as shown in figure 3, when also including electric pressure converter 30
Method also includes：
First control signal (VGH, VGL) of the pulse-width adjuster 10 of electric pressure converter 30 output is turned
Change, obtain signal VGH ', the VGL ' of amplitude raising, and export to gate drivers 40.
Electric pressure converter 30 also carries out voltage conversion to the second control signal (STV, CLK) that time schedule controller 20 exports,
Signal STV ', the CLK ' of amplitude raising are obtained, and is exported to gate drivers 40.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any
Those familiar with the art the invention discloses technical scope in, change or replacement can be readily occurred in, should all be contained
Cover within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (10)
1. a kind of display driver circuit, including gate drivers, it is characterised in that it is wide that the display driver circuit also includes pulse
Spend adjuster, time schedule controller and detecting signal unit；
The detecting signal unit is connected with the pulse width regulator and the time schedule controller respectively；
The detecting signal unit is used for the first control for judging that the pulse width regulator provides to the gate drivers
Whether the second control signal that signal and the time schedule controller provide to the gate drivers is short-circuit；And when described first
When control signal or the second control signal short circuit, the detecting signal unit is additionally operable to the pulse width regulator,
And/or the time schedule controller output feedback signal；
The pulse width regulator is used for according to the feedback signal, the first enabled letter that generation control backlight module is closed
Number；
The time schedule controller is used for according to the feedback signal, and generation control display panel shows that the second of black picture enables
Signal.
2. display driver circuit according to claim 1, it is characterised in that the detecting signal unit includes logic judgment
Module, the first NOT gate, the second NOT gate and OR gate；
The input of the logic judgment module is connected with the pulse width regulator and the time schedule controller respectively；Institute
State logic judgment module to be used to judge whether first control signal of the pulse width regulator output is short-circuit, and will sentence
Disconnected result is exported by the first output end of the logic judgment module；And/or the logic judgment module is described for judging
Whether second control signal of time schedule controller output is short-circuit, and will determine that result the by the logic judgment module
Two output ends export；
First output end of the logic judgment module connects the first NOT gate input, the second output end connection described second
The input of NOT gate；
The output end of first NOT gate is connected with the first input end of the OR gate, the output end of second NOT gate and institute
The second input for stating OR gate is connected；The output end of the OR gate respectively with the pulse width regulator and the sequential control
Device processed is connected.
3. display driver circuit according to claim 1 or 2, it is characterised in that the display driver circuit also includes electricity
Pressure converter；
The electric pressure converter is connected with the pulse width regulator and the time schedule controller；The electric pressure converter is used
In second control that first control signal exported to the pulse width regulator and the time schedule controller export
Signal processed carries out voltage conversion, and exports to the gate drivers.
4. display driver circuit according to claim 3, it is characterised in that the detecting signal unit is integrated in the electricity
In pressure converter.
5. display driver circuit according to claim 1, it is characterised in that the display driver circuit also include with it is described
The source electrode driver that time schedule controller is connected；The source electrode driver is used to make according to the second of time schedule controller output
Energy signal, the data voltage to match to the output of each sub-pix with second enable signal.
6. a kind of display device, it is characterised in that including the display driver circuit as described in claim any one of 1-5.
7. display device according to claim 6, it is characterised in that the display device also includes backlight module, described
Backlight module is connected with the pulse width regulator in the display driver circuit.
8. a kind of method for being controlled to the display driver circuit as described in claim any one of 1-5, its feature exists
In methods described includes：
Detecting signal unit judges whether the first control signal that pulse width regulator provides to gate drivers is short-circuit；
The detecting signal unit judges whether the second control signal that time schedule controller provides to the gate drivers is short-circuit；
When first control signal or the second control signal short circuit, the detecting signal unit is to the pulse width
Adjuster, and/or, the time schedule controller output feedback signal；
The first enable signal that the pulse width regulator is closed according to the feedback signal, generation control backlight module；
For the time schedule controller according to the feedback signal, generation control display panel shows the second enabled letter of black picture
Number.
9. according to the method for claim 8, it is characterised in that when the detecting signal unit includes logic judgment module
When, the detecting signal unit to the pulse width regulator, and/or, the time schedule controller output feedback signal includes：
The logic judgment module judges whether first control signal of the pulse width regulator output is short-circuit, and will
Judged result is exported by the first output end of the logic judgment module；
And/or the logic judgment module judges whether short circuit is entered for second control signal of time schedule controller output
Row judges, and will determine that result is exported by the second output end of the logic judgment module.
10. according to the method for claim 8, it is characterised in that when the display driver circuit also includes electric pressure converter
When, methods described also includes：
First control signal and time schedule controller output that electric pressure converter exports to the pulse width regulator
Second control signal carry out voltage conversion, and will output to the gate drivers.
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| CN201710800726.7A CN107481693B (en) | 2017-09-06 | 2017-09-06 | A kind of display driver circuit and its control method, display device |
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| CN107481693B (en) | 2019-10-01 |
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