CN107393954A - A kind of GaN hetero-junctions vertical field effect pipe - Google Patents
A kind of GaN hetero-junctions vertical field effect pipe Download PDFInfo
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- 230000005669 field effect Effects 0.000 title claims abstract description 14
- 230000004888 barrier function Effects 0.000 claims abstract description 15
- 238000007667 floating Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910052906 cristobalite Inorganic materials 0.000 claims description 3
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 3
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 3
- 239000000203 mixture Substances 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 229910052682 stishovite Inorganic materials 0.000 claims description 3
- 229910052905 tridymite Inorganic materials 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 229910017083 AlN Inorganic materials 0.000 claims 1
- 230000002441 reversible effect Effects 0.000 abstract description 10
- 230000008901 benefit Effects 0.000 abstract description 9
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 6
- 238000011084 recovery Methods 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 abstract 1
- 238000005036 potential barrier Methods 0.000 abstract 1
- 229910002601 GaN Inorganic materials 0.000 description 28
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 28
- 238000000034 method Methods 0.000 description 12
- 230000008569 process Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 230000005684 electric field Effects 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000013517 stratification Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7788—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1037—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure and non-planar channel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
- H01L29/475—Schottky barrier electrodes on AIII-BV compounds
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Abstract
The present invention relates to technical field of semiconductor device, is related to a kind of GaN hetero-junctions vertical field effect pipe.The present invention uses longitudinal discrete gate structure, between schottky source is deposited on into grid, forms the inverse anode for leading diode.By introducing back of the body potential barrier that p-type base formed and notched gates collective effect exhausts two-dimensional electron gas (2DEG) at grid lower channels, and can be by adjusting the etch thicknesses accuracy controlling threshold voltages of AlMN barrier layers.Beneficial effects of the present invention are, under positive switch working state, have that threshold voltage is adjustable, and conducting resistance is low, saturation current is big, OFF state high pressure, working frequency height and the advantages that low-power consumption;It is inverse lead working condition under, have that cut-in voltage is low, conducting resistance is low, reversely pressure-resistant big, reverse recovery time is short and the advantages that low-power consumption.Its manufacturing process is compatible with traditional GaN hetero-junctions HEMT device simultaneously.Present invention is particularly suitable for GaN hetero-junctions longitudinal direction power field effect pipe.
Description
Technical field
The present invention relates to technical field of semiconductor device, is related to GaN hetero-junctions power field effect pipes.
Background technology
As the Typical Representative of third generation wide bandgap semiconductor, gallium nitride (GaN) has many excellent characteristics:It is high critical
Breakdown electric field (~3.5 × 106V/cm), high electron mobility (~2000cm2/ vs), high two-dimensional electron gas (2DEG) concentration
(~1013cm-2) and good high temperature operation capability etc..HEMT based on AlGaN/GaN hetero-junctions
(HEMT) (or HFET HFET, modulation-doped FET MODFET, hereafter referred to collectively as HEMT devices
Part) it has been applied in the RF/Microwave fields such as radio communication, satellite communication.In addition, such based on broad stopband GaN materials
Device has the characteristics such as OFF state is pressure-resistant or reverse BV is high, forward conduction resistance is low, working frequency is high, efficiency is high, can be with
Meet system more high-power to semiconductor devices, higher frequency, smaller volume, more low-power consumption and can more endure harsh environments
Requirement.
FET occupies extremely important status in semiconductor applications.In recent years, the field effect based on GaN heterojunction materials
Should pipe have been achieved for large development.However, traditional GaN hetero junction field effect pipes are mostly transversary, shape is turned off in device
Under state, voltage is mainly born by the drift region between grid and drain electrode, because electric field is in drift region skewness, peak electric field
The gate edge close to drain terminal is appeared in, causes device to puncture in advance, inducing current avalanche is heterogeneous so as to play GaN
The advantage of senior engineer's working frequency, low on-resistance and high withstand voltage possessed by junction device.In powerful power electronic system, one
As fly-wheel diode can be selected to be connected in parallel on switching tube both ends, to prevent in circuit caused induced electromotive force to puncture or burn
Switching tube.However, discrete fly-wheel diode not only increases the volume and cost of system, and parasitic capacitance is added with posting
Raw inductance, so as to cause switching loss to increase.Traditional GaN PN junction diodes are because cut-in voltage is excessive, and p-type GaN sky
Cave mobility is too low, is not appropriate for using as fly-wheel diode.Therefore a kind of reversible longitudinal GaN hetero-junctions for leading work is developed
FET is significant for practical application.
The content of the invention
It is to be solved by this invention, the problem of presence aiming at above-mentioned traditional GaN hetero-junctions power field effect pipe, propose
A kind of GaN hetero-junctions of vertical stratification is against conductivity type FET.When being operated in positive on off state, the device has electric conduction
Hinder low, saturation current is big, and OFF state is pressure-resistant and the high advantage of working frequency;In inverse lead under working condition, the device, which has, to be opened
Voltage is low, conducting resistance is low, reversely pressure-resistant big and short reverse recovery time advantage.
Technical scheme is used by the present invention solves above-mentioned technical problem:A kind of GaN hetero-junctions is inverse to lead FET, this
Invent as bilateral symmetry, including GaN N-type heavy doping substrate 1, the GaN lightly doped n types drift region 2 on substrate 1, position
AlMN layers 5 on the lightly doped n type drift region 2, the N-type drift region 2 and AlMN layers 5 form hetero-junctions, the N-type drift
Move in area 2 and be provided with p-type base 3 and floating P areas 10, the JFET areas 12 between the p-type base, positioned at the p-type base
Channel region 9 between area 3 and the AlMN floor 5, Ohmic contact is formed with two-dimensional electron gas (2DEG) and the p-type base 3
Source electrode 4, the grid 6 on the AlMN layers, the groove 13 positioned at the lower section of the grid 6, above AlMN layers 5
Schottky source 8, the gate medium 7 above chatted AlMN layers, the electric leakage positioned at the lower section of GaN N-types heavy doping substrate 1
Pole 11.
The total technical scheme of the present invention, the Two-dimensional electron of heterojunction boundary is reduced using notched gates structure and p-type base
Gas (2DEG) concentration realizes the modulation of threshold voltage so as to obtain higher threshold voltage;Utilize p-type base and N-type drift region
The GaN base PN junction formed bears standoff voltage with floating P areas, reduces OFF state electric leakage;Using different work functions metal with
The inverse cut-in voltage for leading diode of different schottky barrier heights modulation that the contact of AlMN barrier layers is formed.It may be noted that
It is the thickness of the AlMN barrier layers below grid, the Al components of AlMN barrier layers, or has doping in AlMN barrier layers and mix
When miscellaneous distribution is different, to realize that the depth of groove corresponding to same threshold voltage can not with carrying on the back the doping concentration of barrier region
Together.
Specifically, M is one kind in Ga, In and Ga and In mixture in the AlMN layers 5.
Specifically, the thickness of the AlMN barrier layers 5 of the lower section of schottky source 8 is more than 10nm.
Specifically, the gate medium 7 is SiO2、Si3N4、AlN、Al2O3, MgO and HfO2In one kind.
Beneficial effects of the present invention are, when being operated in positive on off state, the device has that conducting resistance is low, saturation current
Greatly, OFF state is pressure-resistant and the high advantage of working frequency;It is operated in inverse when leading rectification state, the device has that cut-in voltage is low, conducting
Resistance is low, reversely pressure-resistant big and short reverse recovery time advantage, while its manufacturing process and the horizontal GaN hetero-junctions HEMT of tradition
Device is compatible, reduces the switching loss that discrete device is brought, improves the efficiency and stability of Power Electronic Circuit system.
Brief description of the drawings
Fig. 1 is the structural representation of the present invention;
Fig. 2 epitaxial growth N-type drift region schematic diagrames in technological process for the present invention;
Fig. 3 selective epitaxial growth floating P areas schematic diagrames in technological process for the present invention;
Fig. 4 selective epitaxial growth p-type GaN base area schematic diagrames in technological process for the present invention;
Fig. 5 schematic diagrames of epitaxial growth JFET areas and channel region in technological process for the present invention;
Fig. 6 is the schematic diagram that present invention epitaxial growth AlMN barrier layers in technological process form 2DEG raceway grooves;
Fig. 7 is the schematic diagram that the present invention etches AlMN barrier layers in technological process;
Fig. 8 is the schematic diagram that the present invention deposits gate medium in technological process;
Fig. 9 is the cutting of the invention in technological process and forms the schematic diagram of source electrode Ohmic contact;
Figure 10 is the schematic diagram that the present invention forms back-side drain Ohmic contact in technological process;
Figure 11 is the schematic diagram that the present invention deposits gate metal in technological process;
Figure 12 is that etching gate medium forms the schematic diagram of schottky source and field plate to the present invention completely in technological process;
Embodiment
Below in conjunction with the accompanying drawings, technical scheme is described in detail:
The present invention proposes a kind of high-performance GaN hetero-junctions against conductivity type FET, different from traditional lateral field-effect pipe,
The present invention uses longitudinal discrete gate structure, and deposits schottky source among two grids.The present invention is by etching AlMN gesture
Barrier layer makes device have higher threshold voltage with p-type base to reduce the concentration of the two-dimensional electron gas in raceway groove (2DEG).Due to
The device is using vertical structure and floating P areas be present, and Electric Field Distribution is uniform more than traditional transversal device, and device can be made to realize height
It is pressure-resistant, wafer area is saved while low on-resistance.It is inverse lead working condition under, the unlatching of Schottky diode of the invention
Voltage is far below the cut-in voltage of GaN PN junctions, can effectively reduce conducting power consumption during reverse afterflow.Closed when the device is in
State is pressure-resistant or reversely resistance to pressure condition when, depletion region that base and drift region are formed shields the electric field for pointing to schottky junction, Xiao
The field plate structure of special base junction both sides can reduce the electric-field intensity at main knot edge, the reverse leakage current of schottky junction is significantly subtracted
It is few, the temperature stability of schottky junction is improved, so as to reduce the leakage current of the device in a high voltage state.Discrete gate energy
It is enough effectively to reduce gate area, gate charge Qg caused by the resistance to pressure of OFF state is greatly reduced.Compared with traditional transversal device, this hair
Bright peak electric field not appears in surface.And the near interface of P areas and N-type drift region is appeared in, can effectively it suppress by surface
Current collapse caused by state and interfacial state, so as to reduce the switching loss of device.And the afterflow Schottky diode is more sub
Device, almost stored under positive working condition without few son, reverse recovery time will be far smaller than GaN PN junctions, can be significantly
The working frequency of circuit system is lifted, reduces switching loss.Therefore the inverse FET of leading of GaN hetero-junctions provided by the present invention works
In positive on off state, there is the advantages of conducting resistance is low, and saturation current is big, and OFF state is pressure-resistant and working frequency is high.Led inverse
Under working condition, the device has the advantages of cut-in voltage is low, conducting resistance is low, and reversely pressure-resistant big and reverse recovery time is short.
And the device preparation technology of the invention announced and traditional GaN HEMT process compatibles.
As shown in figure 1, the GaN hetero-junctions of the present invention is inverse to lead FET, including GaN N-type heavy doping substrate 1, positioned at lining
GaN lightly doped n types drift region 2 on bottom 1, the AlMN layers 5 on the lightly doped n type drift region 2, the N types drift region
2 and AlMN layers 5 form hetero-junctions, p-type base 3 and floating P areas 10 are provided with the N-type drift region 2, positioned at the p-type base
JFET areas 12 between area, the channel region 9 between the p-type base 3 and the AlMN layers 5, with two-dimensional electron gas
(2DEG) and the p-type base 3 form the source electrode 4 of Ohmic contact, the grid 6 on the AlMN layers, positioned at described
The groove 13 of the lower section of grid 6, the schottky source 8 above AlMN layers 5, the gate medium 7 above chatted AlMN layers, position
Drain electrode 11 in the lower section of GaN N-types heavy doping substrate 1.
The present invention operation principle be:
Under the common depletion action of notched gates and p-type base, the two-dimensional electron gas (2DEG) in raceway groove below grid is dense
Degree reduces, and realizes higher threshold voltage.When grid institute making alive is less than cut-in voltage, there is no electronics at the raceway groove below grid
Accumulation, 2DEG conducting channels disconnect, it is impossible to form current path;When grid applies positive voltage, and is more than cut-in voltage, grid
Electronics is accumulated at raceway groove below pole, forms the current path from drain-to-source, device is opened.
When grid institute making alive is more than threshold voltage, source electrode applies 0 current potential, and when drain electrode applies positive potential, device is opened, place
In positive working condition.
When grid institute making alive is less than threshold voltage, source electrode applies 0 current potential, and when drain electrode applies positive voltage, device, which is in, to close
State.The PN junction that drain voltage is mainly formed by p-type base and N-type drift region undertakes, and electric field is in p-type base and N-type drift region
Near interface reaches maximum.Traditional transversal device is contrasted, Electric Field Distribution of the invention is more uniform, as drain voltage increases
Greatly, region and intermediate region extension, floating P areas can reduce near p-type base and N-type drift region PN junction depletion region downwards
Electric-field intensity, improve device voltage endurance capability.The depletion region that PN junction is formed can effectively shield the electricity for pointing to schottky junction
, schottky junction is reduced the electric-field intensity at main knot edge from bearing high pressure, the field plate structure of schottky junction both sides,
Avoid schottky junction from tying edge breakdown, effectively reduce the reverse leakage of Schottky contacts, improve the temperature of schottky junction
Stability.
When grid and drain electrode apply 0 current potential, when source electrode applies positive potential, the device is in inverse and leads working condition, works as source electrode
When voltage exceedes the cut-in voltage of schottky junction, electric current flows through drain electrode by source electrode.The present invention can be by using different work functions
Metal adjusts the cut-in voltage of schottky junction.
The present invention can be by adjusting the growth thickness of AlMN barrier layers below P-type grid electrode come adjusting threshold voltage.
The invention provides a kind of optional preparation technology flow chart, comprise the following steps:
The first step:Such as Fig. 2, epitaxial growth N-type drift region.
Second step:Such as Fig. 3, selective epitaxial growth floating P areas.
3rd step:Such as Fig. 4, selective growth p-type base.
4th step:Such as Fig. 5, epitaxial growth JFET areas and channel region.
5th step:Such as Fig. 6, epitaxial growth AlMN barrier layers.
6th step:Such as Fig. 7, AlMN barrier layers are etched.
7th step:Such as Fig. 8, gate medium is deposited.With atomic layer deposition (ALD) or plasma enhanced chemical vapor deposition
(PECVD)
Mode deposit dielectric SiO2、Si3N4、AlN、Al2O3, MgO or HfO2Deng and dielectric layer it is graphical.
8th step:Such as Fig. 9, cutting simultaneously forms source electrode Ohmic contact.
9th step:Such as Figure 10, back-side drain Ohmic contact is formed.
Tenth step:Such as Figure 11, gate metal is deposited.
11st step:Such as Figure 12, schottky source and field plate are formed.
Embodiments of the invention are the foregoing is only, are not intended to limit the scope of the invention, it is every to utilize this hair
The equivalent structure or equivalent flow conversion that bright specification and accompanying drawing content are done, or directly or indirectly it is used in other related skills
Art field, is included within the scope of the present invention.
Claims (5)
1. a kind of GaN hetero-junctions vertical field effect pipe, including be cascading from bottom to up drain electrode (11), N-type substrate
(1), N-type drift region (2), AlMN layers (5) and active area, the N-type drift region (2) and AlMN layers (5) form hetero-junctions;It is described
The right and left in N-type drift region (2) is respectively provided with p-type base (3) and floating P areas (10), and p-type base (3) and floating P areas
(10) it is symmetric with the median vertical line of N-type drift region (2), p-type base (3) are located above floating P areas (10);Described
There are JFET areas (12) between the p-type base (3) of the right and left, between the p-type base (3) and the AlMN layers (5)
There is channel region (9);The active area of the device includes source electrode (4), grid (6) and Schottky anode (8), wherein, institute
Schottky anode (8) is stated to be located at directly over JFET areas (12), and Schottky anode (8) is in " T " font, Schottky anode (8)
Median vertical line overlaps with device median vertical line, and active area is in full symmetric distributed architecture with the median vertical line of Schottky anode (8);
Source electrode (4) the surface both sides on the device, and source electrode (4) is through AlMN layers (5) and channel region (9) and p-type base
(3) contact and form Ohmic contact;Grid (6) is located between source electrode (4) and Schottky anode (8), grid (6) and Schottky
There is gate medium (7), embedded AlMN layer (5) upper strata of grid (6) forms groove (13) between anode (8) and AlMN layers (5);It is described
The upper strata of source electrode (4) extends along gate medium (7) upper table towards close to the direction of Schottky anode (8), and grid (6) upper strata is along grid
Medium (7) upper table extends towards both sides.
A kind of 2. GaN hetero-junctions vertical field effect pipe according to claim 1, it is characterised in that the schottky source
(8) thickness of the AlMN barrier layers (5) below is more than 10nm.
3. a kind of GaN hetero-junctions vertical field effect pipe according to claim 2, it is characterised in that in the AlMN layers (5)
M is one kind in Ga, In and Ga and In mixture.
4. a kind of GaN hetero-junctions vertical field effect pipe according to claims 1 to 3 any one, it is characterised in that described
Gate medium (7) is SiO2、Si3N4、AlN、Al2O3, MgO and HfO2In one kind.
5. a kind of GaN hetero-junctions vertical field effect pipe according to claim 4, it is characterised in that the groove (13)
Depth is 0 between 20nm.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109004017A (en) * | 2018-07-18 | 2018-12-14 | 大连理工大学 | HEMT device and preparation method thereof with polarization knot Longitudinal Leakage current barrier layer structure |
CN111293176A (en) * | 2020-02-25 | 2020-06-16 | 电子科技大学 | GaN longitudinal reverse conducting junction field effect transistor |
CN114447101A (en) * | 2022-01-24 | 2022-05-06 | 电子科技大学 | Vertical GaN MOSFET (Metal-oxide-semiconductor field Effect transistor) integrated with freewheeling channel diode |
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