CN107171661B - Pin multiplexing method and device, optical module and communication equipment - Google Patents
Pin multiplexing method and device, optical module and communication equipment Download PDFInfo
- Publication number
- CN107171661B CN107171661B CN201710350271.3A CN201710350271A CN107171661B CN 107171661 B CN107171661 B CN 107171661B CN 201710350271 A CN201710350271 A CN 201710350271A CN 107171661 B CN107171661 B CN 107171661B
- Authority
- CN
- China
- Prior art keywords
- pin
- information
- optical module
- function
- configuring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Optical Communication System (AREA)
Abstract
The present disclosure relates to a pin multiplexing method and apparatus, an optical module, and a communication device, where the pin multiplexing method is applied to an optical module, where the optical module includes a preset register, a first pin, and a second pin, and the pin multiplexing method includes: acquiring pin information in the preset register and analyzing the pin information; when the pin information is analyzed to contain first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl; and when the pin information is analyzed to contain second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function. The method and the device enable the same pin of the optical module to have different functions in different scenes so as to meet multiplexing requirements.
Description
Technical Field
The present disclosure relates to the field of communications technologies, and in particular, to a pin multiplexing method and apparatus, an optical module, and a communication device.
Background
In the field of communication technology, in order to meet the market demand for higher-density high-speed Pluggable solutions, QSFP (Quad Small Form-factor Pluggable) series optical modules have come into force.
Due to the advantages of good power consumption, high information transmission rate and the like, the QSFP series optical module can be widely applied to data centers, high-speed computers and other scenes. However, for the QSFP series optical module, when a system board needs to quickly turn off a laser in the optical module, and/or when a receiving side of the optical module has no signal to send a prompt signal to the system board, a bus is usually used to read related information, and in some long-distance transmission processes, a problem that a timing sequence cannot meet requirements may occur.
In view of the above, a pin multiplexing method and apparatus, an optical module and a communication device are needed.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the present disclosure is to provide a pin multiplexing method and apparatus, an optical module, and a communication device, thereby overcoming, at least to some extent, one or more problems caused by the limitations and disadvantages of the related art.
According to an aspect of the present disclosure, there is provided an optical module including a preset register, a first pin, and a second pin; wherein:
when first information is stored in the preset register, the first pin has the function of LPMODE and the second pin has the function of Intl;
when second information is stored in the preset register, the first pin has a Disable function and the second pin has a Los function.
According to an aspect of the present disclosure, there is provided a communication device comprising a light module according to the above.
According to an aspect of the present disclosure, there is provided a pin multiplexing method applied to an optical module, wherein the optical module includes a preset register, a first pin and a second pin, the pin multiplexing method includes:
acquiring pin information in the preset register and analyzing the pin information;
when the pin information is analyzed to contain first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl;
and when the pin information is analyzed to contain second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function.
According to an aspect of the present disclosure, there is provided a pin multiplexing apparatus applied to an optical module, wherein the optical module includes a preset register, a first pin and a second pin, the pin multiplexing apparatus includes:
the information analysis module is used for acquiring the pin information in the preset register and analyzing the pin information;
the first configuration module is used for configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl when the pin information is analyzed to contain the first information;
and the second configuration module is used for configuring the first pin to have a Disable function and configuring the second pin to have a Los function when the pin information is analyzed to contain second information.
In the technical solutions provided in some embodiments of the present disclosure, according to different information stored in a preset register in an optical module, a transition between a function that a first pin has an LPMODE and a function that a second pin has an Intl and a function that the first pin has a Disable and the second pin has a Los may be implemented, so that the same pin of the optical module can have different functions in different scenarios to meet multiplexing requirements.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty. In the drawings:
FIG. 1 schematically illustrates a flow diagram of a pin multiplexing method according to an exemplary embodiment of the present disclosure;
FIG. 2 shows a schematic diagram of a golden finger definition of a light module according to an example embodiment of the present disclosure;
FIG. 3 schematically illustrates a block diagram of a pin multiplexing apparatus according to an exemplary embodiment of the present disclosure; and
fig. 4 schematically shows a block diagram of a light module according to an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and the like. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the present disclosure.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the steps. For example, some steps may be decomposed, and some steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
Fig. 1 schematically illustrates a flow chart of a pin multiplexing method of an exemplary embodiment of the present disclosure. Referring to fig. 1, the pin multiplexing method is applied to an optical module, wherein the optical module includes a preset register, a first pin and a second pin, and the pin multiplexing method may include the steps of:
s10, obtaining pin information in the preset register and analyzing the pin information;
s20, when the pin information is analyzed to contain first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl;
s30, when the pin information is analyzed to contain second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function.
In the pin multiplexing method according to the exemplary embodiment of the present disclosure, the functions of the pins in the optical module are determined according to the information stored in the preset register of the optical module, so that the same pin of the optical module can have different functions in different scenes to meet the multiplexing requirement.
It should be understood that the pin multiplexing method of the optical module of the present disclosure may be applied to other pins besides the first pin and the second pin, and this is not particularly limited in the exemplary embodiment.
Next, each step of the pin multiplexing method of the exemplary embodiment of the present disclosure will be explained.
And S10, acquiring pin information in the preset register and analyzing the pin information.
In an exemplary embodiment of the present disclosure, pin information provided by the upper computer may be stored in a preset register of the optical module, and the pin information may include identification information corresponding to a pin definition of the optical module. In addition, the upper computer can judge the application scene of the optical module by combining with the scene recognition device and automatically send the pin information to the preset register of the optical module.
In an exemplary embodiment of the present disclosure, an MCU (micro controller unit) of the optical module may traverse the preset register to obtain pin information within the preset register. Then, the MCU may analyze the obtained pin information, specifically, the MCU may compare the obtained pin information with protocol content pre-stored in the optical module, and when the pin information matches information in the protocol content, the MCU may execute a program corresponding to the pin information, thereby implementing pin definition of the optical module.
According to some embodiments of the present disclosure, the preset register may be included in a user-writable area of the flash memory of the optical module.
According to some other embodiments, the preset register may be included in a storage area of the flash memory of the optical module, where the protocol content is stored.
S20, when the pin information is analyzed to contain first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl.
After the MCU analyzes the obtained pin information in step S10, the MCU may determine whether the pin information includes the first information, and when the pin information includes the first information, the MCU may configure the first pin to have the LPMODE function and the second pin to have the Intl function by executing a pin definition program corresponding to the first information. The LPMODE has the functions of: when a low level is input, the optical module works normally; when the input is high level, the overall power consumption of the optical module can be reduced to below 1.5W. Additionally, the function of Intl is: and when the optical module gives any alarm, outputting high level.
It should be understood that there are specific protocol requirements for the optical module, and defining the pins needs to meet the protocol requirements of the optical module. For example, in the protocol requirement of the function with LPMODE, the function of Intl is also defined, and the optical module can only have one protocol in an application context, that is, configuring one pin to have the function of LPMODE may result in configuring another pin to have the function of Intl, and configuring one pin to have the function of Intl may result in configuring another pin to have the function of LPMODE.
Referring to fig. 2, an optical module gold finger according to the present disclosure may include 38 pins. At this time, the first Pin may be, for example, Pin 31(Pin 31), and the second Pin may be, for example, Pin28 (Pin 28). Specifically, under the condition that the first pin has an LPMODE function, a pin name corresponding to the first pin is LPMODE, and the pin is also called a low power consumption mode pin, that is, a control pin corresponding to a low power consumption mode of the optical module, specifically, when the input of the pin is a low level, the optical module normally operates, and in this operating mode, the host of the high power consumption module cannot be handled; when the input is high level, the whole power consumption of the optical module can be reduced to below 1.5W, and in the working mode, the serial interface and the laser of the optical module can run safely and support the execution of reset interrupt.
In addition, under the condition that the second pin has the function of Intl, the pin name corresponding to the second pin is Intl, and the pin is an output pin and is used for outputting a high level when the optical module has any alarm. However, the IIC bus is still required for transmission of specific alarm information.
In this case, the optical module described in the present disclosure may be a QSFP series optical module. In addition, the QSFP series optical modules described in the present disclosure may include, but are not limited to, one or more of QSFP, QSFP +, QSFP28, QSFP 56.
S30, when the pin information is analyzed to contain second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function.
After the MCU analyzes the acquired pin information in step S10, the MCU may determine whether the pin information includes the second information, and when it is determined that the pin information includes the second information, the MCU may configure the first pin to have a Disable function and the second pin to have a Los function by executing a pin definition program corresponding to the second information. Wherein, the function of Disable is: when a high level is input, the laser is turned off. In addition, the functions of Los are: when the receiving side of the optical module has no signal, a prompt signal is output.
Referring to fig. 2, the first Pin may be, for example, Pin 31(Pin 31), and the second Pin may be, for example, Pin28 (Pin 28). Specifically, when the first pin has a Disable function, the name of the pin corresponding to the first pin is Disable, and when the second pin has a Los function, the name of the pin corresponding to the second pin is Intl.
In this case, the optical module may be an SFP + optical module.
To better describe the advantages of the present disclosure, the conversion of an optical module from a function with a QSFP-series optical module to a function with an SFP + optical module may be exemplified.
Firstly, an upper computer writes the first information into a preset register of the optical module, and the MCU of the optical module configures the optical module into a QSFP series optical module by acquiring the first information and executing a program corresponding to the first information.
Next, if the optical module of the present disclosure is applied to some remote transmission application scenarios, when, for example, a laser needs to be turned off, since there is no pin in the optical module that functions to turn off the laser at this time, a problem that the timing cannot be satisfied occurs. In view of this, the upper computer in this application scenario may send the second information to the preset register of the optical module, and the MCU of the optical module may transform the function of the first pin executing the LPMODE function into a Disable function by acquiring the second information, and at the same time, transform the function of the second pin executing the Intl function into a Los function due to the limitation of the protocol requirement.
It should be noted that although the various steps of the methods of the present disclosure are depicted in the drawings in a particular order, this does not require or imply that these steps must be performed in this particular order, or that all of the depicted steps must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions, etc.
Further, the present exemplary embodiment further provides a pin multiplexing apparatus, which is applied to an optical module, where the optical module includes a preset register, a first pin and a second pin, and referring to fig. 3, the pin multiplexing apparatus 1 may include an information analysis module 10, a first configuration module 20 and a second configuration module 30, where:
the information analysis module 10 is configured to obtain pin information in the preset register and analyze the pin information;
a first configuration module 20, configured to configure the first pin to have a function of LPMODE and configure the second pin to have a function of Intl when it is analyzed that the pin information includes first information;
a second configuration module 30, configured to configure the first pin to have a Disable function and configure the second pin to have a Los function when it is analyzed that the pin information includes the second information.
Further, the present exemplary embodiment also provides an optical module, where the optical module may include a preset register, a first pin, and a second pin; wherein:
when first information is stored in the preset register, the first pin has the function of LPMODE and the second pin has the function of Intl;
when second information is stored in the preset register, the first pin has a Disable function and the second pin has a Los function.
Fig. 4 schematically shows a block diagram of a light module according to an exemplary embodiment of the present disclosure. Referring to fig. 4, the optical module according to an exemplary embodiment of the present disclosure may include a light emitting part composed of a laser driving chip and a laser and a light receiving part composed of a high speed amplifier and a light receiving device, and in addition, the optical module according to an exemplary embodiment of the present disclosure may further include a microprocessor for controlling a light transceiving process of the optical module. Further, the optical module according to the exemplary embodiment of the present disclosure may communicate with an external device through an IIC bus.
Further, the present exemplary embodiment also provides a communication device. The communication device may comprise the above-mentioned light module.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (4)
1. An optical module is characterized by comprising a preset register, a first pin and a second pin; wherein:
when first information is stored in the preset register, a pin definition program corresponding to the first information is executed, the first pin has the function of LPMODE, the second pin has the function of Intl, and the optical module meets QSFP protocol definition;
when second information is stored in the preset register, a pin definition program corresponding to the second information is executed, the first pin has a Disable function and the second pin has a Los function, and the optical module meets the SFP + protocol definition;
the preset register stores pin information provided by an upper computer, the upper computer judges an application scene of the optical module by combining a scene recognition device and sends the pin information to the preset register, and the pin information comprises the first information or the second information.
2. A communication device, characterized in that it comprises a light module according to claim 1.
3. A pin multiplexing method is applied to an optical module, wherein the optical module comprises a preset register, a first pin and a second pin, and the pin multiplexing method comprises the following steps:
acquiring pin information in the preset register and analyzing the pin information, wherein the pin information is obtained by judging an application scene of the optical module by combining an upper computer with a scene recognition device;
when the pin information is analyzed to contain first information, executing a pin definition program corresponding to the first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl, so as to configure the optical module to meet the QSFP protocol definition;
and when the pin information is analyzed to contain second information, executing a pin definition program corresponding to the second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function, so as to configure the optical module to meet the SFP + protocol definition.
4. A pin multiplexing device is applied to an optical module, wherein the optical module comprises a preset register, a first pin and a second pin, and the pin multiplexing device is characterized by comprising:
the information analysis module is used for acquiring pin information in the preset register and analyzing the pin information, and the pin information is obtained by judging an application scene of the optical module by combining an upper computer with a scene recognition device;
the first configuration module is used for executing a pin definition program corresponding to the first information when the pin information is analyzed to contain the first information, configuring the first pin to have the function of LPMODE and configuring the second pin to have the function of Intl, and configuring the optical module to meet the QSFP protocol definition;
and the second configuration module is used for executing a pin definition program corresponding to the second information when the pin information is analyzed to contain the second information, configuring the first pin to have a Disable function and configuring the second pin to have a Los function, and configuring the optical module to meet the SFP + protocol definition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710350271.3A CN107171661B (en) | 2017-05-18 | 2017-05-18 | Pin multiplexing method and device, optical module and communication equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710350271.3A CN107171661B (en) | 2017-05-18 | 2017-05-18 | Pin multiplexing method and device, optical module and communication equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107171661A CN107171661A (en) | 2017-09-15 |
| CN107171661B true CN107171661B (en) | 2021-03-02 |
Family
ID=59816076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710350271.3A Active CN107171661B (en) | 2017-05-18 | 2017-05-18 | Pin multiplexing method and device, optical module and communication equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107171661B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109217922B (en) * | 2018-09-25 | 2020-06-09 | 东莞铭普光磁股份有限公司 | Method and device for reporting loss alarm of received signal by optical module |
| CN109120349A (en) * | 2018-10-31 | 2019-01-01 | 深圳市亚派光电器件有限公司 | Golden finger module reuse circuit and optical module |
| CN109116484B (en) * | 2018-10-31 | 2024-04-19 | 深圳市亚派光电器件有限公司 | Golden finger multiplexing circuit and optical module |
| CN111865423B (en) * | 2019-04-24 | 2021-06-04 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN112039582B (en) * | 2020-09-03 | 2022-04-01 | 南京捷澳德信息科技有限公司 | System and method for optical module expansion supporting optical communication link protection switching application |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7218141B2 (en) * | 2004-12-07 | 2007-05-15 | Altera Corporation | Techniques for implementing hardwired decoders in differential input circuits |
| KR100903382B1 (en) * | 2007-11-02 | 2009-06-23 | 주식회사 하이닉스반도체 | Multi-port memory device having serial i/o interface |
| CN102868439B (en) * | 2012-09-26 | 2015-07-01 | 索尔思光电（成都）有限公司 | Control system for realizing multiplexing of pin of OLT (optical line terminal) optical module |
-
2017
- 2017-05-18 CN CN201710350271.3A patent/CN107171661B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN107171661A (en) | 2017-09-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107171661B (en) | Pin multiplexing method and device, optical module and communication equipment | |
| CA2948250A1 (en) | System and method for safety-critical software automated requirements-based test case generation | |
| US11514225B2 (en) | Verification platform for system on chip and verification method thereof | |
| CN103412836B (en) | Hot plug processing method, device and system | |
| CN117278890B (en) | Optical module access method, device and system, electronic equipment and readable storage medium | |
| CN110888767A (en) | Interface multiplexing module verification platform architecture and quick expansion implementation method | |
| CN115391204A (en) | Test method and device for automatic driving service, electronic equipment and storage medium | |
| US11099339B1 (en) | Management interface handler to expedite module boot time in pluggable optical modules | |
| CN105739481B (en) | The test method of industrial control software, apparatus and system | |
| CN114817115A (en) | Serial port communication method and related device | |
| CN112434478B (en) | Method for simulating virtual interface of logic system design and related equipment | |
| CN115905029B (en) | System architecture, method, device, equipment, medium and chip for chip verification | |
| US10572220B2 (en) | Method for controlling controller and host computer with voice | |
| CN114286084A (en) | Video link test method and device | |
| CN114138242A (en) | Code-free cross-system interface development method based on RPA software | |
| CN106650006B (en) | Debugging method and system of programmable logic device and electronic design automation terminal | |
| CN106405373B (en) | A kind of active test vector matching process | |
| CN116052617B (en) | Screen brightness control system, method, device, equipment and storage medium | |
| CN114826907B (en) | PCIe RC and EP mode switching method, device, equipment and medium | |
| CN116827938B (en) | Data recharging method, system and storage medium | |
| CN116841881A (en) | High-speed cable testing method, system, device, computer equipment and storage medium | |
| CN111082858B (en) | High-reusability overhead simulation system and method based on UVM | |
| CN113608935B (en) | Method, system, equipment and medium for testing network card | |
| CN117094141A (en) | Automatic driving simulation test method, device, system, equipment and medium | |
| CN117407229A (en) | Synchronous network verification method and device, computer equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |