CN107170765A - One kind detection substrate and preparation method thereof, x-ray detector - Google Patents
One kind detection substrate and preparation method thereof, x-ray detector Download PDFInfo
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- CN107170765A CN107170765A CN201710391276.0A CN201710391276A CN107170765A CN 107170765 A CN107170765 A CN 107170765A CN 201710391276 A CN201710391276 A CN 201710391276A CN 107170765 A CN107170765 A CN 107170765A
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- 239000000758 substrate Substances 0.000 title claims abstract description 71
- 238000001514 detection method Methods 0.000 title claims abstract description 44
- 238000002360 preparation method Methods 0.000 title description 17
- 239000002184 metal Substances 0.000 claims abstract description 54
- 229910052751 metal Inorganic materials 0.000 claims abstract description 54
- 238000002161 passivation Methods 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 17
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 40
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 21
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 239000012212 insulator Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- 238000002834 transmittance Methods 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 239000013078 crystal Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 239000010408 film Substances 0.000 description 22
- 230000035945 sensitivity Effects 0.000 description 5
- 239000012528 membrane Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002059 diagnostic imaging Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
- H01L27/14659—Direct radiation imagers structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
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Abstract
Substrate is detected the invention discloses one kind, it is formed with TFT devices and PIN devices, detection substrate includes：Substrate；Source-drain electrode metal level, it is formed in surface, source-drain electrode metal level includes TFT electrode districts and PIN electrode districts, TFT electrode districts are used as the source-drain electrode of TFT devices, PIN electrode districts are used as the lower electrode of PIN devices, wherein, passivation layer is formed with TFT electrode districts, the surface of the part of the neighbouring PIN electrode districts of passivation layer connects and flushed with the surface of PIN electrode districts.The invention also discloses prepare the method for detecting substrate and include the x-ray detector of detection substrate.By technical scheme, the internal stress of PIN devices can be reduced, the detectivity of PIN devices is improved.
Description
Technical field
Substrate and preparation method thereof is detected the present invention relates to field of photoelectric technology, more particularly to one kind and including the detection
The x-ray detector of substrate.
Background technology
X-ray is that a kind of wavelength is about ultrashort electromagnetic wave between 10-0.01 nanometers, and X-ray is passed through after object, and object is inhaled
Receipts and scattering can make the intensity or phase of X-ray change, and material, structure, thickness, defect of this change and object etc.
Characteristic is related, therefore can be by signal detection internal structure of body, in medical imaging detection, industrial production safety detection, day
It is used widely in the multiple fields such as text detection, energetic ion detection, Environmental security detection.
Digitized X-ray detection is often referred to electronic imaging plate technique-flat panel detector technology.Wherein electronic imaging plate is by big
The small detector with thin film transistor (TFT) (TFT) of amount is arranged into an array to be formed, and its key position is the flat board for obtaining image
Detector, by x-ray conversion layer, PIN photodiode, thin film transistor (TFT), signal storage base pixel unit and signal are put
Constituted with signal-obtaining etc. greatly.
In the preparation process of X-ray detection substrate, membrane stress easily is produced in its Si layers when PIN devices are formed,
Cause PIN film preparation conditions harsh and obtained PIN photodiode sensitivity declines.
The content of the invention
In view of this, the embodiment of the present invention proposes a kind of detection substrate, and PIN devices therein have the film of reduction should
Power, so as to improve the sensitivity of PIN devices.
TFT devices and PIN devices are formed with the detection substrate of the present invention, detection substrate includes：Substrate；Source-drain electrode gold
Belong to layer, it forms side on the substrate, the source-drain electrode metal level includes TFT electrode districts and PIN electrode districts, TFT electrode districts
Source-drain electrode as TFT devices, PIN electrode districts are used as the lower electrode of PIN devices, wherein, formed on the TFT electrode districts
There is passivation layer, the surface of the part of the neighbouring PIN electrode districts of the passivation layer connects and flushed with the surface of PIN electrode districts.
Preferably, the TFT electrode districts and PIN electrode districts of the source-drain electrode metal level are integrally formed.
Preferably, the PIN devices are amorphous silicon PIN photoelectric diode, it includes the lower electrode, N-type amorphous
Silicon layer, intrinsic amorphous silicon layer, P-type non-crystalline silicon layer and upper electrode.
Preferably, the thickness of N-type non-crystalline silicon layer and P-type non-crystalline silicon layer is selected from 300-1000 Ethylmercurichlorendimides, intrinsic amorphous silicon layer
Thickness be selected from 1-1.5 microns.
Preferably, the gate metal formation of TFT devices is on the substrate, gate metal and source-drain electrode metal level it
Between be formed with gate insulator.
The embodiment of the present invention additionally provides a kind of x-ray detector, and it includes above-mentioned detection substrate.
The embodiment of the present invention provides a kind of method for preparing detection substrate simultaneously, including：Prepare a substrate；In the base
TFT devices are formed on plate, wherein, forming TFT devices includes forming source-drain electrode metal level, and forming the source-drain electrode metal level includes
TFT electrode districts and PIN electrode districts are formed, TFT electrode districts are used as the source-drain electrode of TFT devices；Formed on the TFT electrode districts
Passivation layer so that the surface of the part of the neighbouring PIN electrode districts of the passivation layer connects and flushed with the surface of PIN electrode districts；
PIN devices are formed, the PIN electrode districts are used as the lower electrode of the PIN devices.
Preferably, when forming the source-drain electrode metal level, while forming TFT electrode districts and PIN electrode districts.
Preferably, forming the source-drain electrode metal level includes：In surface formation metal level；Prepare half-tone mask
Plate so that the light transmittance for being used to be formed the part of PIN electrode districts of the half-tone mask plate is less than for forming TFT electrode districts
Part light transmittance；Patterning is carried out to the metal level using the half-tone mask plate and forms the source-drain electrode metal
Layer so that the thickness of the PIN electrode districts formed is more than the thickness of formed TFT electrode districts.
Preferably, PIN devices are amorphous silicon PIN photoelectric diode, forming PIN devices includes：In PIN electrode districts and
N-type amorphous silicon film, intrinsic amorphous silicon film and P-type non-crystalline silicon film are plated successively on the part of the neighbouring PIN electrode districts of the passivation layer；
The N-type amorphous silicon film formed, intrinsic amorphous silicon film and P-type non-crystalline silicon film are patterned, removes and is formed in the passivation
N-type amorphous silicon film, intrinsic amorphous silicon film and P-type non-crystalline silicon film on the part of the neighbouring PIN electrode districts of layer；It is non-in p-type
Upper electrode is formed on crystal silicon film.
The embodiment of the present invention is by making the passivation layer on TFT devices integrated with PIN devices in detection substrate and PIN devices
The surface of lower electrode is flushed, and eliminates the stress influence that passivation layer is caused to PIN film forming, reduces PIN membrane stresses, is improved
PIN device performances, improve the sensitivity of PIN devices, so as to improve the detection accuracy of detection substrate.
Brief description of the drawings
Fig. 1 is the schematic cross-section of the detection substrate of the embodiment of the present invention；
Fig. 2 detects the indicative flowchart of the method for substrate for the preparation of the embodiment of the present invention；
Fig. 3 A- Fig. 3 D detect the technical process schematic diagram of the method for substrate for the preparation of the embodiment of the present invention.
Reference numerals list
The gate metal of 31 substrate 32
The amorphous silicon layer of 33 gate insulator 34
The source-drain electrode metal level of 35n+a-Si layers 36
361TFT electrode district 361PIN electrode districts
Si layers of 38PIN amorphous silicon layers of 37PIN n
The transparent electrode layer of 39PIN p Si layers 310
The bias electrode layer of 311 second passivation layer 312
The passivation layer of 313 planarization layer 3,110 first
30 intermediate tone mask plates
Embodiment
The embodiment of the present invention is described in detail below in conjunction with the accompanying drawings.The embodiment of the present invention is provided in an illustrative manner,
It is not as a limitation of the invention.
Fig. 1 is the schematic cross-section of the detection substrate of the embodiment of the present invention.
As shown in figure 1, detection substrate includes substrate 31, the gate metal 32 on substrate 31 is formed at, grid gold is formed at
Gate insulator 33 on category 32 and substrate 31, the amorphous silicon layer 34 formed successively on gate insulator 33, n+a-Si layers
35 and source-drain electrode metal level 36.Structure of the TFT devices in addition to source-drain electrode metal level 36 in detection substrate shown in Fig. 1 is only to show
Example property.
Source-drain electrode metal level 36 includes TFT electrode districts 361 and PIN electrode districts 362.In the embodiment shown in fig. 1, example
Property show that source-drain electrode metal level 36 includes integrally formed TFT electrode districts 361 and PIN electrode districts 362, but the present invention is not limited
In this.In other embodiments of the present invention, can be by TFT electrode districts 361 and PIN electrode districts when forming source-drain electrode metal level 36
362 form in two regions of separation, are then electrically connected to each other TFT electrode districts 361 and PIN electrode districts 362.
Scheme according to embodiments of the present invention, the position of the surfaces of TFT electrode districts 361 on the direction perpendicular to substrate 31
Surface than PIN electrode district 362 is located closer to substrate 31 on the direction perpendicular to substrate 31.In the implementation shown in Fig. 1
The thickness that TFT electrode districts 361 are exemplarily illustrated as in example is less than PIN electrode districts 362, but the invention is not restricted to this.For example exist
TFT electrode districts 361 and PIN electrode districts 362 are respectively formed in the embodiment of different zones, TFT electrode districts 361 may have than
The bigger thickness of PIN electrode districts 362, but as long as the surface of TFT electrode districts 361 than PIN electrode district 362 surface closer to substrate
31, so that it may realize technical scheme.
TFT electrode districts 361 are used as the source-drain electrode of TFT devices in detection substrate, and gate metal 32 is the grid of TFT devices
Pole.Covered with the first passivation layer 3110 on the source-drain electrode electrode of TFT devices, the neighbouring PIN electrode districts 362 of the first passivation layer 3110
The surface of part connect and flush with the surface of PIN electrode districts 362.
PIN electrode districts 362 are used as the lower electrode of PIN devices.Include in Fig. 1 as the PIN devices shown in example under this
Portion's electrode, PIN n Si layers 37, PIN amorphous silicon layers 38, PIN p Si layers 39 and transparent electrode layer 310, but the present invention is to PIN
The concrete composition structure of device is not limited, as long as being applied to the present invention with the lower electrode for being arranged in PIN bottom devices.
The second passivation layer 311 has been collectively covered on TFT devices and PIN devices, bias is formed with the second passivation layer 311
Electrode layer 312, covered with planarization layer 313 in bias electrode layer 312.
The embodiment of the present invention is by detect the passivation layer on the TFT devices in substrate and PIN device lower electrodes
Surface connects and flushed, and eliminates the stress influence that passivation layer is caused to PIN film forming, reduces PIN membrane stresses, improve
PIN device performances, improve the sensitivity of PIN devices, so as to improve the detection accuracy of detection substrate.
In an embodiment of the invention, PIN devices are amorphous silicon PIN photoelectric diode, and it is included as lower electrode
PIN electrode districts 362, N-type non-crystalline silicon layer 37, intrinsic amorphous silicon layer 38, P-type non-crystalline silicon layer 39 and upper electrode, upper electrode
For example, transparent electrode layer 310.The embodiment of the present invention can greatly improve the performance of amorphous silicon PIN photoelectric diode, improve bag
Include the detection accuracy of the detection substrate of amorphous silicon PIN photoelectric diode.As an example, in embodiments of the present invention, N-type non-crystalline silicon
The thickness of layer and P-type non-crystalline silicon layer can be selected from 300-1000 Ethylmercurichlorendimides, and the thickness of intrinsic amorphous silicon layer can be micro- selected from 1-1.5
Rice, incidence and photoelectric transformation efficiency in favor of light.
The embodiments of the invention provide a kind of x-ray detector, it includes the detection substrate of any of the above-described embodiment.Pass through
The scheme of the embodiment of the present invention, can greatly improve the detection accuracy of x-ray detector.
Fig. 2 detects the indicative flowchart of the method for substrate for the preparation of the embodiment of the present invention.
As shown in Fig. 2 the method for the preparation detection substrate of the embodiment of the present invention includes：
S101, one substrate of preparation；
S102, the formation TFT devices on substrate, wherein, forming TFT devices includes forming source-drain electrode metal level, forms source
Drain metal layer includes forming TFT electrode districts and PIN electrode districts, and TFT electrode districts are used as the source-drain electrode of TFT devices；
S103, on TFT electrode districts form passivation layer so that the surface of the part of the neighbouring PIN electrode districts of passivation layer with
The surface of PIN electrode districts connects and flushed；
S104, formation PIN devices, the PIN electrode districts are used as the lower electrode of the PIN devices.
Wherein, glass substrate can be for example prepared in S101 steps as the baseplate part that substrate is detected in the embodiment of the present invention
Point.After the preparation of completing substrate, TFT devices are formed on substrate, wherein when forming the source-drain electrode metal level of TFT devices,
Form TFT electrode districts and PIN electrode districts so that the position of the surface of TFT electrode districts in a direction perpendicular to a substrate is than PIN electricity
The surface of polar region in a direction perpendicular to a substrate be located closer to substrate so that on TFT electrode districts formed passivation layer after,
The surface of the part of the neighbouring PIN electrode districts of passivation layer connects and flushed with the surface of PIN electrode districts.
In embodiments of the present invention, when forming the source-drain electrode metal level of TFT devices, TFT electrode districts can be formed simultaneously
With PIN electrode districts, for example, it may be integrally formed or form TFT electrode districts and PIN electrode districts respectively.
The method of the preparation detection substrate of the embodiment of the present invention detects the passivation layer on the TFT devices in substrate by causing
Connect and flush with the surface of PIN device lower electrodes, eliminate the stress influence that passivation layer is caused to PIN film forming, reduce
PIN membrane stresses, improve PIN device performances, improve the sensitivity of PIN devices, so as to improve the detection of detection substrate
Precision.
Fig. 3 A- Fig. 3 D are the exemplary process procedure chart of the method for the preparation detection substrate of the embodiment of the present invention, are tied below
The embodiment for closing the method that preparations of Fig. 2 and Fig. 3 A- Fig. 3 D to the present invention detects substrate is described in detail.It should be understood that
It is that the technical process shown in figure is only a kind of example, is not intended as limitation of the present invention.
First, reference picture 3A, is deposited and patterned gate metal 32 on glass substrate 31, on cover gate insulator
33, amorphous silicon layer 34 and N+a-Si layers 35, then in sedimentary origin drain metal layer 36 thereon.
When forming source-drain electrode metal level 36, one layer of uniform metal level can be first formed on N+a-Si layers 35, then
Intermediate tone mask plate 30 (such as PR glue) is prepared to pattern source-drain electrode metal level 36.
Half-tone mask plate can for example be prepared using PR glue.When preparing intermediate tone mask plate, halftoning is covered
The light transmittance of the part for forming PIN electrode districts of template is adjusted to be less than the printing opacity for the part for being used to be formed TFT electrode districts
Rate.
As shown in Figure 3 B, patterning is carried out to above-mentioned metal level using the half-tone mask plate of above-mentioned preparation and forms source-drain electrode
During metal level 36, it may be such that the surface of the PIN electrode districts in source-drain electrode metal level 36 is higher than the surface of TFT electrode districts, in diagram
The thickness that PIN electrode districts are shown as in embodiment is more than the thickness of TFT electrode districts.
Although the embodiment of the present invention by intermediate tone mask plate shape into being illustrated exemplified by source-drain electrode metal level 36, this hair
It is bright to be not limited to using the formation Source and drain metal level 36 of intermediate tone mask plate 30.For example, referring to Fig. 3 A, formed on N+a-Si layers 35
After one layer of uniform metal level, intermediate tone mask plate 30 is substituted, can be by the regions of the correspondence PIN devices on the homogenous metal layer
Upper another metal level formation PIN electrode districts of deposition so that the surface of PIN electrode districts is higher than TFT electrode districts, so as to form source-drain electrode
Metal level 36.
As shown in Figure 3 C, covered in the first passivation layer of TFT devices layer deposition 3110, regulation forms the first passivation layer
3110 technological parameter, makes to cover the parts of the TFT after the first passivation layer 3110 and is flushed not with the region surface that PIN parts connect
There is segment difference.
As shown in Figure 3 D, N-type is plated successively on the part of PIN electrode districts and the neighbouring PIN electrode districts of the first passivation layer
Amorphous silicon film, intrinsic amorphous silicon film and P-type non-crystalline silicon film, and PIN patterning is carried out, it can remove and formed first during patterning
N-type amorphous silicon film, intrinsic amorphous silicon film and P-type non-crystalline silicon film on the part of the neighbouring PIN electrode districts of passivation layer.PIN patterns
Change after completing, transparent electrode layer 310 is formed on P-type non-crystalline silicon film, complete amorphous silicon PIN photoelectric diode in detection substrate
Preparation.
Referring finally to Fig. 1, the second passivation layer 311, bias electrode 312 and planarization layer are formed in the structure shown in Fig. 3 D
313, that is, complete the preparation of detection substrate.
The foregoing is only preferred embodiments of the present invention, not thereby limit this application claims scope, so
It is all to make equivalent structure change with present specification and diagramatic content, it is all contained in the protection domain of the application.
Claims (10)
1. one kind detection substrate, it is formed with TFT devices and PIN devices, and the detection substrate includes：
Substrate；
Source-drain electrode metal level, it forms side on the substrate, and the source-drain electrode metal level includes TFT electrode districts and PIN electrodes
Area, TFT electrode districts are used as the source-drain electrode of TFT devices, and PIN electrode districts are used as the lower electrode of PIN devices,
Wherein, be formed with passivation layer on the TFT electrode districts, the surface of the part of the neighbouring PIN electrode districts of the passivation layer with
The surface of PIN electrode districts connects and flushed.
2. substrate is detected as claimed in claim 1, wherein, the TFT electrode districts and PIN electrode districts one of the source-drain electrode metal level
Body is formed.
3. substrate is detected as claimed in claim 1, wherein, the PIN devices are amorphous silicon PIN photoelectric diode, and it includes
The lower electrode, N-type non-crystalline silicon layer, intrinsic amorphous silicon layer, P-type non-crystalline silicon layer and upper electrode.
4. substrate is detected as claimed in claim 3, wherein, the thickness of N-type non-crystalline silicon layer and P-type non-crystalline silicon layer is selected from 300-
1000 Ethylmercurichlorendimides, the thickness of intrinsic amorphous silicon layer is selected from 1-1.5 microns.
5. the detection substrate as any one of claim 1-4, wherein, the gate metal formation of TFT devices is in the base
On plate, gate insulator is formed between gate metal and source-drain electrode metal level.
6. a kind of x-ray detector, it is characterised in that including the detection substrate as any one of claim 1-5.
7. a kind of method for preparing detection substrate, including：
Prepare a substrate；
TFT devices are formed on the substrate, wherein, forming TFT devices includes forming source-drain electrode metal level, forms the source and drain
Pole metal level includes forming TFT electrode districts and PIN electrode districts, and TFT electrode districts are used as the source-drain electrode of TFT devices；
Form passivation layer on the TFT electrode districts so that the surface of the part of the neighbouring PIN electrode districts of the passivation layer with
The surface of PIN electrode districts connects and flushed；
PIN devices are formed, the PIN electrode districts are used as the lower electrode of the PIN devices.
8. method as claimed in claim 7, wherein, when forming the source-drain electrode metal level, at the same formed TFT electrode districts and
PIN electrode districts.
9. method as claimed in claim 7, wherein, forming the source-drain electrode metal level includes：
In surface formation metal level；
Prepare half-tone mask plate so that the light transmittance of the part for forming PIN electrode districts of the half-tone mask plate is low
Light transmittance in the part for forming TFT electrode districts；
Patterning is carried out to the metal level using the half-tone mask plate and forms the source-drain electrode metal level so that is formed
PIN electrode districts thickness be more than formed TFT electrode districts thickness.
10. method as claimed in any one of claims 7-9, wherein, PIN devices are amorphous silicon PIN photoelectric diode, are formed
PIN devices include：
Plate N-type amorphous silicon film successively on the part of PIN electrode districts and the neighbouring PIN electrode districts of the passivation layer, it is intrinsic non-
Crystal silicon film and P-type non-crystalline silicon film；
The N-type amorphous silicon film formed, intrinsic amorphous silicon film and P-type non-crystalline silicon film are patterned, removes and is formed described
N-type amorphous silicon film, intrinsic amorphous silicon film and P-type non-crystalline silicon film on the part of the neighbouring PIN electrode districts of passivation layer；
Upper electrode is formed on P-type non-crystalline silicon film.
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| CN201710391276.0A CN107170765B (en) | 2017-05-27 | 2017-05-27 | Detection substrate, preparation method thereof and x-ray detector |
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| CN201710391276.0A CN107170765B (en) | 2017-05-27 | 2017-05-27 | Detection substrate, preparation method thereof and x-ray detector |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111430441A (en) * | 2020-04-27 | 2020-07-17 | 武汉华星光电半导体显示技术有限公司 | O L ED panel and fingerprint identification method thereof |
| WO2021072604A1 (en) * | 2019-10-14 | 2021-04-22 | 京东方科技集团股份有限公司 | Detection substrate and manufacturing method therefor, and flat panel detector |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101261998A (en) * | 2008-04-18 | 2008-09-10 | 中国科学院上海技术物理研究所 | Method for making HgCdTe long wave photoconductive infrared array detector, multi-layer electrode pole |
| CN104022132A (en) * | 2014-05-30 | 2014-09-03 | 京东方科技集团股份有限公司 | X-ray detecting substrate and manufacturing method thereof |
| CN104900669A (en) * | 2015-05-28 | 2015-09-09 | 京东方科技集团股份有限公司 | X-ray detection substrate, fabrication method thereof and detection device |
-
2017
- 2017-05-27 CN CN201710391276.0A patent/CN107170765B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101261998A (en) * | 2008-04-18 | 2008-09-10 | 中国科学院上海技术物理研究所 | Method for making HgCdTe long wave photoconductive infrared array detector, multi-layer electrode pole |
| CN104022132A (en) * | 2014-05-30 | 2014-09-03 | 京东方科技集团股份有限公司 | X-ray detecting substrate and manufacturing method thereof |
| CN104900669A (en) * | 2015-05-28 | 2015-09-09 | 京东方科技集团股份有限公司 | X-ray detection substrate, fabrication method thereof and detection device |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021072604A1 (en) * | 2019-10-14 | 2021-04-22 | 京东方科技集团股份有限公司 | Detection substrate and manufacturing method therefor, and flat panel detector |
| CN113330567A (en) * | 2019-10-14 | 2021-08-31 | 京东方科技集团股份有限公司 | Detection substrate, manufacturing method thereof and flat panel detector |
| JP2023504952A (en) * | 2019-10-14 | 2023-02-08 | 京東方科技集團股▲ふん▼有限公司 | DETECTION BOARD, MANUFACTURING METHOD THEREOF, AND FLAT DETECTION DEVICE |
| US11876106B2 (en) | 2019-10-14 | 2024-01-16 | Beijing Boe Sensor Technology Co., Ltd. | Detection substrate, preparation method thereof and flat panel detector |
| CN113330567B (en) * | 2019-10-14 | 2024-01-26 | 京东方科技集团股份有限公司 | Detection substrate, manufacturing method thereof and flat panel detector |
| JP7504130B2 (en) | 2019-10-14 | 2024-06-21 | 京東方科技集團股▲ふん▼有限公司 | Detection substrate, its manufacturing method and flat plate detection device |
| US12062672B2 (en) | 2019-10-14 | 2024-08-13 | Beijing Boe Sensor Technology Co., Ltd. | Detection substrate, preparation method thereof and flat panel detector |
| CN111430441A (en) * | 2020-04-27 | 2020-07-17 | 武汉华星光电半导体显示技术有限公司 | O L ED panel and fingerprint identification method thereof |
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