CN107146815A - A kind of Schottky gate field-effect transistor and preparation method and application - Google Patents

A kind of Schottky gate field-effect transistor and preparation method and application Download PDF

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Publication number
CN107146815A
CN107146815A CN201710171241.6A CN201710171241A CN107146815A CN 107146815 A CN107146815 A CN 107146815A CN 201710171241 A CN201710171241 A CN 201710171241A CN 107146815 A CN107146815 A CN 107146815A
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schottky gate
effect transistor
gate field
preparation
photoresist
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杨炎锋
杨亿斌
招瑜
肖也
罗东向
牟中飞
李京波
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Guangdong University of Technology
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Guangdong University of Technology
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention discloses a kind of preparation method of Schottky gate field-effect transistor, and this method prepares two-dimensional material on substrate, photoresist is spin-coated on substrate and two-dimensional material first, after photolithographic exposure and development, exposes source-drain electrode window;Metal is plated, photoresist is washed off, then annealed in atmosphere, source electrode and drain electrode is formed;Continue spin coating photoresist on full wafer sample, after photolithographic exposure and development, expose gate electrode window;Metal is plated again, photoresist is washed off, forms Schottky gate field-effect transistor.The Schottky gate field-effect transistor has the advantages that size is small, on-off ratio is high, mobility is high and can eliminate short-channel effect well, can be the application field for widening two-dimensional material device.

Description

A kind of Schottky gate field-effect transistor and preparation method and application
Technical field
The invention belongs to microelectronics technology, more particularly, to a kind of Schottky gate field-effect transistor and its system Preparation Method and application.
Background technology
As the two-dimensional material found earliest, graphene is due to unique physical and chemical performance and in nano photoelectric The huge applications potentiality in field, have attracted the substantial amounts of concern of people and research in recent years.However, the zero band gap properties limit of graphene Its application in nanoelectronic field is made.Although people open its band gap with various methods, open Band gap very little, what is played has little effect.Recent years, it is used as the alternative of graphene, two-dimentional transition metal chalcogenide (TMDs) progressively rise, they possess a certain size band gap (1-3eV) and have illustrated photoelectric properties excellent.Example Such as, based on individual layer or several layers of MoS2Field-effect transistor show excellent field effect transistor switch than with larger room temperature electron Mobility.In addition, the photo-detector based on two-dimensional TM Ds has also shown very high light sensitivity and quick photo absorption property.
In recent years, by the Van der Waals hetero-junctions of monocrystal material longitudinal stack, also rapid prosperity is got up.Fan Dewa You are superimposed at this hetero-junctions by different two-dimensional materials, and it can inherit the excellent photoelectric property of one-component, also may be used To show the device function of uniqueness.These artificial hetero-junctions have strong light-thing interaction and excellent optical property, Allow them to extensive use in optoelectronic devices, such as photodiode, photovoltaic cell, photocatalysis and LEDs.For example, Based on graphene and MoS2The on-off ratio of the vertical field-effect transistor (FETs) of hetero-junctions is up to 1000, and current density reaches 5000Acm-2.They also show the multiple photoelectric functional of brilliance, including high sensitive optical detection and grid voltage controllable steady-state light Conductivity, maximum internal quantum efficiency produces performance, and huge information storage function up to 85% controllable photoelectric current.
It is not unique, but has its counterpart, the two-dimensional semiconductor Schottky barrier for having similar rectification characteristic to two-dimensional semiconductor p-n heterojunction FETs is also just gradually studied by people in recent years.For the conventional metal oxides semiconductor field of conventional semiconductor material Transistor (MOSFET), with the reduction of channel length, the depletion width of source-drain area becomes to compare with channel length, this When raceway groove in Potential Distributing be changed into bidimensional distribution, gradual channel approximately no longer sets up, short channel effect occurs, become subthreshold behavior Difference, so as to destroy the performance of device.In order to eliminate short channel effect, Schottky barrier FETs just arises at the historic moment.For new two Tie up semi-conducting material Schottky barrier FETs, it has been found that they have many unique performances.For example, high on-off ratio and moving Shifting rate, quick speed of photoresponse, Low-voltage Low-power etc..However, two-dimensional material schottky device is mainly source and drain at present The Schottky contacts of electrode, it is impossible to solve short channel effect problem well, the research on schottky gate electrode not yet appears in the newspapers Road.
The content of the invention
The invention aims to overcome the deficiencies in the prior art, there is provided a kind of system of Schottky gate field-effect transistor Preparation Method.This method has preparation technology simple, and array, batch production can be achieved.
Another object of the present invention is to provide Schottky gate field-effect transistor prepared by a kind of above method.The Xiao Te Base grid field effect transistor has that size is small, on-off ratio is high, mobility is high and it is excellent to eliminate short-channel effect etc. well Point.
It is still another object of the present invention to provide a kind of application of above-mentioned Schottky gate field-effect transistor.
Above-mentioned purpose of the present invention is achieved by the following technical programs:
A kind of preparation method of Schottky gate field-effect transistor, is comprised the following specific steps that:
S1. two-dimensional material is prepared on substrate, photoresist is spin-coated on substrate and two-dimensional material;
S2. photolithographic exposure plates metal in the substrate sample for being loaded with two-dimensional material in step sl, washes photoetching off with after development Glue, then anneals in atmosphere, forms source electrode and drain electrode;
S3. continue spin coating photoresist on the sample for forming source electrode and drain electrode in step s 2, then photolithographic exposure and Development, plates metal on above-mentioned sample, forms schottky gate electrode;
S4. wash photoresist off, Schottky gate field-effect transistor is made.
Preferably, substrate described in step S1 is silicon, silica, quartz, sapphire or carborundum.
Preferably, the two-dimensional material described in step S1 is graphene, black phosphorus, MoS2、WS2、MoSe2、WSe2、MoTe2、 WTe2、h-BN、GaS、GaSe、TiS2、TaS2、TaSe2、NiTe2、NiSe2、ZrS2Or ZrSe2
Preferably, the graphene, black phosphorus, MoS2、WS2、MoSe2、WSe2、MoTe2、WTe2、h-BN、GaS、GaSe、 TiS2、TaS2、TaSe2、NiTe2、NiSe2、ZrS2Or ZrSe2Thickness be 0.5~20nm.
Preferably, the temperature annealed described in step S2 is 100~500 DEG C, and the gas is N2Or institute in Ar, step S2 State source electrode identical with drain electrode.
Preferably, metal described in step S3 is one kind or any two in Au, Cu, Ni, Ti, Cr, Ag, Al, Pt or Pd Kind.
It is further preferable that described Au, Cu, Ni, Ti, Cr, Ag, Al, Pt or Pd thickness are 5~1000nm.
The above method prepare Schottky gate field-effect transistor, the Schottky gate field-effect transistor include substrate, Two-dimensional material, source electrode, drain electrode and schottky gate electrode.
Application of the above-mentioned Schottky gate field-effect transistor in field of optoelectronic devices.
Compared with prior art, the invention has the advantages that:
1. Schottky gate field-effect transistor, system is made in the method that the present invention is combined using photoetching and direct evaporation metal Standby technique is simple, and array, batch production can be achieved.
2. the schottky gate electrode of the present invention can play rectified action, suppress leakage current, improve the switch performance of device.
3. Schottky gate field-effect transistor of the present invention has, size is small, on-off ratio is high, mobility is high and can be fine The advantages of ground eliminates short-channel effect, can be the application field for widening two-dimensional material device.
Brief description of the drawings
Fig. 1 is the preparation method schematic flow sheet of Schottky gate field-effect transistor.
Fig. 2 is the schematic top plan view of Schottky gate field-effect transistor.
Embodiment
Present disclosure is further illustrated with reference to specific embodiment, but be should not be construed as limiting the invention. Unless otherwise specified, the conventional meanses that technological means used in embodiment is well known to those skilled in the art.Except non-specifically Illustrate, the reagent of the invention used, method and apparatus is the art conventional reagent, methods and apparatus.
Embodiment 1
Fig. 1 is the preparation method schematic flow sheet of Schottky gate field-effect transistor, wherein 1 is substrate, 2 be two-dimentional material Material, 3 be source electrode, and 4 be drain electrode, and 5 be schottky gate electrode, and 6 be photoresist, is comprised the following steps:
1. prepare WS in silicon chip substrate 1 using the method for chemical vapor deposition2Two-dimensional material 2, WS2Thickness be 0.5nm, As shown in Fig. 1 (1).
2. in silicon chip substrate 1 and WS2Spin coating thickness is 2 μm of photoresist 6 in two-dimensional material 2, such as shown in Fig. 1 (2).
3. after photolithographic exposure and development (shown in Fig. 1 (3)), it is being loaded with WS2Plated on the sample of silicon chip substrate 1 of two-dimensional material 2 Thickness is 50nm Ti, source electrode 3 and drain electrode 4 is formed, such as shown in Fig. 1 (4).
4. photoresist 6 is washed off, then in N2In atmosphere shown in 100 DEG C of annealing 0.5h, such as Fig. 1 (5).
5. continue spin coating photoresist 6 on the sample of step 4, such as shown in Fig. 1 (6).
6. photoetching is exposed and developed (shown in Fig. 1 (7)) on the sample of step 5, it is 5nm's that thickness is plated on above-mentioned sample Pt, forms schottky gate electrode 5, such as shown in Fig. 1 (8).
7. washing photoresist 6 off, Schottky gate field-effect transistor is made, shown in such as Fig. 1 (9).
Fig. 2 is the schematic top plan view of Schottky gate field-effect transistor.Wherein 1 is substrate, and 2 be two-dimensional material, and 3 be source electricity Pole, 4 be drain electrode, and 5 be schottky gate electrode.Source electrode 3, drain electrode 4 and schottky gate electrode 5 respectively in two-dimensional material 2, Constitute Schottky gate field-effect transistor.
Embodiment 2
Difference with embodiment 1 is:The two-dimensional material is ZrSe2, ZrSe2Thickness be 20nm;The annealing temperature For 500 DEG C, atmosphere is Ar;The schottky gate electrode is W metal, and Ni thickness is 1000nm.
Above-described embodiment is preferably embodiment, but embodiments of the present invention are not by above-described embodiment of the invention Limitation, other any Spirit Essences without departing from the present invention and the change made under principle, modification, replacement, is combined and simplification, Equivalent substitute mode is should be, is included within protection scope of the present invention.

Claims (10)

1. a kind of preparation method of Schottky gate field-effect transistor, it is characterised in that comprise the following specific steps that:
S1. two-dimensional material is prepared on substrate, photoresist is spin-coated on substrate and two-dimensional material;
S2. photolithographic exposure plates metal in the substrate sample for being loaded with two-dimensional material in step sl, washes photoresist off with after development, Then annealed in atmosphere, form source electrode and drain electrode;
S3. spin coating photoresist is continued on the sample for forming source electrode and drain electrode in step s 2, then photolithographic exposure and development, Metal is plated on above-mentioned sample, schottky gate electrode is formed;
S4. wash photoresist off, Schottky gate field-effect transistor is made.
2. the preparation method of Schottky gate field-effect transistor according to claim 1, it is characterised in that institute in step S1 Substrate is stated for silicon, silica, quartz, sapphire or carborundum.
3. the preparation method of schottky gate electrode according to claim 1, it is characterised in that the two dimension described in step S1 Material is graphene, black phosphorus, MoS2、WS2、MoSe2、WSe2、MoTe2、WTe2、h-BN、GaS、GaSe、TiS2、TaS2、TaSe2、 NiTe2、NiSe2、ZrS2Or ZrSe2
4. the preparation method of Schottky gate field-effect transistor according to claim 3, it is characterised in that the graphite Alkene, black phosphorus, MoS2、WS2、MoSe2、WSe2、MoTe2、WTe2、h-BN、GaS、GaSe、TiS2、TaS2、TaSe2、NiTe2、NiSe2、 ZrS2Or ZrSe2Thickness be 0.5~20nm.
5. the preparation method of Schottky gate field-effect transistor according to claim 1, it is characterised in that institute in step S2 The temperature for stating annealing is 100~500 DEG C, and the gas is N2Or Ar, source electrode is identical with drain electrode described in step S2.
6. the preparation method of Schottky gate field-effect transistor according to claim 1, it is characterised in that institute in step S3 It is one kind or any two kinds in Au, Cu, Ni, Ti, Cr, Ag, Al, Pt or Pd to state metal.
7. the preparation method of Schottky gate field-effect transistor according to claim 6, it is characterised in that the Au, Cu, Ni, Ti, Cr, Ag, Al, Pt or Pd thickness are 5~1000nm.
8. the Schottky gate field-effect transistor prepared according to any one of claim 1-7 methods described.
9. Schottky gate field-effect transistor according to claim 8, it is characterised in that the Schottky gate field-effect is brilliant Body pipe includes substrate, two-dimensional material, source electrode, drain electrode and schottky gate electrode.
10. application of the Schottky gate field-effect transistor in field of optoelectronic devices according to claim 9.
CN201710171241.6A 2017-03-21 2017-03-21 A kind of Schottky gate field-effect transistor and preparation method and application Pending CN107146815A (en)

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CN108914206A (en) * 2018-08-07 2018-11-30 湖南大学 A kind of telluride nickel two-dimensional material and its preparation and application
CN109686797A (en) * 2017-10-19 2019-04-26 株洲中车时代电气股份有限公司 A kind of SiC schottky diode and its manufacturing method
CN109904238A (en) * 2019-01-14 2019-06-18 中国科学院半导体研究所 Schottky field-effect tube and preparation method based on silicon and transient metal sulfide
CN111041449A (en) * 2019-12-28 2020-04-21 杭州电子科技大学 Preparation method of tungsten disulfide with specific morphology
CN113049096A (en) * 2021-03-11 2021-06-29 中国科学院上海技术物理研究所 Nickel telluride terahertz detector integrated with room-temperature periodic logarithmic antenna and preparation method
CN113793869A (en) * 2021-08-28 2021-12-14 西安瑞芯光通信息科技有限公司 Integrated mixed material high electron mobility transistor and preparation method thereof
CN117316773A (en) * 2023-11-28 2023-12-29 济南大学 Preparation method of palladium/tungsten diselenide Schottky transistor

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109686797A (en) * 2017-10-19 2019-04-26 株洲中车时代电气股份有限公司 A kind of SiC schottky diode and its manufacturing method
CN108914206A (en) * 2018-08-07 2018-11-30 湖南大学 A kind of telluride nickel two-dimensional material and its preparation and application
CN108914206B (en) * 2018-08-07 2020-02-18 湖南大学 Nickel telluride two-dimensional material and preparation and application thereof
CN109904238A (en) * 2019-01-14 2019-06-18 中国科学院半导体研究所 Schottky field-effect tube and preparation method based on silicon and transient metal sulfide
CN109904238B (en) * 2019-01-14 2021-06-08 中国科学院半导体研究所 Schottky field effect transistor based on silicon and transition metal sulfide and preparation method thereof
CN111041449A (en) * 2019-12-28 2020-04-21 杭州电子科技大学 Preparation method of tungsten disulfide with specific morphology
CN111041449B (en) * 2019-12-28 2021-10-08 杭州电子科技大学 Preparation method of tungsten disulfide with specific morphology
CN113049096A (en) * 2021-03-11 2021-06-29 中国科学院上海技术物理研究所 Nickel telluride terahertz detector integrated with room-temperature periodic logarithmic antenna and preparation method
CN113793869A (en) * 2021-08-28 2021-12-14 西安瑞芯光通信息科技有限公司 Integrated mixed material high electron mobility transistor and preparation method thereof
CN113793869B (en) * 2021-08-28 2024-08-27 聚瑞芯光电有限公司 Integrated mixed material high electron mobility transistor and preparation method thereof
CN117316773A (en) * 2023-11-28 2023-12-29 济南大学 Preparation method of palladium/tungsten diselenide Schottky transistor
CN117316773B (en) * 2023-11-28 2024-02-13 济南大学 Preparation method of palladium/tungsten diselenide Schottky transistor

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