CN107104078A - Graphene electrodes and its patterning preparation method, array base palte - Google Patents
Graphene electrodes and its patterning preparation method, array base palte Download PDFInfo
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- CN107104078A CN107104078A CN201710416630.0A CN201710416630A CN107104078A CN 107104078 A CN107104078 A CN 107104078A CN 201710416630 A CN201710416630 A CN 201710416630A CN 107104078 A CN107104078 A CN 107104078A
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 191
- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 188
- 238000000059 patterning Methods 0.000 title claims abstract description 58
- 238000002360 preparation method Methods 0.000 title claims abstract description 47
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 86
- 238000000034 method Methods 0.000 claims abstract description 75
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- 150000001336 alkenes Chemical class 0.000 claims description 6
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- NWZSZGALRFJKBT-KNIFDHDWSA-N (2s)-2,6-diaminohexanoic acid;(2s)-2-hydroxybutanedioic acid Chemical compound OC(=O)[C@@H](O)CC(O)=O.NCCCC[C@H](N)C(O)=O NWZSZGALRFJKBT-KNIFDHDWSA-N 0.000 claims description 3
- YCIMNLLNPGFGHC-UHFFFAOYSA-N catechol Chemical compound OC1=CC=CC=C1O YCIMNLLNPGFGHC-UHFFFAOYSA-N 0.000 claims description 3
- IKDUDTNKRLTJSI-UHFFFAOYSA-N hydrazine monohydrate Substances O.NN IKDUDTNKRLTJSI-UHFFFAOYSA-N 0.000 claims description 3
- 239000012279 sodium borohydride Substances 0.000 claims description 3
- 229910000033 sodium borohydride Inorganic materials 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 239000004575 stone Substances 0.000 claims description 3
- 239000000725 suspension Substances 0.000 claims description 3
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- 238000004519 manufacturing process Methods 0.000 description 7
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 6
- 239000007769 metal material Substances 0.000 description 5
- CIWBSHSKHKDKBQ-JLAZNSOCSA-N Ascorbic acid Chemical compound OC[C@H](O)[C@H]1OC(=O)C(O)=C1O CIWBSHSKHKDKBQ-JLAZNSOCSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910002804 graphite Inorganic materials 0.000 description 4
- 239000010439 graphite Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 238000007711 solidification Methods 0.000 description 4
- 230000008023 solidification Effects 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
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- ZZZCUOFIHGPKAK-UHFFFAOYSA-N D-erythro-ascorbic acid Natural products OCC1OC(=O)C(O)=C1O ZZZCUOFIHGPKAK-UHFFFAOYSA-N 0.000 description 2
- 229930003268 Vitamin C Natural products 0.000 description 2
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- 238000005229 chemical vapour deposition Methods 0.000 description 2
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- 235000019154 vitamin C Nutrition 0.000 description 2
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- -1 Graphite alkene Chemical class 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Abstract
The invention discloses a kind of Graphene electrodes and its patterning preparation method, array base palte.In the preparation method that Graphene electrodes are patterned, form graphene oxide and photoresist on substrate successively first, secondly ultraviolet light is developed by mask plate to photoresist, developer solution is reused to develop to the photoresist after exposure, then the graphene oxide exposed after corresponding is reduced, finally remaining photoresist is peeled off, that is, the Graphene electrodes patterned.Graphene electrodes are Graphene electrodes prepared by the preparation method patterned using above-mentioned Graphene electrodes.Graphene electrodes are prepared as electrode material made from array base palte by the use of the above method.The technical process of the inventive method is simple, patterning preparation difficulty is small, cost is low, while can also avoid reducing the quality of Graphene electrodes in preparation process.
Description
Technical field
The present invention relates to the patterning preparation method in electrode fabrication field, more particularly to Graphene electrodes, further relate to
Using Graphene electrodes made from the preparation method, and the array base palte with the Graphene electrodes.
Background technology
The monoatomic layer material that graphene is made up of carbon atom, be at present in the world most thin material (individual layer thickness is
0.335nm).Graphene has the electron mobility of superelevation (up to 15000cm2/ V s), it is fabulous mechanical performance, high firm
Property, the thermal conductivity of higher light penetration (up to 97.7%) and superelevation is (up to 5000W/mK, more than the thermal conductivity of copper
100 times).In addition, graphene also has higher specific surface area and good flex capability.Because graphene is with multiple above
Advantage, therefore, it is widely used in industrial circle in recent years.Especially in semicon industry and photoelectric display industry
In, the application of graphene is extremely rapid with developing.
At present, the method for preparing patterned Graphene electrodes mainly has following two.First method：Transfer method.Specifically
Ground, needed for transferring graphene to first in substrate, is then performed etching using micro-processing method to graphene, with needed for being formed
Pattern.Second method：Previously prepared pattern method.Specifically, the metal material with predetermined pattern previously prepared first, then
Graphene is formed on the metal material using CVD method (i.e. CVD), is finally transferred to the graphene formed
In required substrate.
The defect of the above-mentioned method for preparing graphene is：Process is complicated, patterning difficulty is big, cost is high, while also dropping
The low quality of graphene.
The content of the invention
The technical problems to be solved by the invention are that existing Graphene electrodes patterning preparation process is complicated, and difficulty is big, raw
Produce cost high, limit its application in fields such as electronic devices.
In order to solve the above-mentioned technical problem, the invention provides a kind of patterning preparation method of Graphene electrodes, it is related to
Using Graphene electrodes made from the preparation method, and the array base palte with the Graphene electrodes.
According to an aspect of the invention, there is provided a kind of patterning preparation method of Graphene electrodes, including：
Graphene oxide layer and photoresist layer are sequentially formed on substrate；
The photoresist layer is exposed using mask instrument；
Photoresist layer after exposure is developed；
Exposed graphene oxide layer is reduced；
Photoresist after remaining exposure is peeled off, to obtain the Graphene electrodes of patterning.
Preferably, the upper surface of layer where the Graphene electrodes of the patterning obtained is the upper surface with the substrate
Parallel plane.
Preferably, the photoresist layer is exposed using mask instrument, including：Make UV light permeability that there is printing opacity
The mask plate in region and alternatively non-transparent region irradiates the photoresist layer, is entered with a pair photoresist layer corresponding with the transmission region
Row exposure.
Preferably, the photoresist layer uses negative photoresist；Photoresist layer after exposure is developed, including：
The photoresist layer corresponding with the alternatively non-transparent region is dissolved using developer solution, it is relative with the alternatively non-transparent region to expose
The graphene oxide layer answered.
Preferably, the photoresist layer uses positive photoresist；Photoresist layer after exposure is developed, including：
The photoresist layer corresponding with the transmission region is dissolved using developer solution, it is corresponding with the transmission region to expose
Graphene oxide layer.
Preferably, the graphene oxide layer is formed using solution suspension method, plavini or synthetic method.
Preferably, the photoresist is positive photoresist or negative photoresist.
Preferably, the photoresist layer is formed using slot coated method, spin-coating method or knife coating.
Preferably, using hydrazine hydrate, vitamin C, Benzenediol, sodium borohydride or pH for 11~13 alkaline solution to institute
Exposed graphene oxide layer is stated to be reduced.
There is provided a kind of patterning preparation method preparation by above-mentioned Graphene electrodes according to another aspect of the present invention
Graphene electrodes.
According to a further aspect of the invention there is provided a kind of array base palte, including：
Substrate；
The first Graphene electrodes layer on the substrate is formed at, it has the first Graphene electrodes of patterning；
It is formed at the first insulating barrier of the first Graphene electrodes layer；
It is formed at the active layer on first insulating barrier；
The second Graphene electrodes layer on the active layer is formed at, it has the second Graphene electrodes of patterning；
It is formed at the second insulating barrier on the second Graphene electrodes layer；And
It is formed at the pixel electrode layer on second insulating barrier；
Wherein, first Graphene electrodes and second Graphene electrodes are used as any in claim 1 to 8
The patterning preparation method of Graphene electrodes described in is prepared from；Also,
The upper surface of first Graphene electrodes layer and the upper surface of second Graphene electrodes layer be with it is described
The parallel plane in the upper surface of substrate.
Compared with prior art, one or more of such scheme embodiment can have the following advantages that or beneficial effect
Really：
1st, the preparation method of Graphene electrodes patterning provided in an embodiment of the present invention is based primarily upon graphene oxide composite material
The characteristics of being easy to patterning compared with grapheme material, Graphene electrodes are prepared by way of being reduced to graphene oxide,
Preparation process is simple, patterning difficulty is small, cost is low, while being conducive to the quality of the Graphene electrodes prepared by raising；
2nd, the upper surface of layer where Graphene electrodes is the plane with substrate-parallel, relative to existing patterned Graphene electricity
The rough Graphene electrodes layer formed in the preparation process of pole, the Graphene electrodes layer of the plane of this method process formation is more
Be conducive to the progress of subsequent technique；
3rd, the Graphene electrodes of the patterning prepared using the above method have advantages below：Cost is low, have a wide range of application,
It is more convenient for processing and utilization and more preferable electric conductivity；
4th, the array base palte being made using the Graphene electrodes of above-mentioned preparation is had the following advantages that：Conduct electricity very well, apply
Scope is wide, production cost is low and can be applied in the manufacture craft of Flexible Displays plane.
Other features and advantages of the present invention will be illustrated in the following description, and partly becomes from specification
It is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by wanting in specification, right
Structure specifically noted in book and accompanying drawing is asked to realize and obtain.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, the reality with the present invention
Apply example to be provided commonly for explaining the present invention, be not construed as limiting the invention.In the accompanying drawings：
Fig. 1 shows the technological process signal of the patterning preparation method of according to embodiments of the present invention one Graphene electrodes
Figure；
Fig. 2 shows in the patterning preparation method of according to embodiments of the present invention two Graphene electrodes to enter photoresist layer
The process flow diagram of row exposure imaging；
Fig. 3 shows the Graphene electrodes that the patterning preparation method of use Graphene electrodes of the embodiment of the present invention is made
Diagrammatic cross-section；
Fig. 4 shows that the embodiment of the present invention has the structural representation of the array base palte of the Graphene electrodes shown in Fig. 3.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the present invention is applied whereby
Technological means solves technical problem, and reaches the implementation process of technique effect and can fully understand and implement according to this.Need explanation
As long as not constituting each embodiment in conflict, the present invention and each feature in each embodiment can be combined with each other,
The technical scheme formed is within protection scope of the present invention.
In the patterning preparation method of existing Graphene electrodes, the patterning preparation process of Graphene electrodes is relatively more multiple
It is miscellaneous.For example, in transfer method, the process and its complexity transferred graphene on substrate, and its cost is higher.For another example
In previously prepared pattern method, the process of the previously prepared metal material with predetermined pattern is not only complicated, its graphene prepared
The pattern of electrode is single, if it is desired to changing its pattern, the metal material with predetermined pattern need to be prepared again, so it is fabricated to
This is very high, and patterning difficulty is also very big.Therefore, the application of the Graphene electrodes of obtained patterning is restricted.And it is existing
The Graphene electrodes layer prepared in the preparation method of the patterning of some Graphene electrodes is rough plane, to it
When being processed further, if thinking, Graphene electrodes layer forms plane, needs suitably to fill up Graphene electrodes layer, this
Sample just increases the technical process difficulty being processed further to Graphene electrodes.
In addition, in the preparation process of the patterning of existing Graphene electrodes, Graphene electrodes often occur necessarily
The loss of amount.For example, the etching liquid that the etching process in transfer method is used has certain corrosivity to graphene.Previously prepared figure
Chemical vapor deposition processes in case method, the quality to the Graphene electrodes of formation can also produce certain influence.Due to above-mentioned
Influence to Graphene electrodes quality, so as to have impact on the conductive effect of Graphene electrodes, and then influences to utilize Graphene electrodes
The product quality being made.
Therefore, the defect of the above-mentioned method for preparing graphene is：Process is complicated, patterning difficulty is big, cost is high, simultaneously
Also reduce the quality of graphene.
Embodiment one
To solve above-mentioned technical problem present in prior art, the embodiments of the invention provide a kind of Graphene electrodes
The preparation method of patterning.
Fig. 1 shows the step schematic diagram of the patterning preparation method of the Graphene electrodes of the embodiment of the present invention.Reference picture
1, the patterning preparation method of the present embodiment Graphene electrodes is comprised the following steps that.
First, graphene oxide layer 2 and photoresist layer 3 are sequentially formed on substrate 1.As a techniques in Fig. 1, b techniques and
Shown in c techniques.Specifically, one layer of uniform graphene oxide is first formed on the substrate 1 for needing to form Graphene electrodes, preferably
, the method for forming graphene oxide is solution suspension method, spin-coating method or slot coated method.After graphene oxide layer 2 is formed,
Slot coated method (Slit methods) is recycled to form one layer of uniform photoresist on the graphene oxide layer 2 formed.Photoetching
Glue-line 3 uses negative photoresist.Here, the region being exposed of negative photoresist can show image.Wherein, photoresist
Forming method is not limited to slot coated method.
Secondly, photoresist layer 3 is exposed using mask instrument.As shown in the d techniques in Fig. 1.Specifically, by mask
Instrument is set in parallel in the top of photoresist layer 3, ultraviolet light is vertically irradiated to through mask instrument on photoresist layer 3, with
Photoresist layer 3 is fully exposed.Preferably, mask instrument is mask plate 4.There is transmission region and alternatively non-transparent on mask plate
Region.When setting mask plate 4, the pattern of the alternatively non-transparent region formation of mask plate 4 on substrate 1 with to be formed Graphene electrodes
The position of pattern is overlapped in vertical direction.Ultraviolet light vertically passes through the transmission region of mask plate, corresponding to transmission region negative
Property photoresist is fully exposed.After the completion of exposure, mask plate 4 is removed.
Again, the photoresist layer 3 after exposure is developed.Specifically, selection can develop to negative photoresist
Developer solution.The corresponding negative photoresist in non-exposed areas is fully dissolved using developer solution, to expose non-exposed area
The corresponding graphene oxide in domain.And the corresponding negative photoresist in exposure area crosslinks solidification in developing process, it is impossible to shown
Shadow liquid dissolves.Therefore, the corresponding photoresist in exposure area is unchanged in developing process.Now, the graphene oxide shape exposed
Into pattern position be obtained Graphene electrodes pattern position.
Preferably, developer solution is potassium hydroxide.The developer solution can develop to negative photoresist.Such as the e works in Fig. 1
Shown in skill.Wherein, the corresponding non-exposed areas for specifically representing adjacent on negative photo glue-line and exposure are distinguished in 7 positions and 8 positions
The position in region.7 positions are sufficiently solubilized in the presence of developer solution potassium hydroxide, expose corresponding oxygen below 7 positions
Graphite alkene.2 positions crosslink solidification due to the negative photoresist by ultraviolet photoetching, and after exposing in developing process, no
It can be dissolved by the developing, therefore, below 2 positions of negative photoresist corresponding graphene oxide, which is not exposed, comes.
Then, exposed graphene oxide is reduced, graphene oxide is reduced to graphene.Such as the f works in Fig. 1
Shown in skill.Specifically, exposed graphene oxide after development is fully reduced with reducing agent, by graphene oxide also
Originally it was graphene, and due to having photoresist on not exposed graphene oxide, not in contact with reducing agent, therefore was not gone back
It is former.Preferably, reducing agent is the alkaline solution that hydrazine hydrate, vitamin C, Benzenediol, sodium borohydride or pH are 11~13.It is preferred that
, alkaline solution is NaOH solution.Finally, remaining photoresist is peeled off, to obtain the Graphene electrodes of patterning.Tool
Body, selection can peel off the stripper (Stripper liquid) of negative photoresist, will be developed using stripper (Stripper liquid)
Remaining photoresist layer (photoresist layer after exposing) is peeled off after liquid dissolving.After stripping, it will be remained in Graphene electrodes
Stripper water-wash away, that is, obtain the Graphene electrodes of patterning.As shown in the g techniques in Fig. 1.Wherein, 6 positions are oxidation stone
Black alkene material, 5 positions are grapheme material.Grapheme material forms certain pattern, the as graphene with certain pattern
Electrode.
Put down using the upper surface of Graphene electrodes and the upper surface of remaining graphene oxide of above-mentioned preparation method formation
Together.The plane of the layer formed by the Graphene electrodes patterned and remaining graphene oxide is parallel with the upper surface of substrate 1.
Using the present embodiment, because the technical process for directly forming grapheme material on substrate 1 compares graphene oxide
Complicated many of formation process process on substrate 1, therefore this method using forming graphene oxide layer 2 on substrate 1, then
Photoresist layer 3 is formed on graphene oxide layer 2, by the exposure imaging to photoresist layer 3, and is combined to exposed graphite oxide
Alkene carries out reduction etching, to form the Graphene electrodes of patterning.
It can be seen that, the preparation process letter of patterning of the preparation process compared to existing Graphene electrodes of the present embodiment method
Single is more, and which reduces the difficulty of the process of patterned Graphene electrodes.The graphene for preparing patterning is also reduced simultaneously
The cost of manufacture of electrode.
In addition, in the present embodiment, the upper surface of layer where the Graphene electrodes of the patterning of formation is parallel with substrate 1
Plane.From existing method formation upper surface for rough Graphene electrodes layer it is different, this method row into graphene
Layer where electrode is when carrying out following process, without being filled and led up to layer where Graphene electrodes.That is, simplifying to stone
The technical process that black alkene electrode is processed further, expands the application of Graphene electrodes.
Embodiment two
Accordingly, Fig. 2 is shown in the patterning preparation methods of the Graphene electrodes of another embodiment of the present invention to photoetching
Glue-line is exposed the process flow diagram of development.Reference picture 2, the present embodiment is with the difference of embodiment one：
During graphene oxide layer and photoresist layer is formed, using slot coated method (Slit methods) in graphite oxide
The photoresist layer 3 formed on alkene layer uses positive photoresist.The non-exposed areas of positive photoresist can show image.
In exposure process, as shown in the d ＇ techniques in Fig. 2, mask instrument is set in parallel in positive photoresist layer
Side, then makes ultraviolet light be vertically irradiated to through mask instrument on photoresist layer 3, fully to be exposed to photoresist layer 3.It is excellent
Selection of land, mask instrument is to have transmission region and alternatively non-transparent region on mask plate 4, mask plate 4.When setting mask instrument, cover
The transmission region row of diaphragm plate 4 into pattern weighed in vertical direction with to be formed the position of Graphene electrodes pattern on substrate 1
Close.Ultraviolet light vertically passes through the transmission region of mask plate, and the corresponding positive photoresist of transmission region of mask plate 4 is carried out fully
Exposure.
In developing process, the developer solution that can be developed to positive photoresist is chosen, using developer solution to exposure region
Domain photoresist is fully dissolved, to expose the corresponding graphene oxide in photoresist exposure area.And the non-exposed of photoresist
The corresponding positive photoresist in region crosslinks solidification in developing process, it is impossible to be dissolved by the developing, therefore, non-exposed areas
Lithography development process is unchanged.
Preferably, developer solution is TMAH.The developer solution can develop to positive photoresist.As in Fig. 2
E ＇ techniques shown in.Wherein, 7 ＇ positions and 8 ＇ positions specifically represent the adjacent non-exposed in positive photoresist layer respectively
Region and the position of exposure area.8 ＇ positions are because the positive photoresist by ultraviolet photoetching, and after exposing is in developing process quilt
Fully dissolving, therefore, 8 ＇ positions are dissolved under the abundant effect of developer solution TMAH, expose photoresist
Corresponding graphene oxide region below 8 ＇ positions.7 ＇ positions of photoresist crosslink solidification in developing process, it is impossible to shown
Shadow liquid dissolves, therefore, and corresponding graphene oxide, which is not exposed, below 7 ＇ positions of positive photoresist comes.
The process reduced to exposed graphene oxide layer is identical with embodiment one.
During remaining photoresist is peeled off, selection can peel off the stripper (Stripper liquid) of positive photoresist,
Remaining photoresist after developing solution dissolution (photoresist layer i.e. after non-exposed) is shelled using stripper (Stripper liquid)
From.
The present embodiment beneficial effect identical and resulting with the general principle of embodiment one is also identical, therefore herein
Place is no longer repeated the above.
Embodiment three
Correspondingly, the embodiment of the present invention also provides a kind of pattern of the Graphene electrodes of utilization embodiment one or embodiment two
Graphene electrodes prepared by the preparation method of change.
Fig. 3 shows the patterned Graphene that the embodiment of the present invention is made using the patterning preparation method of Graphene electrodes
The diagrammatic cross-section of electrode.
Reference picture 3, the present embodiment Graphene electrodes are located at Graphene electrodes layer.The patterning prepared using the above method
Graphene electrodes have advantages below：Cost is low, have a wide range of application, be more convenient for processing and utilization and more preferable electric conductivity.
Here, upper surface of the upper surface of layer where Graphene electrodes parallel to substrate 1.Using the patterning of the present embodiment
Graphene electrodes, due to Graphene electrodes layer upper surface be the plane parallel with substrate 1, therefore, to the Graphene electrodes
When layer is processed further, with regard to being filled and led up without the upper surface to Graphene electrodes layer, the production process of product is simplified.
In addition, the Graphene electrodes can be applied to production flexibility display plane, the application of Graphene electrodes is expanded.
Example IV
Correspondingly, the embodiment of the present invention also provides the array base palte that the Graphene electrodes in a kind of utilization embodiment three are made
1。
Fig. 4 shows the structural representation of array base palte 1 that the embodiment of the present invention is made using above-mentioned Graphene electrodes.
Referring to Fig. 4, array base palte of the embodiment of the present invention 1 includes substrate 1, the first Graphene electrodes the 9, first insulating barrier of layer
10th, active layer 11, the second Graphene electrodes the 12, second insulating barrier 13 of layer and pixel electrode layer 14.
Specifically, the first Graphene electrodes layer 9 is formed on substrate 1, and with the first Graphene electrodes of patterning.The
The first insulating barrier 10 is formed in one Graphene electrodes.Formed on first insulating barrier 10 on active layer 11, active layer 11 and form second
Form the second insulating barrier 13 on Graphene electrodes layer 12, the second Graphene electrodes layer 12 and be formed with pixel on the second insulating barrier 13
Electrode layer 14.Wherein, the first Graphene electrodes and the second Graphene electrodes are the graphene such as embodiment one or embodiment two
What the patterning preparation method of electrode was prepared from.Also, upper surface and the second graphite of the first Graphene electrodes layer 9 formed
The upper surface of alkene electrode layer 12 is the plane parallel with the upper surface of substrate 1.
Using the substrate 1 of the present embodiment, because the electric conductivity of Graphene electrodes is significantly larger than the electric conductivity of metal, therefore,
The electric conductivity of the array base palte 1 is better than with array base palte 1 of the metal material as electrode.Further, since grapheme material has
Good flex capability, therefore the array base palte 1 can also be used to prepare Flexible Displays plane, so as to expand the array base palte 1
Application.
Further, because the upper surface of the first Graphene electrodes layer 9 and the upper surface of the second Graphene electrodes layer 12 are equal
It is that rough Graphene electrodes layer is different from the upper surface being conventionally formed for the plane parallel with the upper surface of substrate 1, because
This, the technique of the array base palte 1 the first insulating barrier 10 of formation and the second insulating barrier 13 can be easier, is conducive to the array base
Plate 1 carries out quantization production.
While it is disclosed that embodiment as above, but described content is only to facilitate understanding the present invention and adopting
Embodiment, is not limited to the present invention.Any those skilled in the art to which this invention pertains, are not departing from this
On the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details,
But protection scope of the present invention, still should be subject to the scope of the claims as defined in the appended claims.
Claims (10)
1. a kind of patterning preparation method of Graphene electrodes, including：
Graphene oxide layer and photoresist layer are sequentially formed on substrate；
The photoresist layer is exposed using mask instrument；
Photoresist layer after exposure is developed；
Exposed graphene oxide layer is reduced；
Photoresist after remaining exposure is peeled off, to obtain the Graphene electrodes of patterning.
2. patterning preparation method according to claim 1, it is characterised in that the Graphene electrodes of the patterning obtained
The upper surface of place layer is the plane parallel with the upper surface of the substrate.
3. patterning preparation method according to claim 1, it is characterised in that using mask instrument to the photoresist layer
It is exposed, including：
Make UV light permeability that there is transmission region and the mask plate in alternatively non-transparent region to irradiate the photoresist layer, with pair with it is described
The corresponding photoresist layer in light region is exposed.
4. patterning preparation method according to claim 3, it is characterised in that the photoresist layer uses negative photo
Glue；Photoresist layer after exposure is developed, including：
The photoresist layer corresponding with the alternatively non-transparent region is dissolved using developer solution, to expose and the alternatively non-transparent region
Corresponding graphene oxide layer.
5. patterning preparation method according to claim 3, it is characterised in that the photoresist layer uses positive-tone photo
Glue；Photoresist layer after exposure is developed, including：
The photoresist layer corresponding with the transmission region is dissolved using developer solution, it is relative with the transmission region to expose
The graphene oxide layer answered.
6. patterning preparation method according to any one of claim 1 to 5, it is characterised in that utilization solution suspension method,
Plavini or synthetic method form the graphene oxide layer.
7. patterning preparation method according to any one of claim 1 to 5, it is characterised in that utilization slot coated method,
Spin-coating method or knife coating form the photoresist layer.
8. patterning preparation method according to any one of claim 1 to 5, it is characterised in that utilize hydrazine hydrate, dimension life
Plain C, Benzenediol, sodium borohydride or pH reduce for 11~13 alkaline solution to the exposed graphene oxide layer.
9. stone prepared by a kind of patterning preparation method of Graphene electrodes using as any one of claim 1 to 8
Black alkene electrode.
10. a kind of array base palte, it is characterised in that：Including：
Substrate；
The first Graphene electrodes layer on the substrate is formed at, it has the first Graphene electrodes of patterning；
It is formed at the first insulating barrier of the first Graphene electrodes layer；
It is formed at the active layer on first insulating barrier；
The second Graphene electrodes layer on the active layer is formed at, it has the second Graphene electrodes of patterning；
It is formed at the second insulating barrier on the second Graphene electrodes layer；And
It is formed at the pixel electrode layer on second insulating barrier；
Wherein, first Graphene electrodes and second Graphene electrodes are used such as any one of claim 1 to 8 institute
The patterning preparation method for the Graphene electrodes stated is prepared from；Also,
The upper surface of the first Graphene electrodes layer and the upper surface of second Graphene electrodes layer are and the substrate
The parallel plane in upper surface.
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