CN106992755A - The operational transconductance amplifier applied suitable for wide input range - Google Patents
The operational transconductance amplifier applied suitable for wide input range Download PDFInfo
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- CN106992755A CN106992755A CN201610036854.4A CN201610036854A CN106992755A CN 106992755 A CN106992755 A CN 106992755A CN 201610036854 A CN201610036854 A CN 201610036854A CN 106992755 A CN106992755 A CN 106992755A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
- H03F1/48—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers
- H03F1/483—Modifications of amplifiers to extend the bandwidth of aperiodic amplifiers with field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45212—Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset
Abstract
The present invention discloses a kind of operational transconductance amplifier applied suitable for wide input range, and it includes input stage circuit, current mirroring circuit and voltage breech lock pair.Input stage circuit includes input transistors pair and bias transistor pair, and input transistors are to passing through the two-end-point electrical connection bias transistor pair inside input stage circuit.First bias terminal of current mirroring circuit is electrically connected two-end-point with the second bias terminal.Voltage breech lock is to the first latch circuit and the second latch circuit, the first latch circuit is electrically connected to an earth terminal or a system voltage end, electrical connection bias transistor pair, with being electrically connected two-end-point with second latch circuit.First latch circuit and the second latch circuit by the voltage on two-end-point being latched in specific voltage, or makes the voltage on two-end-point mutually the same.
Description
Technical field
The present invention relates to a kind of operational transconductance amplifier (Operational Transconductance
Amplifier, OTA), and more particularly to a kind of operational transconductance amplifier applied suitable for wide input range,
Wherein wide input range applies such as application including LED drive.
Background technology
For switchover type light emitting diode (LED) equipment, it is wide that it needs LED drive to produce pulse wave
Modulating signal is spent to drive.Pulse wave width modulation device to produce pulse wave width modulation signal can have one
Individual operational transconductance amplifier, and operational transconductance amplifier amplification reference voltage according to light emitting diode with returning
The error signal between the feedback voltage of electric current generation is awarded, so that pulse wave width modulation device adjustment pulse wave is wide
Spend the responsibility of the modulating signal interval time (period of duty cycle).
Fig. 1 is refer to, Fig. 1 is the circuit diagram of traditional operational transconductance amplifier.As shown in figure 1,
Operational transconductance amplifier 1 includes input stage circuit 10 and current mirroring circuit 12, wherein input stage circuit 10
Electrically connect current mirroring circuit 12.Input stage circuit 10 is by input transistors to receiving the first input voltage
CS (for example, feedback voltage by being produced according to light emitting diode feedback current) and the second input voltage
VREF (be, for example, reference voltage), with according to the second input voltage VREF and the first input voltage CS it
Between voltage differences change on its bias put on current mirroring circuit 12, that is, end points aa, bb
Voltage as bias be supplied to current mirroring circuit 12 so that the output signal of current mirroring circuit 12
COMP is (for example, the mistake between reference voltage and the feedback voltage produced according to light emitting diode feedback current
Difference signal).
Further say, input stage circuit 10 includes current source S, input transistors pair and bias crystal
Pipe pair, wherein input transistors two P-type transistors MP1, MP2 to being made up of, and bias is brilliant
Body pipe two N-type transistors MN1, MN2 to being made up of.Current source S output end electrical connection p-type
Transistor MP1, MP2 source terminal, P-type transistor MP1, MP2 gate terminal receive respectively
One input voltage CS and the second input voltage VREF, P-type transistor MP1, MP2 drain electrode end point
The end points aa and bb of two inside of not electrical input stage circuit 10.N-type transistor MN1 drain electrode
End electrical connection N-type transistor MN1 gate terminal and the first bias terminal of current mirroring circuit 12, and lead to
Cross end points aa electrical connection P-type transistors MP1 drain electrode end.N-type transistor MN2 drain electrode end electricity
N-type transistor MN2 gate terminal and the second bias terminal of current mirroring circuit 12 are connected, and passes through end
Point bb electrical connection P-type transistors MP2 drain electrode end.The source terminal of N-type transistor MN1, MN2
It is electronically connected to earth terminal GND.
Current mirroring circuit 12 includes P-type transistor MP3, MP4 and N-type transistor MN5, MN6.
P-type transistor MP3, MP4 gate terminal are electrically connected to each other, and P-type transistor MP3, MP4
Source terminal electrical connection system voltage end VDD.P-type transistor MP3 drain electrode end electrical connection P-type crystal
Pipe MP3 gate terminal and N-type transistor MN5 drain electrode end, P-type transistor MP4 drain electrode end
Electrically connect N-type transistor MN6 drain electrode end.The gate terminal difference of N-type transistor MN5, MN6
The gate terminal of N-type transistor MN1, MN2 is electrically connected, using as the of current mirroring circuit 12
One bias terminal and the second bias terminal.The source terminal of N-type transistor MN5, MN6 is electronically connected to ground connection
Hold GND.
Operational transconductance amplifier 1 is applied in general dc voltage changer (DC/DC converter),
Do not have because between the second input voltage VREF and the first input voltage CS difference it is excessive and caused by it is defeated
Foot well (foot room) amplitude of oscillation for entering grade circuit 10 is excessive.In other words P-type transistor MP1, MP2
Drain electrode end/source electrode terminal voltage VDS1With VDS2Will not be inconsistent.However, in LED drive
Application in, the second input voltage VREF may be 0.2 volt, and the first input voltage is possible flat
Equal voltage is 0.2 volt and most puts on the triangle wave voltage signal that volt is 1 volt, therefore, P-type crystal
Pipe MP1, MP2 drain electrode end/source electrode terminal voltage VDS1With VDS2(voltage for corresponding to end points aa and bb)
It is not consistent.P-type transistor MP1, MP2 drain electrode end/source electrode terminal voltage VDS1With VDS2Determine respectively
Determine P-type transistor MP1, MP2 mutual conductance coefficient gm1、gm2, and cause current mirroring circuit MN1,
MN5 and MN2, MN6 replicate electricity caused by passage modulation effect (channel length modulation)
Stream skew, if therefore P-type transistor MP1, MP2 drain electrode end/source electrode terminal voltage VDS1With VDS2Differ
Cause, it will so that output signal COMP has offset (offset).
The content of the invention
The embodiment of the present invention provides a kind of operational transconductance amplifier applied suitable for wide input range, this mutual conductance
Operational amplifier includes input stage circuit, current mirroring circuit and voltage breech lock pair.Input stage circuit includes defeated
Enter transistor pair and bias transistor pair, input transistors are to passing through the two-end-point electricity inside input stage circuit
Connection bias transistor pair.First bias terminal of current mirroring circuit is electrically connected two ends with the second bias terminal
Point.Voltage breech lock is to the first latch circuit and the second latch circuit, the first latch circuit and described the
Two latch circuits are electrically connected to an earth terminal or a system voltage end, electrical connection bias transistor pair, with dividing
Two-end-point is not electrically connected.First latch circuit and the second latch circuit are to by the voltage breech lock on two-end-point
In specific voltage, or make the voltage on two-end-point mutually the same.
Accordingly, operational transconductance amplifier provided in an embodiment of the present invention is received even in input stage circuit
During widely different between two input voltages, therefore its output signal will not also offset, therefore described
Operational transconductance amplifier has higher precision, and suitable for wide input range application.
To enable the feature and technology contents that are further understood that the present invention, refer to below in connection with the present invention
Detailed description and accompanying drawing, but these explanations are only used for illustrating the present invention with appended accompanying drawing, rather than to this
The interest field of invention makees any limitation.
Brief description of the drawings
Fig. 1 is the circuit diagram of traditional operational transconductance amplifier；
Fig. 2A is the circuit diagram of the operational transconductance amplifier of the embodiment of the present invention；
Fig. 2 B are the circuit diagram of the operational transconductance amplifier of another embodiment of the present invention；
Fig. 3 A are the circuit diagram of the operational transconductance amplifier of another embodiment of the present invention；
Fig. 3 B are the circuit diagram of the operational transconductance amplifier of another embodiment of the present invention.
Symbol description
1~5：Operational transconductance amplifier
10、20、30、40、50：Input stage circuit
12、22、32、42、52：Current mirroring circuit
24、34、44、54：Voltage breech lock pair
aa、bb：End points
agnda、agndb、vdda、vddb：End points
OP1、OP2：Amplifier
S：Current source
VDD：System voltage end
GND：Earth terminal
MN1~MN8：N-type transistor
MP1~MP8：P-type transistor
CS：First input voltage
VREF：Second input voltage
COMP：Output signal
Vb：Specific voltage
Embodiment
Various exemplary embodiments will be more fully described referring to the accompanying drawing enclosed below, it is attached what is enclosed
Some exemplary embodiments are shown in figure.However, concept of the present invention may embody in many different forms,
And should not be construed as limited by exemplary embodiments set forth herein.Specifically there is provided these illustrations
Property embodiment make it that the present invention will be to be detailed and complete, and fully this will be passed on to send out to those skilled in the art
The category of bright concept.In all accompanying drawings, the size and relative size in Ceng Ji areas can be lavished praise on oneself in order to clear.
Similar numeral indicates similar component all the time, and term "or" used herein may regarding actual conditions
Any one of project or all combinations of many persons are listed including associated.
The embodiment of the present invention provides a kind of operational transconductance amplifier applied suitable for wide input range, even if defeated
Enter widely different, the output letter of operational transconductance amplifier between two input voltages that grade circuit is received
Number also will not therefore it offset.The operational transconductance amplifier includes input stage circuit, current mirroring circuit
With voltage breech lock pair.Input stage circuit include input transistors to, bias transistor pair and current source, electricity
Stream source electrically connects input transistors pair, and input transistors bias crystal to electrical connection bias transistor pair
Pipe is to electrical connection current mirroring circuit.Voltage breech lock is to two voltage latch circuits, biasing transistor pair
Respectively earth terminal or system voltage end are electrically connected to by this two voltage latch circuits.This two voltage door bolts
Lock circuit is also electrically connected two end points between input transistors pair and bias transistor pair, with thus
Voltage on two end points between input transistors pair and bias transistor pair is maintained at specific voltage
Or make the voltage of this two end points mutually the same.
Voltage breech lock to being essentially a pair of degenerative circuit frameworks, to by input transistors pair with bias
Voltage on two end points between transistor pair carries out breech lock, in this way, two of input transistors pair are defeated
Drain electrode end/source electrode the terminal voltage and mutual conductance coefficient for entering transistor can be consistent, the skew without having output signal
The problem of.Each voltage latch circuit of voltage breech lock centering includes amplifier and switching transistor,
The voltage signal that wherein the gate terminal reception amplifier of switching transistor is exported, the drain electrode end of switching transistor
One end of the corresponding bias transistor of the electrical connection bias transistor pair, the source terminal of switching transistor
Earth terminal or system voltage end are electrically connected, the positive input terminal of amplifier electrically connects corresponding end points, Yi Jifang
The negative input end electrical connection specific voltage of big device or corresponding another end points.Consequently, it is possible to input transistors
Pair bias transistor pair between two end points on voltage will be maintained at specific voltage, or this two
Voltage on end points can be mutually the same, and can avoid the leakage of two input transistors of input transistors pair
Extremely/source electrode terminal voltage (or mutual conductance coefficient) is inconsistent each other.
Fig. 2A is refer to, Fig. 2A is the circuit diagram of the operational transconductance amplifier of the embodiment of the present invention.
Operational transconductance amplifier 2 includes input stage circuit 20, current mirroring circuit 22 and voltage breech lock to 24, its
Middle input stage circuit 20 electrical connection current mirroring circuit 22 and voltage breech lock are to 24, and input stage circuit 20
Earth terminal GND is electrically connected to 24 by voltage breech lock.Operational transconductance amplifier 2 may be adapted to wide defeated
Enter range applications, such as in the application of LED drive, but the present invention is not restricted to this.
Input stage circuit 20 receives the first input voltage CS and the second input voltage VREF, wherein second
Input voltage VREF can be reference voltage, for example, 0.2 volt, and the first input voltage CS can
Using reference voltage as the average voltage of triangle wave voltage signal, for example pendulum volt is 1 volt of triangular wave to the maximum
Voltage signal, its minimum voltage and maximum respectively -0.3 volt and 0.8 volt.Input stage circuit 20
Two biass (end points aa, bb are produced respectively according to the first input voltage CS and the second input voltage VREF
Voltage) in the first bias terminal and the second bias terminal of current mirroring circuit 22, and current mirroring circuit 22 according to
Two biass produce output signal COMP accordingly.
In order to avoid input transistors MP1, MP2 paired in input stage circuit 20 drain electrode end/source electrode
Terminal voltage VDS1、VDS2Inconsistent (that is, it is to avoid input transistors MP1, MP2 mutual conductance coefficient gm1、
gm2It is inconsistent) cause output signal COMP to have offset, voltage breech lock passes through a pair of negative feedbacks to 24
The framework of circuit, can be latched in specific voltage by two inside input stage circuit 20 end points aa, bb
Vb。
Input stage circuit 20 includes current source S, input transistors pair and bias transistor pair, wherein defeated
Enter transistor to being made up of two input transistors MP1, MP2 (be, for example, P-type transistor), and partially
Piezoelectric crystal two bias transistors MN1, MN2 (being, for example, N-type transistor) to being made up of.Electric current
Source S output end electrical connection input transistors MP1, MP2 source terminal, input transistors MP1,
MP2 gate terminal receives the first input voltage CS and the second input voltage VREF, input crystal respectively
Pipe MP1, MP2 drain electrode end distinguish the end points aa and bb of two inside of electrical input stage circuit 20.
Bias transistor MN1 drain electrode end electrical connection bias transistor MN1 gate terminal and current mirroring circuit
22 the first bias terminal, and pass through end points aa electrical connection input transistors MP1 drain electrode end.Bias is brilliant
The of body pipe MN2 drain electrode end electrical connection bias transistor MN2 gate terminal and current mirroring circuit 22
Two bias terminals, and pass through end points bb electrical connection input transistors MP2 drain electrode end.Bias transistor
MN1, MN2 source terminal are electronically connected to voltage breech lock to 24 two ends (end points agnda, agndb),
And earth terminal GND is electrically connected to 24 by voltage breech lock.
Current mirroring circuit 22 includes P-type transistor MP3, MP4 and N-type transistor MN5, MN6.
P-type transistor MP3, MP4 gate terminal are electrically connected to each other, and P-type transistor MP3, MP4
Source terminal electrical connection system voltage end VDD.P-type transistor MP3 drain electrode end electrical connection P-type crystal
Pipe MP3 gate terminal and N-type transistor MN5 drain electrode end, P-type transistor MP4 drain electrode end
Electrically connect N-type transistor MN6 drain electrode end.The gate terminal difference of N-type transistor MN5, MN6
Electrical connection bias transistor MN1, MN2 gate terminal, using as the first of current mirroring circuit 22
Bias terminal and the second bias terminal.The source terminal of N-type transistor MN5, MN6 is electronically connected to voltage door bolt
The two ends (end points agnda, agndb) to 24 are locked, and earth terminal is electrically connected to 24 by voltage breech lock
GND。
Voltage breech lock includes two voltage latch circuits to 24, and one of voltage latch circuit is by amplifying
Device OP1 and switching transistor MN7 are constituted, and another voltage latch circuit by amplifier OP2 with opening
Close transistor MN8 compositions.In this embodiment, switching transistor MN7, MN8 is, for example, N-type
Transistor.The gate terminal of switching transistor MN7, MN8 is electrically connected amplifier OP1, OP2's
Output end, with the voltage signal of reception amplifier OP1, OP2 output respectively.Switching transistor MN7,
MN8 source terminal electrical connection earth terminal GND, and switching transistor MN7, MN8 drain electrode end
End points agnda, agndb are electrically connected, so that switching transistor MN7 drain electrode end electrical connection N-type
Transistor MN5 and bias transistor MN1 source terminal, and make switching transistor MN8 drain electrode
End electrical connection N-type transistor MN6 and bias transistor MN2 source terminal.In addition, amplifier OP1,
OP2 negative input end is both electrically connected with specific voltage Vb, and amplifier OP1, OP2 positive input terminal point
Electricity Lian Jie not end points aa and bb.
By above-mentioned annexation, it is known that voltage breech lock is the framework of degenerative circuit, therefore,
In stable state, the voltage on amplifier OP1, OP2 positive input terminal should be equal to specific voltage Vb,
That is, the voltage on end points aa and bb can be equal to specific voltage Vb, and unnecessary cross-pressure is then by opening
Transistor MN7 and MN8 is closed to bear (voltage corresponded on end points agnda and agndb).Due to
Voltage on end points aa and bb can be equal to specific voltage Vb, therefore, input transistors MP1 and MP2
Extreme/source electrode terminal voltage VDS1、VDS2Unanimously (that is, make input transistors MP1, MP2 mutual conductance
Coefficient gm1、gm2Unanimously), so as to avoid output signal COMP because of the first input voltage CS and second
The skew that voltage differences between input voltage VREF are excessive and produce.
Fig. 2 B are refer to, Fig. 2 B are the circuit signals of the operational transconductance amplifier of another embodiment of the present invention
Figure.In fig. 2b, operational transconductance amplifier 30 include input stage circuit 30, current mirroring circuit 32 with
Voltage breech lock is to 34.In this embodiment, input stage circuit 30 and current mirroring circuit 32 respectively with figure
2A input stage circuit 20 is identical with current mirroring circuit 22, therefore does not repeat.Voltage compared to Fig. 2A
Breech lock is not to the negative input end of amplifier OP1 and OP2 in 34 to 24, Fig. 2 B voltage breech lock
Specific voltage Vb is received, but end points bb and aa is connected respectively to, so that two end points aa and bb
Voltage is mutually the same.Consequently, it is possible to can similarly make input transistors MP1 and MP2 it is extreme/
Source electrode terminal voltage VDS1、VDS2Unanimously (that is, make input transistors MP1, MP2 mutual conductance coefficient gm1、
gm2Unanimously), so as to avoid output signal COMP because of the first input voltage CS and the second input voltage
The skew that voltage differences between VREF are excessive and produce.
Fig. 3 A are refer to, Fig. 3 A are the circuit signals of the operational transconductance amplifier of another embodiment of the present invention
Figure.Operational transconductance amplifier 4 includes input stage circuit 40, current mirroring circuit 42 with voltage breech lock to 44,
Wherein electrical connection current mirroring circuit 42 and the voltage breech lock of input stage circuit 40 is to 44, and input stage circuit
40 are electrically connected to system voltage end VDD to 44 by voltage breech lock.Operational transconductance amplifier 4 can be fitted
In wide input range application, such as application of LED drive, but the present invention is not intended to limit
In this.
Input stage circuit 40 receives the first input voltage CS and the second input voltage VREF, wherein second
Input voltage VREF can be reference voltage.In order to avoid input paired in input stage circuit 40 is brilliant
Body pipe MN1, MN2 drain electrode end/source electrode terminal voltage VDS1、VDS2Inconsistent (that is, it is to avoid input
Transistor MP1, MP2 mutual conductance coefficient gm1、gm2It is inconsistent) cause output signal COMP inclined
Move, voltage breech lock, can be by the inside of input stage circuit 40 to 44 frameworks by a pair of degenerative circuits
Two end points aa, bb are latched in specific voltage Vb.
Input stage circuit 40 includes current source S, input transistors pair and bias transistor pair, wherein defeated
Enter transistor to being made up of two input transistors MN1, MN2 (be, for example, N-type transistor), and
Bias transistor two bias transistors MP1, MP2 (being, for example, P-type transistor) to being made up of.Electric current
Source S output end electrical connection input transistors MN1, MN2 source terminal, input transistors MN1,
MN2 gate terminal receives the first input voltage CS and the second input voltage VREF, input crystal respectively
Pipe MN1, MN2 drain electrode end distinguish the end points aa and bb of two inside of electrical input stage circuit 40.
Bias transistor MP1 drain electrode end electrical connection bias transistor MP1 gate terminal and current mirroring circuit 42
The first bias terminal, and by holding tie point aa to electrically connect input transistors MN1 drain electrode end.Bias
Transistor MP2 drain electrode end electrical connection bias transistor MP2 gate terminal and current mirroring circuit 42
Second bias terminal, and pass through end points bb electrical connection input transistors MN2 drain electrode end.Bias transistor
MP1, MP2 source terminal are electronically connected to voltage breech lock to 44 two-end-point vdda, vddb, and lead to
Overvoltage breech lock is electrically connected to system voltage end VDD to 44.
Current mirroring circuit 42 includes N-type transistor MN3, MN4 and P-type transistor MP5, MP6.
The gate terminal of N-type transistor MN3, MN4 is electrically connected to each other, and N-type transistor MN3, MN4
Source terminal electrical connection earth terminal GND.N-type transistor MN3 drain electrode end electrical connection N-type transistor
MN3 gate terminal and P-type transistor MP5 drain electrode end, N-type transistor MN4 drain electrode end electricity
Connect P-type transistor MP6 drain electrode end.P-type transistor MP5, MP6 gate terminal are electrically connected respectively
Bias transistor MP1, MP2 gate terminal is connect, using the first bias as current mirroring circuit 22
End and the second bias terminal.P-type transistor MP5, MP6 source terminal are electronically connected to voltage breech lock pair
44 two-end-point vdda, vddb, and system voltage end VDD is electrically connected to 44 by voltage breech lock.
Voltage breech lock includes two voltage latch circuits to 44, and one of voltage latch circuit is by amplifying
Device OP1 and switching transistor MP7 are constituted, and another voltage latch circuit by amplifier OP2 with opening
Close transistor MP8 compositions.In this embodiment, switching transistor MP7, MP8 is, for example, that p-type is brilliant
Body pipe.The gate terminal of switching transistor MP7, MP8 is electrically connected the defeated of amplifier OP1, OP2
Go out end, with the voltage signal of reception amplifier OP1, OP2 output respectively.Switching transistor MP7,
MP8 source terminal electrical connection system voltage end VDD, and switching transistor MP7, MP8 drain electrode
End is electrically connected end points vdda, vddb, so that switching transistor MP7 drain electrode end electrical connection p-type
Transistor MP5 and bias transistor MP1 source terminal, and make switching transistor MP8 drain electrode
End electrical connection P-type transistor MP6 and bias transistor MP2 source terminal.In addition, amplifier OP1,
OP2 negative input end is both electrically connected with specific voltage Vb, and amplifier OP1, OP2 positive input terminal point
Electricity Lian Jie not end points aa and bb.
By above-mentioned annexation, it is known that voltage breech lock is the framework of degenerative circuit, therefore,
In stable state, the voltage on amplifier OP1, OP2 positive input terminal should be equal to specific voltage Vb,
That is, the voltage on end points aa and bb can be equal to specific voltage Vb, and unnecessary cross-pressure is then by opening
Transistor MP7 and MP8 is closed to bear (voltage corresponded on end points vdda, vddb).Due to end points
Voltage on aa and bb can be equal to specific voltage Vb, therefore, input transistors MP1 and MP2 pole
End/source electrode terminal voltage VDS1、VDS2Unanimously (that is, make input transistors MP1, MP2 mutual conductance coefficient
gm1、gm2Unanimously), so as to avoid output signal COMP because of the input electricity of the first input voltage CS and second
The skew pressed the voltage differences between VREF excessive and produced.
Fig. 3 B are refer to, Fig. 3 B are the circuit signals of the operational transconductance amplifier of another embodiment of the present invention
Figure.In figure 3b, operational transconductance amplifier 50 include input stage circuit 50, current mirroring circuit 52 with
Voltage breech lock is to 54.In this embodiment, input stage circuit 50 and current mirroring circuit 52 respectively with figure
3A input stage circuit 40 is identical with current mirroring circuit 42, therefore does not repeat.Compared to Fig. 3 A voltage
Breech lock is not to the negative input end of amplifier OP1 and OP2 in 54 to 44, Fig. 3 B voltage breech lock
Specific voltage Vb is received, but end points bb and aa is connected respectively to, so that two end points aa and bb
Voltage is mutually the same.Consequently, it is possible to can similarly make input transistors MN1 and MN2 it is extreme/
Source electrode terminal voltage VDS1、VDS2Unanimously (that is, make input transistors MN1, MN2 mutual conductance coefficient
gm1、gm2Unanimously), so as to avoid output signal COMP because of the input electricity of the first input voltage CS and second
The skew pressed the voltage differences between VREF excessive and produced.
In summary described, operational transconductance amplifier system provided in an embodiment of the present invention passes through voltage breech lock pair
Two end points internal in input stage circuit are locked in specific voltage or make the voltage of this two-end-point phase each other
Together, thus to allow extreme/source electrode terminal voltage V of two input transistors in input stage circuitDS1、VDS2
Unanimously (that is, make the mutual conductance coefficient g of input transistorsm1、gm2Unanimously).Consequently, it is possible to operational transconductance
The output voltage of amplifier will not be excessive because of the difference between the first input voltage and the second input voltage,
And offset, that is, the operational transconductance amplifier is suitable to wide input range application.
It is described above, it is only the optimal specific embodiment of the present invention, but the feature of the present invention is not limited to
In this, any those skilled in the art in the field of the invention, can think easily and change or modification,
The scope of the claims in following this case can all be covered.
Claims (10)
1. a kind of operational transconductance amplifier applied suitable for wide input range, including：
Input stage circuit, inside has two-end-point, including an input transistors pair and a bias transistor pair,
The input transistors by the two-end-point to electrically connecting the bias transistor pair；
Current mirroring circuit, with the first bias terminal and the second bias terminal, first bias terminal and described the
Two bias terminals are electrically connected the two-end-point；
Voltage breech lock pair, with the first latch circuit and the second latch circuit, first latch circuit with
Second latch circuit is electrically connected to an earth terminal or a system voltage end, electrically connects the bias crystal
Pipe pair, with being electrically connected the two-end-point, first latch circuit is used with second latch circuit
So that the voltage on the two-end-point is latched in into a specific voltage, or make voltage on the two-end-point each other
It is identical.
2. operational transconductance amplifier as claimed in claim 1, wherein first latch circuit includes the
One amplifier and first switch transistor, and second latch circuit opens including the second amplifier with second
Transistor is closed, the gate terminal of second switch transistor is electrically connected described in the first switch transistor AND gate
The output end of first amplifier and second amplifier, the described in the first switch transistor AND gate
The drain electrode end electrical connection bias transistor pair of two switching transistors, the first switch transistor AND gate institute
The source terminal for stating second switch transistor is electrically connected to the earth terminal or the system voltage end, described
The positive input terminal of one amplifier and second amplifier is electrically connected a first end of the two-end-point
Point and one second end points, and first amplifier are electrically connected with the negative input end of second amplifier
The specific voltage, or it is electrically connected second end points and the first end point.
3. operational transconductance amplifier as claimed in claim 2, wherein the input transistors are to by one
One input transistors are constituted with one second input transistors, and the bias transistor is to brilliant by the first bias
The bias transistors of body Guan Yuyi second are constituted, and the input stage circuit also includes a current source, wherein
The current source electrically connects the source terminal of first input transistors and second input transistors, institute
The gate terminal for stating the first input transistors and second input transistors receives one first input electricity respectively
Pressure and one second input voltage, the drain electrode end of first input transistors and second input transistors
Electrically connected respectively by the first end point with second end points described in the first bias transistor AND gate
The drain electrode end of second bias transistor, the grid of the second bias transistor described in the first bias transistor AND gate
The first end point and second end points are extremely electrically connected, and second described in the first bias transistor AND gate
The source terminal of bias transistor is electrically connected second switch crystal described in the first switch transistor AND gate
The drain electrode end of pipe.
4. operational transconductance amplifier as claimed in claim 3, wherein the current mirroring circuit includes first
Transistor, second transistor, third transistor and the 4th transistor, the first transistor and described the
The drain electrode end of two-transistor electrically connects the system voltage end or earth terminal, the first transistor with it is described
The gate terminal of second transistor is electrically connected to each other, the drain electrode end electrical connection described first of the first transistor
The drain electrode end of the gate terminal of transistor and the third transistor, the drain electrode end of the second transistor is electrically connected
Connect the drain electrode end of the 4th transistor, the third transistor and the gate terminal point of the 4th transistor
The first end point and second end points are not electrically connected, and state third transistor and the 4th crystal
The source terminal of pipe is electrically connected the drain electrode of second switch transistor described in the first switch transistor AND gate
End.
5. operational transconductance amplifier as claimed in claim 4, wherein first input transistors, institute
It is P-type transistor that the second input transistors, the first transistor, which are stated, with the second transistor, described
First bias transistor, it is described second bias transistor, the third transistor, the 4th transistor,
Second switch transistor described in the first switch transistor AND gate is N-type transistor, and the first switch is brilliant
The source terminal of body pipe and the second switch transistor is electrically connected to the earth terminal, and first crystalline substance
Body pipe electrically connects the system voltage end with the source terminal of the second transistor.
6. operational transconductance amplifier as claimed in claim 4, wherein first input transistors, institute
It is N-type transistor that the second input transistors, the first transistor, which are stated, with the second transistor, described
First bias transistor, it is described second bias transistor, the third transistor, the 4th transistor,
Second switch transistor described in the first switch transistor AND gate is P-type transistor, and the first switch is brilliant
The source terminal of body pipe and the second switch transistor is electrically connected to the system voltage end, and described the
The source terminal of second transistor described in one transistor AND gate electrically connects the earth terminal.
7. operational transconductance amplifier as claimed in claim 3, wherein second input voltage is a ginseng
Examine the triangle wave voltage that voltage, and first reference voltage are the reference voltage for average voltage
The average voltage of signal.
8. operational transconductance amplifier as claimed in claim 1, wherein the input stage circuit is according to reception
One first input voltage and one second input voltage produce two and bias to the current mirroring circuit, it is and described
Current mirroring circuit produces an output signal in one end of the current mirroring circuit according to described two biass.
9. operational transconductance amplifier as claimed in claim 4, wherein the drain electrode end of the 4th transistor
Produce an output signal.
10. operational transconductance amplifier as claimed in claim 1, wherein the wide input range is applied as hair
The application of optical diode driver.
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| CN201610036854.4A CN106992755B (en) | 2016-01-20 | 2016-01-20 | Transconductance operational amplifier suitable for wide input range application |
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| CN201610036854.4A CN106992755B (en) | 2016-01-20 | 2016-01-20 | Transconductance operational amplifier suitable for wide input range application |
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| CN106992755B CN106992755B (en) | 2020-09-29 |
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|---|---|---|---|---|
| US5729178A (en) * | 1995-04-04 | 1998-03-17 | Postech Foundation | Fully differential folded cascode CMOS operational amplifier having adaptive biasing and common mode feedback circuits |
| US20050140445A1 (en) * | 2003-12-26 | 2005-06-30 | Kim Young H. | Operational transconductance amplifier with DC offset elimination and low mismatch |
| US20080136523A1 (en) * | 2006-12-08 | 2008-06-12 | Wei-Che Chiu | Gain improved operational transconductance amplifier and control method thereof |
| US7492226B2 (en) * | 2006-08-25 | 2009-02-17 | Electronics And Telecommunications Research Institute | Linearization apparatus of triode region type operational transconductance amplifier |
| CN101674072A (en) * | 2008-09-10 | 2010-03-17 | 中国科学院半导体研究所 | Interface circuit used for receiving low-voltage differential signals |
| CN102045035A (en) * | 2010-11-24 | 2011-05-04 | 东南大学 | Low-power consumption broadband high-gain high-swing rate single-level operation transconductance amplifier |
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2016
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5729178A (en) * | 1995-04-04 | 1998-03-17 | Postech Foundation | Fully differential folded cascode CMOS operational amplifier having adaptive biasing and common mode feedback circuits |
| US20050140445A1 (en) * | 2003-12-26 | 2005-06-30 | Kim Young H. | Operational transconductance amplifier with DC offset elimination and low mismatch |
| US7492226B2 (en) * | 2006-08-25 | 2009-02-17 | Electronics And Telecommunications Research Institute | Linearization apparatus of triode region type operational transconductance amplifier |
| US20080136523A1 (en) * | 2006-12-08 | 2008-06-12 | Wei-Che Chiu | Gain improved operational transconductance amplifier and control method thereof |
| CN101674072A (en) * | 2008-09-10 | 2010-03-17 | 中国科学院半导体研究所 | Interface circuit used for receiving low-voltage differential signals |
| CN102045035A (en) * | 2010-11-24 | 2011-05-04 | 东南大学 | Low-power consumption broadband high-gain high-swing rate single-level operation transconductance amplifier |
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| CN106992755B (en) | 2020-09-29 |
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