CN106934122A - A kind of method for accelerating conductor fig annexation in generation domain - Google Patents
A kind of method for accelerating conductor fig annexation in generation domain Download PDFInfo
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- CN106934122A CN106934122A CN201710103731.2A CN201710103731A CN106934122A CN 106934122 A CN106934122 A CN 106934122A CN 201710103731 A CN201710103731 A CN 201710103731A CN 106934122 A CN106934122 A CN 106934122A
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- trail
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
Abstract
A kind of method for accelerating conductor fig annexation in generation domain, including step：（1）It is determined that figure is followed the trail of in starting；（2）Follow the trail of and follow the trail of figure with layer or the figure of other direct-connected conductor layers with the starting, the figure that will be tracked is added to result queue；（3）Follow the trail of and follow the trail of the through hole layer pattern that figure is connected with the starting, the through hole layer pattern packet to tracking, the conductor layer pattern that tracking is connected with every group of via layer graphical set, the conductor layer pattern that will be tracked is added to the result queue；（4）Figure is followed the trail of using the conductor layer pattern in the result queue as starting successively, step is performed（2）And（3）；（5）The figure of all conductor layers for tracking and via layer is collected, a complete gauze is constituted.The present invention can be directed to multi-level extensive punching and connect, and reduce the number of times of search connecting conductor layer figure, reduce the number of times for checking whether figure has overlap, improve the efficiency that gauze is followed the trail of.
Description
Technical field
It is more particularly to a kind of to accelerate conductor fig in generation domain the present invention relates to Computer-aided Design Technology field
The method of annexation.
Background technology
With developing rapidly for modern signal processing technology and large scale integrated circuit technology so that ultra-large integrated electricity
The physical Design complexity more and more higher on road, the back-end physical design under the conditions of Super deep submicron process is increasingly sophisticated, it has to
Depend on EDA（Electric design automation）The auxiliary of instrument, EDA is almost related to the various aspects of design flow of integrated circuit.
, it is necessary to figure and vertical process information in domain carry out gauze figure and chase after when carrying out big domain physical verification
Track.As domain scale is increasing, figure is become increasingly complex in domain, and through hole and number of metal are more and more, and gauze is followed the trail of
The time cost for being spent is increasing.When carrying out big domain physical verification using EDA, it usually needs quick foundation in domain is led
The annexation of volume graphic, forms complete circuit trace.Gauze is followed the trail of（TraceNet）It is to be believed according to X-Y scheme in domain
The connected relation of breath and technique information automatic decision conductor, forms the technology of complete gauze figure.But the technique number of plies is increasingly
Many, various shapes and huge via-hole array have had a strong impact on the performance of gauze tracking.
It is therefore proposed that a kind of method for accelerating conductor fig annexation in generation domain, can be directed to multi-level big
Scale punching connection, reduces the number of times of search connecting conductor layer figure, reduces the number of times for checking whether figure has overlap, improves line
The efficiency followed the trail of is netted, as problem demanding prompt solution.
The content of the invention
In order to solve the deficiency of prior art presence, it is an object of the invention to provide conductor in one kind acceleration generation domain
The method of figure annexation, can be directed to multi-level extensive punching and connect, and reduce the secondary of search connecting conductor layer figure
Number, reduces the number of times for checking whether figure has overlap, improves the efficiency that gauze is followed the trail of.
To achieve the above object, the method for conductor fig annexation in the acceleration generation domain that the present invention is provided, including
Following steps：
（1）It is determined that figure is followed the trail of in starting；（2）Follow the trail of and follow the trail of figure with layer or the figure of other direct-connected conductor layers with the starting
Shape, the figure that will be tracked is added to result queue；（3）Follow the trail of and follow the trail of the through hole layer pattern that figure is connected with the starting, it is right
The through hole layer pattern packet for tracking, the conductor layer pattern that tracking is connected with every group of via layer graphical set, the conductor that will be tracked
Layer pattern is added to the result queue；（4）Figure is followed the trail of using the conductor layer pattern in the result queue as starting successively,
Perform step（2）And（3）；（5）The figure of all conductor layers for tracking and via layer is collected, a complete gauze is constituted.
Further, step（1）It is described to determine that figure is followed the trail of in starting, it is that text is set according to layout data and corresponding technique
Part, defines initial layers and point coordinates that gauze is followed the trail of, it is determined that figure is followed the trail of in starting.
Further, step（3）Described in track through hole layer pattern packet, be according to the middle-level structure of domain
Depth is grouped to through hole layer pattern.
Further, step（3）Described in follow the trail of the conductor layer pattern being connected with every group of via layer graphical set, be to use every group
The housing of via layer graphical set follows the trail of the conductor layer pattern being connected with every group of via layer graphical set respectively.
Step（3）Described in follow the trail of the conductor layer pattern being connected with every group of via layer graphical set, further include：If in the presence of
The conductor layer pattern of certain group via layer graphical set is covered, then using the conductor layer pattern generation of certain group via layer graphical set of the covering
It is tracked for described certain group group via layer graphical set.
The method of conductor fig annexation, is divided for through hole layer pattern in the acceleration generation domain that the present invention is provided
Group, the conductor layer pattern that may be connected with the housing removal search of packet；Conditionally this group of through hole layer pattern is neglected simultaneously
Slightly, the number of times to reduce search and check, accelerates the speed that gauze is followed the trail of, and generates netlist.
Other features and advantages of the present invention will be illustrated in the following description, also, the partly change from specification
Obtain it is clear that or being understood by implementing the present invention.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, and with it is of the invention
Embodiment together, for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings：
Fig. 1 is according to the rail network structure figure with through hole annexation in domain of the invention；
Fig. 2 is according to the method flow diagram for accelerating to generate conductor fig annexation in domain of the invention；
Fig. 3 is the packet schematic diagram according to via layer in domain of the invention；
Fig. 4 is according to the situation schematic diagram for ignoring via layer in domain of the invention；
Fig. 5 is to follow the trail of example flow chart according to the gauze of domain of the invention.
Specific embodiment
The preferred embodiments of the present invention are illustrated below in conjunction with accompanying drawing, it will be appreciated that preferred reality described herein
Apply example to be merely to illustrate and explain the present invention, be not intended to limit the present invention.
Fig. 1 be according in domain of the invention with through hole annexation rail network structure figure, in Fig. 1, conductor layer C1 and
C2 is connected by via layer V.
For the ease of understanding the present invention, the rule that gauze of the invention is followed the trail of is explained in detail.
The rule that gauze is followed the trail of is defined as：For two conductor layers C1 and C2 that via layer V is connected, initial tracking point is to lead
The figure C11 of body layer C1, figure that may be connected V layers with the housing removal search of C11 is every for search V layers
Individual figure, judges whether really to be connected with C11 by the logical operation of figure, obtains all the V being really connected with C11 layers of figure
Shape；Then to V layer each figure for obtaining, connected C2 layers figure is obtained using identical search technique, it is all
The one complete gauze of figure constitution for C1/V/C2 layers for tracking.
Fig. 2 is that, according to the method flow diagram for accelerating to generate conductor fig annexation in domain of the invention, will join below
Fig. 2 is examined, the method for accelerating conductor fig annexation in generation domain of the invention is described in detail.
In step 201, prepare layout data and corresponding technique sets file；
In this step, it is determined that in extensive domain each conductor layer annexation, form complete circuit meshwork list structure.
In step 202, initial layers and starting point coordinate that gauze is followed the trail of are defined, it is determined that figure is followed the trail of in starting；
In step 203, follow the trail of and follow the trail of figure with layer or the figure of other direct-connected conductor layers with starting, the figure that will be tracked adds
Enter to result queue；
In step 204, follow the trail of and follow the trail of the through hole layer pattern that figure is connected with starting, the through hole layer pattern packet to tracking is used
Every group of housing of via layer graphical set continues to follow the trail of the conductor layer pattern being connected with every group of via layer graphical set respectively, will track
Conductor layer pattern be added to result queue；
In technique definition, different conductor layer patterns are connected by punching, and through hole layer pattern is more, and the figure of via layer is pressed
Array according to hierarchy is patterned；When certain conductor layer pattern many through hole layer patterns of connection are checked, to all logical
The figure unification of aperture layer checks its conductor layer pattern for being connected.
In this step, the graphic array information according to via layer is grouped to through hole layer pattern, takes each group of via layer figure
The rectangular outer frame of shape group, the conductor layer pattern that other may be connected with this group of through hole layer pattern according to the rectangular outer frame removal search.
If a conductor layer pattern has completely included this group of rectangular outer frame of via layer graphical set, then the through hole layer pattern in the group
Annexation need not be continued checking for, is directly gone to follow the trail of what other may be connected with this group of via layer graphical set with the conductor layer pattern
Figure.
Via layer packet search can be accelerated gauze generate foundation be：In the design of extensive domain, domain has very
The hierarchical structure of many depth, high-level structure can in array fashion quote the structure of many low levels, in each through hole
In layer array, figure Relatively centralized, all figures have the probability of identical conductor layer annexation also larger.According to this battle array
Row relation pair through hole layer pattern is grouped, and per block graphics Relatively centralized, housing removal search and tracking according to every block graphics can
To accelerate the speed of gauze generation.
Further, the mode to the packet of through hole layer pattern is：First, the level depth according to through hole layer pattern in domain
Degree carries out rough packet；Then, all figures to same level depth are accurately grouped according to place layer title；Most
Afterwards, whether all figures according to same layer are grouped in being located at same array structure.
Fig. 3 is the packet schematic diagram according to via layer in domain of the invention, in Fig. 3, through hole layer pattern is divided into four groups：
Graphical set Group1, Group2, Group3 and Group4.
Further, during continuing to follow the trail of respectively with every group of housing of through hole layer pattern, if logical in the presence of certain group is covered
The conductor layer pattern of aperture layer graphical set, then be tracked using the conductor layer pattern instead of this group of via layer graphical set.By generation
For the mode followed the trail of, some via layer graphical sets can be ignored.
Specifically, in one group of through hole layer pattern is entirely located in same array structure, whole via layer figure in group is taken
When the housing of shape goes conductor layer C2 to search for, it can be determined that whether there is a conductor layer pattern to cover this group of via layer graphical set
Housing；If in conductor layer C2, there is this group of figure C21 of via layer graphical set housing of covering, then without continuing to each
Whether through hole layer pattern is individually scanned for, have very with this group of through hole layer pattern without other C2 layer patterns for judging to search
Real connection, is directly tracked by starting point of C21, you can obtaining all and this group of through hole layer pattern has true annexation
Figure.Because, must there is overlapping relation with C21 with the true figure being connected with this group of through hole layer pattern.
Fig. 4 is that, according to the situation schematic diagram for ignoring via layer in domain of the invention, in Fig. 4, via layer graphical set V's is outer
Frame is covered by the figure C21 in conductor layer C2, therefore it may only be necessary to be tracked to figure C21.
In step 205, follow the trail of figure using the conductor layer pattern in result queue as starting successively, perform step 203 and
204；
In step 206, the figure of all conductor layers for tracking and via layer is collected, constitute a complete gauze.
Fig. 5 is to follow the trail of example flow chart according to the gauze of domain of the invention.In Fig. 5, traditional tracking is listed respectively
The tracing process of process and the method for the invention, wherein, graphical set V is the through hole that through hole layer pattern V1, V2, V3 and V4 are constituted
Layer pattern group；Figure C11 follows the trail of figure for starting, and figure C12, C21, C22 and C23 are the figure for tracking.
Traditional trace flow is as follows：
C11 search → C12 → detection C12；
C11 search → V1/V2/V3/V4 → detection V1/V2/V3/V4；
V1 search → C21 → detection C21；
V2 search → C21 → detection C21；
V3 search → C21 → detection C21；
V4 search → C21/C22 → detection C22；
C21 search → C22/C23 → detection C22/C23；
Trace flow of the invention is as follows：
C11 search → C12 → detection C12；
C11 search → V1/V2/V3/V4 → detection V1/V2/V3/V4；
V search → C21/C22 → detection C21/C22；
C21 search → C22/C23 → detection C22/C23.
Can be drawn by contrast, the packet to via layer of the invention reduces search and detection in tracing process really
Number of times, reduces the time of gauze tracking, and domain is bigger, and the array of via layer is more, and the effect of acceleration is more obvious.
One of ordinary skill in the art will appreciate that：The foregoing is only the preferred embodiments of the present invention, and without
In the limitation present invention, although being described in detail to the present invention with reference to the foregoing embodiments, for those skilled in the art
For, it can still be modified to the technical scheme that foregoing embodiments are recorded, or which part technical characteristic is entered
Row equivalent.All any modification, equivalent substitution and improvements within the spirit and principles in the present invention, made etc., all should include
Within protection scope of the present invention.
Claims (5)
1. a kind of method that acceleration generates conductor fig annexation in domain, it is characterised in that comprise the following steps：
（1）It is determined that figure is followed the trail of in starting；
（2）Follow the trail of and follow the trail of figure with layer or the figure of other direct-connected conductor layers with the starting, the figure that will be tracked is added
To result queue；
（3）Follow the trail of and follow the trail of the through hole layer pattern that is connected of figure with the starting, the through hole layer pattern packet to tracking, follow the trail of and
The connected conductor layer pattern of every group of via layer graphical set, the conductor layer pattern that will be tracked is added to the result queue；
（4）Figure is followed the trail of using the conductor layer pattern in the result queue as starting successively, step is performed（2）And（3）；
（5）The figure of all conductor layers for tracking and via layer is collected, a complete gauze is constituted.
2. the method for accelerating conductor fig annexation in generation domain according to claim 1, it is characterised in that step
（1）It is described to determine that figure is followed the trail of in starting, it is that file is set according to layout data and corresponding technique, define the starting that gauze is followed the trail of
Layer and point coordinates, it is determined that figure is followed the trail of in starting.
3. the method for accelerating conductor fig annexation in generation domain according to claim 1, it is characterised in that step
（3）Described in track through hole layer pattern packet, be that through hole layer pattern is carried out according to the depth of domain middle-level structure
Packet.
4. the method for accelerating conductor fig annexation in generation domain according to claim 1, it is characterised in that step
（3）Described in follow the trail of the conductor layer pattern being connected with every group of via layer graphical set, be with every group of housing of via layer graphical set point
The conductor layer pattern being connected with every group of via layer graphical set is not followed the trail of.
5. the method for accelerating conductor fig annexation in generation domain according to claim 1, it is characterised in that step
（3）Described in follow the trail of the conductor layer pattern being connected with every group of via layer graphical set, further include：If organizing through hole in the presence of certain is covered
The conductor layer pattern of layer pattern group, then using described certain group group of conductor layer pattern replacement of certain group via layer graphical set of the covering
Via layer graphical set is tracked.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
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| CN2016112519494 | 2016-12-30 | ||
| CN201611251949 | 2016-12-30 |
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| CN106934122A true CN106934122A (en) | 2017-07-07 |
| CN106934122B CN106934122B (en) | 2020-01-14 |
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| CN201710103731.2A Active CN106934122B (en) | 2016-12-30 | 2017-02-24 | Method for accelerating generation of conductor graph connection relation in layout |
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Cited By (2)
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| CN111553124A (en) * | 2020-05-12 | 2020-08-18 | 北京华大九天软件有限公司 | Rapid tracking method for graphic connected region |
| WO2022083052A1 (en) * | 2020-10-20 | 2022-04-28 | 芯和半导体科技(上海)有限公司 | General eda model layout physical connection relationship reconstruction method |
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Cited By (3)
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