CN106910800A - LED epitaxial growth methods - Google Patents
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- 230000012010 growth Effects 0.000 title claims abstract description 49
- 238000000034 method Methods 0.000 title claims abstract description 33
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052738 indium Inorganic materials 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 230000003247 decreasing effect Effects 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 230000008859 change Effects 0.000 abstract description 6
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 51
- 229910002601 GaN Inorganic materials 0.000 description 50
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 7
- 229910052733 gallium Inorganic materials 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 230000003698 anagen phase Effects 0.000 description 1
- 230000004087 circulation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000746 purification Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000026267 regulation of growth Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000031068 symbiosis, encompassing mutualism through parasitism Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/305—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table characterised by the doping materials
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Composite Materials (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Led Devices (AREA)
Abstract
The present invention provides a kind of LED epitaxial growth methods.LED epitaxial growth methods of the present invention, including：Growth substrates, cushion, the GaN layer of undoped, the GaN layer of n-type doping successively from the bottom up；There is gradual change in the energy level of the grown quantum trap luminescent layer on the GaN layer of n-type doping, wherein mqw light emitting layer, mqw light emitting layer includes the In that InGaN layer, indium component are successively decreased successively from the bottom upxGa1XN layers, the first GaN layer, the second GaN layer；Growing P-type adulterates successively from the bottom up on mqw light emitting layer GaN layer, p-type metal contact layer.The present invention not only reduces dislocation influence to one layer of low-temperature protection film of energy level gradual change and setting of mqw light emitting layer, improves the luminous efficiency of quantum luminescent layer, also improves the electric property of LED chip.
Description
Technical field
The present invention relates to semiconductor device art, more particularly to a kind of light emitting diode (Light Emitting Diode,
LED) epitaxial growth method.
Background technology
Mqw light emitting layer determines some photoelectric parameters and LED of LED as the key technology layer of LED
Final brightness.
In traditional LED epitaxial growth methods, as shown in figure 1, the structure of wherein mqw light emitting layer is indium gallium nitride
(InGaN) as well layer, gallium nitride (GaN) as barrier layer, wherein, at 750-780 DEG C of growth temperature, the thickness of InGaN layer
It is 3-4nm, at 850-880 DEG C of growth temperature, the thickness of GaN layer is 5-9nm, and growth phase keeps constant temperature.However, this
Method can produce a large amount of dislocations when well layer is produced, and influence the luminous efficiency of LED.Generally reduced using the thickness of increase barrier layer
The influence of dislocation, but still can cause that the luminous efficiency of LED is reduced.
The content of the invention
The present invention provides a kind of LED epitaxial growth methods, to overcome in existing LED epitaxial growth methods due to using increasing
The thickness of big barrier layer reduces the influence of dislocation, the problem that can still bring the luminous efficiency of LED to reduce.
The present invention provides a kind of LED epitaxial growth methods, including：Growth substrates, cushion, undoped successively from the bottom up
GaN layer, the GaN layer of n-type doping；
The grown quantum trap luminescent layer on the GaN layer of the n-type doping, wherein the energy level hair of the mqw light emitting layer
Raw gradual change, the mqw light emitting layer includes the In that InGaN layer, indium component are successively decreased successively from the bottom upxGa1-xN layers, a GaN
Layer, the second GaN layer；
Wherein, first GaN layer is formed in cross growth mode at the first temperature, and second GaN layer is
Formed in cross growth mode at the second temperature, first temperature is less than the second temperature, first GaN layer
Thickness of the thickness less than the second GaN layer；
Growing P-type adulterates successively from the bottom up on the mqw light emitting layer GaN layer, p-type metal contact layer.
Alternatively, at being 760-790 DEG C in production temperature, the thickness of the InGaN layer is 3nm-5nm.
Alternatively, at being 760-790 DEG C in production temperature, the In that the indium component is successively decreasedxGa1-xN layers of thickness is 1nm-
4nm, wherein 0.05<x<0.2.
Alternatively, at being 780-820 DEG C in production temperature, the thickness of first GaN layer is 1nm-4nm.
Alternatively, at being 800-880 DEG C in production temperature, the thickness of second GaN layer is 4nm-10nm.
Alternatively, the In that the InGaN layer, the indium component are successively decreasedxGa1-xN layers, first GaN layer, described second
GaN layer is one group, and the alternating growth cycle is 7-15 groups.
The LED epitaxial growth methods that the present invention is provided, by growing indium component in the InGaN layer in mqw light emitting layer
The In for successively decreasingxGa1-xN layers, the first GaN layer, not only act as the gradation of energy level, and cause the dislocation shadow that lattice error causes
Ringing substantially reduces, and is also intercepted dislocation completely with one layer of protective film, effectively increases the luminous efficiency of mqw light emitting layer, carries
The electric property of LED chip is risen.
Brief description of the drawings
Fig. 1 is the structural representation of existing LED epitaxial growth methods；
The structural representation of the LED epitaxial growth methods that Fig. 2 is provided for the present invention；
The flow chart of the LED epitaxial growth methods that Fig. 3 is provided for the present invention；
The energy level schematic diagram of the mqw light emitting layer of the LED epitaxial growth methods that Fig. 4 is provided for the present invention；
The growth temperature of the mqw light emitting layer of the LED epitaxial growth methods that Fig. 5 is provided for the present invention and thickness schematic diagram.
Specific embodiment
The structural representation of the LED epitaxial growth methods that Fig. 2 is provided for the present invention, the LED extensions that Fig. 3 is provided for the present invention
The flow chart of growing method, the energy level schematic diagram of the mqw light emitting layer of the LED epitaxial growth methods that Fig. 4 is provided for the present invention,
As shown in figure 3, the LED epitaxial growth methods of the present embodiment include：
Step 101, from the bottom up growth substrates, cushion, the GaN layer of undoped, the GaN layer of n-type doping successively.
The energy level hair of step 102, the grown quantum trap luminescent layer on the GaN layer of n-type doping, wherein mqw light emitting layer
Raw gradual change, mqw light emitting layer includes the In that InGaN layer, indium component are successively decreased successively from the bottom upxGa1-xN layers, the first GaN layer,
Second GaN layer；
Wherein, the first GaN layer is formed in cross growth mode at the first temperature, and the second GaN layer is in the second temperature
Formed in cross growth mode under degree, the first temperature is less than second temperature, and the thickness of the first GaN layer is less than the second GaN layer
Thickness.
Step 103, the GaN layer of growing P-type doping, the contact of p-type metal successively from the bottom up on mqw light emitting layer
Layer.
Specifically, as depicted in figs. 1 and 2, substrate in a step 101, cushion, the GaN layer of undoped, n-type doping
GaN layer, and p-type doping in step 103 GaN layer, the method phase that is used with prior art of p-type metal contact layer
Together, here is omitted.
In a step 102, the mqw light emitting layer in this implementation includes the In that InGaN layer, indium component are successively decreasedxGa1-xN layers,
First GaN layer, the second GaN layer.It will be understood by those skilled in the art that due to the change of gallium component and indium component so that quantum
The energy level of trap luminescent layer changes.Usually, gallium component molar than rising, the energy level liter of mqw light emitting layer can be caused
It is high；Indium component molar than rising, can cause the energy level of mqw light emitting layer reduces.The energy of mqw light emitting layer in the present embodiment
Level schematic diagram, as shown in figure 4, wherein, abscissa is each layer in mqw light emitting layer, and ordinate is the energy level of each layer.
Specifically, InGaN layer is grown in the GaN layer of n-type doping, it can be seen that the mol ratio of indium component increases, gallium component
Mol ratio reduction so that the energy level of mqw light emitting layer declines, and energy level shape changes.
Secondly, the In that indium component is successively decreasedxGa1-xThe mol ratio of indium component is reduced to 0.05, and then gallium component from 0.2 in N layers
Mol ratio be increased to 0.95 from 0.8, because the mol ratio of indium component is gradually reduced, the mol ratio of gallium component gradually rises, and makes
The energy level for obtaining mqw light emitting layer gradually rises.
Finally, the In for successively decreasing in indium componentxGa1-xThe N layers of GaN layer of growth regulation one and the second GaN layer, it can be seen that indium component
Mol ratio drops to 0, and the mol ratio of gallium component is raised so that the energy level of mqw light emitting layer is raised.
So, In in mqw light emitting layer in the present embodimentxGa1-xN layers is successively decreased due to indium component so that energy level shape is sent out
Change is sent, increases the superposition region of electronics and hole, so as to improve the luminous efficiency of LED.
Further, due to there is gap between lattice, lattice is mismatched and will result in dislocation, and dislocation can be produced to intrinsic voltage
Raw influence, and then the illumination effect of mqw light emitting layer can be influenceed.Therefore, in the present embodiment setting mqw light emitting layer
InxGa1-xN layers of indium component is slowly successively decreased, and just can gradually reduce the influence that lattice gap causes dislocation, then with one layer
First GaN layer protective film blocks dislocation completely.
Specifically, because the first GaN layer is formed in cross growth mode at the first temperature, the second GaN layer be
Formed in cross growth mode under second temperature, the first temperature is less than second temperature, also enables that the first GaN layer is more preferable
The In that attachment indium component is successively decreasedxGa1-xOn N layers, one layer of protective film of low temperature is formed, prevent indium component from meeting high temperature and evaporating, had
Effect ground reduces the dislocation density influence that InGaN layer is produced, and improves the luminous efficiency of mqw light emitting layer.
The LED epitaxial growth methods that the present embodiment is provided, by growing indium group in the InGaN layer in mqw light emitting layer
Divide the In for successively decreasingxGa1-xN layers, the first GaN layer, not only act as the gradation of energy level, and cause the dislocation that lattice error causes
Influence is substantially reduced, and is also intercepted dislocation completely with one layer of protective film, effectively increases the luminous efficiency of mqw light emitting layer,
Improve the electric property of LED chip.
On the basis of above-described embodiment, 102 the step of to the present embodiment LED epitaxial growth methods in mqw light emitting layer
Including the design parameter of each layer be described in detail.
Alternatively, at being 760-790 DEG C in production temperature, the thickness of InGaN layer is 3nm-5nm.
Alternatively, at being 760-790 DEG C in production temperature, the In that indium component is successively decreasedxGa1-xN layers of thickness is 1nm-4nm,
Wherein 0.05<x<0.2.
Alternatively, at being 780-820 DEG C in production temperature, the thickness of the first GaN layer is 1nm-4nm.
Alternatively, at being 800-880 DEG C in production temperature, the thickness of the second GaN layer is 4nm-10nm.
Alternatively, the In that InGaN layer, indium component are successively decreasedxGa1-xN layers, the first GaN layer, the second GaN layer be one group, alternately
Growth cycle is 7-15 groups.
Herein it should be noted which layer, the growth step of this layer no matter grown in the present embodiment LED epitaxial growth methods
Duan Jiewei constant temperature grows.
The growth temperature of the mqw light emitting layer of the LED epitaxial growth methods that Fig. 5 is provided for the present invention and thickness schematic diagram,
Wherein, abscissa is the growth thickness of each layer, and ordinate is the growth temperature of each layer.In a specific embodiment, such as Fig. 5
Shown, the epitaxial growth method to the present embodiment LED is described in detail, and the specific steps of the method include：
1st, sapphire (Patterned Sapphire Substrate, PSS) substrate is put into reative cell, N2：H2：NH3
Flow proportional be (0:120:0) liter/min (Standard Liter per Minute, SLM), chamber pressure is 500 supports
(Torr) temperature, is increased to 1080 DEG C, is stablized 200 seconds, high temperature purification is carried out to substrate.
2nd, temperature to 540 DEG C, N is reduced2：H2：NH3Flow proportional be (75:150:56) SLM, chamber pressure control exists
500Torr, grows the low temperature GaN buffer of 20nm thickness.
3rd, temperature is increased to 1080 DEG C, N2：H2：NH3Flow proportional be (75:150:56) SLM, chamber pressure control
System grows high temperature undoped GaN layer (U-GaN) of 800nm thickness in 200Torr.
4th, 1050 DEG C, N are kept the temperature at2：H2：NH3Flow proportional be (64:120:50) SLM, chamber pressure control
System grows the N-type GaN layer (N-GaN) of 1000nm thickness in 200Torr.
5th, by temperature control in 760 DEG C, N2：H2：NH3Flow proportional be (72:0:40) SLM, chamber pressure control exists
350Torr, grown quantum trap IN0.2GA0.8N, thickness is 3nm, while each source flux is stablized, temperature is lifted, by 760 DEG C
Lifted to 780 DEG C, grow the In of In content gradually variationalsXGa1-XN, and 0.05<x<0.2, the mol ratio of indium component is reduced to from 0.2
0.05, the mol ratio of gallium component is increased to 0.095 from 0.8, and by temperature stabilization at 780 DEG C, reaction chamber pressure is reduced to
100torr, growth a layer thickness is first GaN layer of 2nm, is lifted to 860 DEG C by temperature, and other conditions keep constant, raw
Thickness long is second GaN layer of 5nm.
6th, step 5 is repeated 12 times, i.e. mqw light emitting layer symbiosis 12 circulations long.
7th, temperature is increased to 950 DEG C, N2：H2：NH3Flow proportional be (64:120:50) SLM, chamber pressure control
In the GaN layer (P-GaN) that 200Torr, growth thickness adulterate for the p-type of 500nm.
8th, temperature is increased to 740 DEG C, N2：H2：NH3Flow proportional be (64:120:50) SLM, chamber pressure control
In 200Torr, growth thickness is the p-type metal contact layer of 15nm.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
Pipe has been described in detail with reference to foregoing embodiments to the present invention, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, or which part or all technical characteristic are entered
Row equivalent；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (6)
1. a kind of LED epitaxial growth methods, it is characterised in that including：
Growth substrates, cushion, the GaN layer of undoped, the GaN layer of n-type doping successively from the bottom up；
The grown quantum trap luminescent layer on the GaN layer of the n-type doping, wherein the energy level of the mqw light emitting layer occurs gradually
Become, the mqw light emitting layer includes the In that InGaN layer, indium component are successively decreased successively from the bottom upxGa1-xN layers, the first GaN layer,
Second GaN layer；
Wherein, first GaN layer is formed in cross growth mode at the first temperature, and second GaN layer is
Formed in cross growth mode at a temperature of two, first temperature is less than the second temperature, the thickness of first GaN layer
Less than the thickness of the second GaN layer；
Growing P-type adulterates successively from the bottom up on the mqw light emitting layer GaN layer, p-type metal contact layer.
2. method according to claim 1, it is characterised in that at being 760-790 DEG C in production temperature, the InGaN layer
Thickness be 3nm-5nm.
3. method according to claim 1, it is characterised in that at being 760-790 DEG C in production temperature, the indium component is passed
The In for subtractingxGa1-xN layers of thickness is 1nm-4nm, wherein 0.05<x<0.2.
4. method according to claim 1, it is characterised in that at being 780-820 DEG C in production temperature, a GaN
The thickness of layer is 1nm-4nm.
5. method according to claim 1, it is characterised in that at being 800-880 DEG C in production temperature, the 2nd GaN
The thickness of layer is 4nm-10nm.
6. method according to claim 1, it is characterised in that the In that the InGaN layer, the indium component are successively decreasedxGa1-xN
Layer, first GaN layer, second GaN layer are one group, and the alternating growth cycle is 7-15 groups.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111081833A (en) * | 2020-01-21 | 2020-04-28 | 福建兆元光电有限公司 | Semiconductor light emitting diode |
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| CN102738333A (en) * | 2012-04-16 | 2012-10-17 | 江苏汉莱科技有限公司 | Green light emitting diode and manufacturing method thereof |
| CN104103724A (en) * | 2014-08-04 | 2014-10-15 | 湘能华磊光电股份有限公司 | LED (Light-Emitting Diode) epitaxial wafer of gradient quantum well, growing method and LED structure |
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2017
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| US20080087905A1 (en) * | 2000-01-14 | 2008-04-17 | Sharp Kabushiki Kaisha | Nitride Compound Semiconductor Light Emitting Device and Method for Producing the Same |
| CN101980383A (en) * | 2010-09-27 | 2011-02-23 | 湘能华磊光电股份有限公司 | Gallium nitride based Group III-V compound semiconductor LED epitaxial slice and method for growing same |
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| CN111081833A (en) * | 2020-01-21 | 2020-04-28 | 福建兆元光电有限公司 | Semiconductor light emitting diode |
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Application publication date: 20170630 |