CN106875909B - Driving circuit and liquid crystal display device - Google Patents

Driving circuit and liquid crystal display device Download PDF

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Publication number
CN106875909B
CN106875909B CN201710178800.6A CN201710178800A CN106875909B CN 106875909 B CN106875909 B CN 106875909B CN 201710178800 A CN201710178800 A CN 201710178800A CN 106875909 B CN106875909 B CN 106875909B
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China
Prior art keywords
voltage
source drive
digital signal
drive chip
data voltage
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CN201710178800.6A
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CN106875909A (en
Inventor
陈宥烨
何振伟
吴宇
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TCL Huaxing Photoelectric Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • G09G3/3688Details of drivers for data electrodes suitable for active matrices only

Abstract

A kind of driving circuit of present invention offer and liquid crystal display device, the driving circuit include:Timing controller, for providing control signal to programmable Gamma correction buffer chip and providing digital signal to source drive chip;The programmable Gamma correction buffer chip, for according to the control signal, when the timing controller exports the digital signal of 3n rows pixel and 3n+1 row pixels, the first reference voltage to be exported to the source drive chip;And when the timing controller exports the digital signal of 3n+2 row pixels, the second reference voltage is exported to the source drive chip;The source drive chip generates data voltage for receiving the first reference voltage and the second reference voltage and digital signal, and according to first reference voltage, second reference voltage and the digital signal.The driving circuit and liquid crystal display device of the present invention, can improve display effect.

Description

Driving circuit and liquid crystal display device
【Technical field】
The present invention relates to display technology fields, more particularly to a kind of driving circuit and liquid crystal display device.
【Background technology】
With the continuous development of display, the display pattern of display is more and more.Such as the display of existing display Pattern includes two and three dimensions display pattern, namely can be realized simultaneously two dimension display and Three-dimensional Display.But existing display Device has that charging and discharging capabilities are insufficient and driving chip temperature is excessively high, to constrain the further hair of display Exhibition.
At present by changing the pixel arrangement structure of display and the type of drive of pixel to solve asking for the prior art Topic.But the pixel of grid line parasitic capacitance (Cst on gate) is designed.As shown in Figure 1, Fig. 1 provides a pixel unit (RGB) dot structure of grid line parasitic capacitance, Gn to Gn+2 indicate line n to the scan line of the n-th+2 row, and Dn indicates nth bar Data line, wherein Cst are storage capacitance, and Cgs is the equivalent capacity between the grid and source electrode of thin film transistor (TFT), and Clc is liquid crystal Capacitance, Com are public electrode.
Fig. 2 provides the structural schematic diagram of existing display.As shown in Fig. 2, existing display includes:Multiple pixel lists Member 10.Each pixel unit 10 includes one first adjacent successively pixel 11, one second pixel 12, a third pixel 13, namely First pixel 11, the second pixel 12, third pixel 13 are adjacent in vertical direction;Such as first pixel 11 be blue pixel, second Pixel 12 is green pixel, and third pixel 13 is red pixel.Namely the pixel of display vertically put in order for Blue pixel, green pixel, red pixel.
As shown in figure 3, Line1 to Line12 indicates the scan line of the 1st to 12 row pixel respectively.In two dimensional mode Under, successively to the 2nd row, the 1st row, the 3rd row, the 5th row, the 4th row, the 6th row, eighth row, the 7th row, the 9th row, the 11st row, the 10th row, The corresponding scan line of 12nd row pixel inputs scanning signal;Also scanning sequency that will be from top to bottom becomes interlacing sequence.
In conjunction with Fig. 4, it is usually located at one height (H) one low (L) of current potential of the pixel of two neighboring same color in same row, because This can effectively avoid current potential HLHLHL sequences and switch by way of misplacing and scanning, and form HHHLLL and (exclude first L switching) to reduce charge and discharge electric frequency, namely improves charging ability.Secondly, when charge and discharge electric frequency reduces, can also make Obtaining the temperature of driving chip reduces.And since human eye is relatively low to the susceptibility of blue, therefore only by blue as high potential and low electricity The switching point of position, it is ensured that the uniformity of color.
When enabling above-mentioned scan mode, Gn+1 is closed prior to Gn, when Gn is closed, due to the capacitance shown in dotted line frame The coupling of Cst drags down the pixel voltage of Gn+1, this phenomenon appears in the 2nd, 5,8 etc. rows.And due to generating positive and negative voltage all by It drags down, the common voltage of the pixel of these rows is caused to move down, it is possible that the problem of flicker or display unevenness.
Therefore, it is necessary to a kind of driving circuit and liquid crystal display device be provided, to solve the problems of prior art.
【Invention content】
The purpose of the present invention is to provide a kind of driving circuit and liquid crystal display devices, can improve display effect.
In order to solve the above technical problems, the present invention provides a kind of driving circuit comprising:
Timing controller, for providing control signal to programmable Gamma correction buffer chip and being carried to source drive chip For digital signal;
The programmable Gamma correction buffer chip is used under the control of said control signal, when the timing control When the digital signal of chip output 3n rows pixel and 3n+1 row pixels, to source drive chip output first with reference to electricity Pressure;And when the timing controller exports the digital signal of 3n+2 row pixels, to source drive chip output the Two reference voltages;
The source drive chip, for receiving first reference voltage and second reference voltage and the number Signal, and data voltage is generated according to first reference voltage, second reference voltage and the digital signal.
In the driving circuit of the present invention, the data voltage includes the first data voltage and the second data voltage, described Source drive chip, be additionally operable to according to first reference voltage and the digital signal generate the first data voltage and according to Second reference voltage and the digital signal generate the second data voltage.
In the driving circuit of the present invention, first data voltage is equal to preset data voltage, the second data electricity Difference between pressure and the preset data voltage is equal to preset value.
In the driving circuit of the present invention, the difference DELTA V between second data voltage and the preset data voltage As follows:
Wherein Vgh is the cut-in voltage of thin film transistor (TFT), and Vgl is the closing voltage of thin film transistor (TFT), and Cst is storage electricity Hold, Cgs is the equivalent capacity between the grid and source electrode of thin film transistor (TFT), and Clc is liquid crystal capacitance.
The present invention driving circuit in, the timing controller respectively with the programmable Gamma correction buffer chip And the source drive chip is electrically connected, the programmable Gamma correction buffer chip electrically connects with the source drive chip It connects.
In the driving circuit of the present invention, the timing controller includes control terminal and the first output end, the control End is for exporting the control signal, and first output end is for exporting the digital signal;
The programmable Gamma correction buffer chip includes first input end, second output terminal and third output end, institute First input end is stated for inputting the control signal;The second output terminal is for exporting first reference voltage;It is described Third output end is for exporting second reference voltage;
The source drive chip includes the second input terminal, third input terminal and the 4th input terminal;Second input terminal For inputting the digital signal;The third input terminal is for inputting first reference voltage;4th input terminal is used In output second reference voltage;
The control terminal is connect with the first input end, and first output end is connect with second input terminal, institute It states second output terminal to connect with the third input terminal, the third output end is connect with the 4th input terminal.
The present invention also provides a kind of liquid crystal display devices comprising:Liquid crystal display panel and driving circuit, the driving electricity Road includes:
Timing controller, for providing control signal to programmable Gamma correction buffer chip and being carried to source drive chip For digital signal;
The programmable Gamma correction buffer chip is used under the control of said control signal, when the timing control When the digital signal of chip output 3n rows pixel and 3n+1 row pixels, to source drive chip output first with reference to electricity Pressure;And when the timing controller exports the digital signal of 3n+2 row pixels, to source drive chip output the Two reference voltages;
The source drive chip, for receiving first reference voltage and second reference voltage and the number Signal, and data voltage is generated according to first reference voltage, second reference voltage and the digital signal.
In the liquid crystal display device of the present invention, the data voltage includes the first data voltage and the second data voltage, The source drive chip, be additionally operable to according to first reference voltage and the digital signal generate the first data voltage and The second data voltage is generated according to second reference voltage and the digital signal.
In the liquid crystal display device of the present invention, first data voltage is equal to preset data voltage, second number It is equal to preset value according to the difference between voltage and the preset data voltage.
In the liquid crystal display device of the present invention, the timing controller is buffered with the programmable Gamma correction respectively Chip and the source drive chip are electrically connected, and the programmable Gamma correction buffer chip and the source drive chip are electrical Connection.
The driving circuit and liquid crystal display device of the present invention, due to by being carried out to the data voltage for being pulled low capable pixel Compensation remains constant to the pixel voltage of all pixels during driving, prevents flicker or shows uneven problem, Improve display effect.
【Description of the drawings】
Fig. 1 is the structural schematic diagram of the pixel of existing grid line parasitic capacitance mode;
Fig. 2 is the structural schematic diagram of existing display;
Fig. 3 is the drive waveforms schematic diagram of existing display;
Fig. 4 is the potential change schematic diagram of existing display;
Fig. 5 is the structural schematic diagram of the driving circuit of the present invention.
【Specific implementation mode】
The explanation of following embodiment is to refer to additional schema, to illustrate the particular implementation that the present invention can be used to implement Example.The direction term that the present invention is previously mentioned, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outside", " side " Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be illustrate and understand the present invention, rather than to The limitation present invention.The similar unit of structure is to be given the same reference numerals in the figure.
Fig. 5 is please referred to, Fig. 5 is the structural schematic diagram of the driving circuit of the present invention.
As shown in figure 5, the driving circuit of the present invention includes:Timing controller 21, programmable Gamma correction buffer chip 22 and source drive chip 23;The timing controller 21 respectively with the programmable Gamma correction buffer chip 22 and institute The electric connection of source drive chip 23 is stated, the programmable Gamma correction buffer chip 22 electrically connects with the source drive chip 23 It connects.
The timing controller 21 includes control terminal 211 and the first output end 212, and the control terminal 211 is for exporting The control signal, the control signal is for switching the first reference voltage and the second reference voltage, first output end 212 For exporting the digital signal.
The programmable Gamma correction buffer chip 22 includes that first input end 221, second output terminal 222 and third are defeated Outlet 223, the first input end 221 is for inputting the control signal;The second output terminal 222 is for exporting described the One reference voltage Va;The third output end 223 is for exporting the second reference voltage Vb.
The source drive chip 23 includes the second input terminal 233, third input terminal 231 and the 4th input terminal 232;It is described Second input terminal 233 is for inputting the digital signal;The third input terminal 231 is for inputting first reference voltage Va;4th input terminal 232 is for exporting the second reference voltage Vb.
The control terminal 211 is connect with the first input end 221, and first output end 212 is inputted with described second 233 connection of end, the second output terminal 222 connect with the third input terminal 231, the third output end 223 and described the Four input terminals 232 connect.
Timing controller 21 is used to provide control signal to programmable Gamma correction buffer chip 22 and drives core to source Piece 23 provides digital signal.
The programmable Gamma correction buffer chip 22 is used for according to the control signal, in the timing controller 21 When exporting the digital signal of 3n rows pixel and 3n+1 row pixels, the first reference voltage is exported to the source drive chip 23 Va;And according to the control signal, when the timing controller 21 exports the digital signal of 3n+2 row pixels, to institute It states source drive chip 23 and exports the second reference voltage Vb.
The source drive chip 23 is used to receive the first reference voltage Va and the second reference voltage Vb and digital signal, and Data voltage is generated according to the first reference voltage Va, the second reference voltage Va and the digital signal.
The data voltage includes the first data voltage V1 and the second data voltage V2, and the source drive chip 23 is used for root The first data voltage V1 is generated according to the first reference voltage Va and the digital signal and according to described second with reference to electricity Vb and the digital signal is pressed to generate the second data voltage V2.
The first data voltage V1 is equal to preset data voltage V0, the second data voltage V2 and the preset data Difference between voltage V0 is equal to preset value.
Specifically, the difference DELTA V between the second data voltage V2 and the preset data voltage V0 is shown below:
Wherein Vgh is the cut-in voltage of thin film transistor (TFT), and Vgl is the closing voltage of thin film transistor (TFT), and Cst is storage electricity Hold, Cgs is the equivalent capacity between the grid and source electrode of thin film transistor (TFT), and Clc is liquid crystal capacitance.
Since programmable Gamma correction buffer chip 22 stores two groups of reference voltages.When timing controller 21 exports 3n And 3n+1 row pixels data when, control and may be programmed Gamma correction buffer chip 22 and export the first reference voltage;And work as sequential control When coremaking piece 21 exports the data of 3n+2 row pixels, controls and may be programmed 22 output second of Gamma correction buffer chip with reference to electricity Pressure.Therefore when Gn is closed, although the coupling of capacitance Cst drags down the pixel voltage of Gn+1 row pixels, due to the second ginseng Examine the compensating action of voltage so that the pixel voltage after dragging down is equal to setting value, namely keeps constant, and all switchings exist It is completed in the time of H-blank.
The driving circuit of the present invention, due to by being compensated to the data voltage for being pulled low capable pixel, to all The pixel voltage of pixel remains constant during driving, prevents the problem of flicker or display unevenness, improves display effect Fruit.
The present invention also provides a kind of liquid crystal display devices comprising liquid crystal display panel and driving circuit, as shown in figure 5, The present invention driving circuit include:Timing controller 21, programmable Gamma correction buffer chip 22 and source drive chip 23; The timing controller 21 is electrical with the programmable Gamma correction buffer chip 22 and the source drive chip 23 respectively Connection, the programmable Gamma correction buffer chip 22 are electrically connected with the source drive chip 23.
The timing controller 21 includes control terminal 211 and the first output end 212, and the control terminal 211 is for exporting The control signal, first output end 212 is for exporting the digital signal.
The programmable Gamma correction buffer chip 22 includes that first input end 221, second output terminal 222 and third are defeated Outlet 223, the first input end 221 is for inputting the control signal;The second output terminal 222 is for exporting described the One reference voltage Va;The third output end 223 is for exporting the second reference voltage Vb.
The source drive chip 23 includes the second input terminal 233, third input terminal 231 and the 4th input terminal 232;It is described Second input terminal 233 is for inputting the digital signal;The third input terminal 231 is for inputting first reference voltage Va;4th input terminal 232 is for exporting the second reference voltage Vb.
The control terminal 211 is connect with the first input end 221, and first output end 212 is inputted with described second 233 connection of end, the second output terminal 222 connect with the third input terminal 231, the third output end 223 and described the Four input terminals 232 connect.
Timing controller 21 is used to provide control signal to programmable Gamma correction buffer chip 22 and drives core to source Piece 23 provides digital signal.
The programmable Gamma correction buffer chip 22 is used for according to the control signal, in the timing controller 21 When exporting the digital signal of 3n rows pixel and 3n+1 row pixels, the first reference voltage is exported to the source drive chip 23 Va;And according to the control signal, when the timing controller 21 exports the digital signal of 3n+2 row pixels, to institute It states source drive chip 23 and exports the second reference voltage Vb.
The source drive chip 23 is used to receive the first reference voltage Va and the second reference voltage Vb and digital signal, and Data voltage is generated according to the first reference voltage Va, the second reference voltage Va and the digital signal.
The source drive chip 23 is used to generate the first number according to the first reference voltage Va and the digital signal The second data voltage V2 is generated according to voltage V1 and according to the second reference voltage Vb and the digital signal.
The first data voltage V1 is equal to preset data voltage V0, the second data voltage V2 and the preset data Difference between voltage V0 is equal to preset value.
Specifically, the difference DELTA V between the second data voltage V2 and the preset data voltage V0 is shown below:
Wherein Vgh is the cut-in voltage of thin film transistor (TFT), and Vgl is the closing voltage of thin film transistor (TFT), and Cst is storage electricity Hold, Cgs is the equivalent capacity between the grid and source electrode of thin film transistor (TFT), and Clc is liquid crystal capacitance.
Since programmable Gamma correction buffer chip 22 stores two groups of reference voltages.When timing controller 21 exports 3n And 3n+1 row pixels data when, control and may be programmed Gamma correction buffer chip 22 and export the first reference voltage;And work as sequential control When coremaking piece 21 exports the data of 3n+2 row pixels, controls and may be programmed 22 output second of Gamma correction buffer chip with reference to electricity Pressure.Therefore when Gn is closed, although the coupling of capacitance Cst drags down the pixel voltage of Gn+1 row pixels, due to the second ginseng Examine the compensating action of voltage so that the pixel voltage after dragging down is equal to setting value, namely keeps constant, and all switchings exist It is completed in the time of H-blank.
The liquid crystal display device of the present invention, due to by being compensated to the data voltage for being pulled low capable pixel, to The pixel voltage of all pixels remains constant during driving, prevents the problem of flicker or display unevenness, improves aobvious Show effect.
In conclusion although the present invention is disclosed above with preferred embodiment, above preferred embodiment is not to limit The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention Decorations, therefore protection scope of the present invention is subject to the range that claim defines.

Claims (6)

1. a kind of driving circuit is used for liquid crystal display panel, the liquid crystal display panel includes several pixel units, each Pixel unit includes thin film transistor (TFT), and the thin film transistor (TFT) connection data line and scan line and source drive chip pass through number Thin film transistor (TFT) of the data voltage to the pixel unit is provided according to line, which is characterized in that the driving circuit includes:
Timing controller, for providing control signal to programmable Gamma correction buffer chip and providing number to source drive chip Word signal;
The programmable Gamma correction buffer chip is used under the control of said control signal, when the timing controller When exporting the digital signal of 3n rows pixel and 3n+1 row pixels, the first reference voltage is exported to the source drive chip;With And when the timing controller exports the digital signal of 3n+2 row pixels, to the second reference of source drive chip output Voltage;
The source drive chip, for receiving first reference voltage and second reference voltage and the number letter Number, and data voltage, the number are generated according to first reference voltage, second reference voltage and the digital signal Include the first data voltage and the second data voltage according to voltage, the source drive chip is additionally operable to according to described first with reference to electricity Pressure and the digital signal generate the first data voltage and are given birth to according to second reference voltage and the digital signal At the second data voltage, first data voltage is equal to preset data voltage, second data voltage and the present count It is equal to preset value according to the difference between voltage.
2. driving circuit according to claim 1, which is characterized in that second data voltage and preset data electricity Difference DELTA V between pressure is as follows:
Wherein Vgh is the cut-in voltage of thin film transistor (TFT), and Vgl is the closing voltage of thin film transistor (TFT), and Cst is storage capacitance, Cgs For the equivalent capacity between the grid and source electrode of thin film transistor (TFT), Clc is liquid crystal capacitance.
3. driving circuit according to claim 1, which is characterized in that
The timing controller electrically connects with the programmable Gamma correction buffer chip and the source drive chip respectively It connects, the programmable Gamma correction buffer chip is electrically connected with the source drive chip.
4. driving circuit according to claim 3, which is characterized in that
The timing controller includes control terminal and the first output end, and the control terminal is for exporting the control signal, institute The first output end is stated for exporting the digital signal;
The programmable Gamma correction buffer chip includes first input end, second output terminal and third output end, and described One input terminal is for inputting the control signal;The second output terminal is for exporting first reference voltage;The third Output end is for exporting second reference voltage;
The source drive chip includes the second input terminal, third input terminal and the 4th input terminal;Second input terminal is used for Input the digital signal;The third input terminal is for inputting first reference voltage;4th input terminal is for defeated Go out second reference voltage;
The control terminal is connect with the first input end, and first output end is connect with second input terminal, and described Two output ends are connect with the third input terminal, and the third output end is connect with the 4th input terminal.
5. a kind of liquid crystal display device, which is characterized in that including:Liquid crystal display panel and driving circuit, the driving circuit packet It includes:
Timing controller, for providing control signal to programmable Gamma correction buffer chip and providing number to source drive chip Word signal;
The programmable Gamma correction buffer chip is used under the control of said control signal, when the timing controller When exporting the digital signal of 3n rows pixel and 3n+1 row pixels, the first reference voltage is exported to the source drive chip;With And when the timing controller exports the digital signal of 3n+2 row pixels, to the second reference of source drive chip output Voltage;
The source drive chip, for receiving the first reference voltage and the second reference voltage and digital signal, and according to described First reference voltage, second reference voltage and the digital signal generate data voltage, and the data voltage includes the One data voltage and the second data voltage, the source drive chip are additionally operable to according to first reference voltage and the number Word signal generates the first data voltage and generates the second data electricity according to second reference voltage and the digital signal Pressure, first data voltage is equal to preset data voltage, between second data voltage and the preset data voltage Difference is equal to preset value.
6. liquid crystal display device according to claim 5, which is characterized in that the timing controller respectively with it is described can It programs Gamma correction buffer chip and the source drive chip is electrically connected, the programmable Gamma correction buffer chip and institute State source drive chip electric connection.
CN201710178800.6A 2017-03-23 2017-03-23 Driving circuit and liquid crystal display device Active CN106875909B (en)

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CN106875909B (en) * 2017-03-23 2018-10-16 深圳市华星光电技术有限公司 Driving circuit and liquid crystal display device
CN109119751B (en) * 2017-06-22 2020-10-30 群创光电股份有限公司 Liquid crystal antenna device

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CN103578422A (en) * 2012-07-31 2014-02-12 索尼公司 Display device and electronic apparatus, and driving method of display panel
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