CN106803486A - The manufacture method of nonvolatile memory - Google Patents

The manufacture method of nonvolatile memory Download PDF

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Publication number
CN106803486A
CN106803486A CN201710060790.6A CN201710060790A CN106803486A CN 106803486 A CN106803486 A CN 106803486A CN 201710060790 A CN201710060790 A CN 201710060790A CN 106803486 A CN106803486 A CN 106803486A
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China
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layer
diode
nonvolatile memory
manufacture method
electrode
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CN201710060790.6A
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Chinese (zh)
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曾俊元
李岱萤
蔡宗霖
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华邦电子股份有限公司
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Priority to CN201210437634.4A priority Critical patent/CN103811655A/en
Priority to CN201710060790.6A priority patent/CN106803486A/en
Publication of CN106803486A publication Critical patent/CN106803486A/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02425Conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02565Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/24Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, e.g. resistance switching non-volatile memory structures
    • H01L27/2409Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, e.g. resistance switching non-volatile memory structures comprising two-terminal selection components, e.g. diodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/24Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, e.g. resistance switching non-volatile memory structures
    • H01L27/2463Arrangements comprising multiple bistable or multistable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays, details of the horizontal layout
    • H01L27/2481Arrangements comprising multiple bistable or multistable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays, details of the horizontal layout arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays, details of the vertical layout
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/8613Mesa PN junction diodes

Abstract

The invention discloses a kind of manufacture method of nonvolatile memory, its step is as follows:In formation unipolarity resistive memory cell and diode in substrate;Diode is electrically connected with unipolarity resistive memory cell.The forming step of the diode is as follows:In forming first electrode in substrate;Using AC magnetic controlled sputtering method, with sequentially forming IZO layer and cobalt oxide layer in first electrode;In forming second electrode on cobalt oxide layer.The present invention can not only have good rectification effect, can also bear to repeat the transition operation between the high resistance of more than 100 times and low resistance, and cause that the reading degree of discrimination high can be maintained between high resistance and low resistance.

Description

The manufacture method of nonvolatile memory

The application is the divisional application of entitled nonvolatile memory patent application, the wherein applying date of female case For:On November 6th, 2012, the Application No. of female case:201210437634.4.

Technical field

The present invention relates to a kind of manufacture method of memory, and more particularly to a kind of manufacturer of nonvolatile memory Method.

Background technology

Memory, as the term suggests it is the semiconductor element to data on file or data.When the work(of computer microprocessor Can be increasingly stronger, when the program that software is carried out is more and more huger with computing, the demand of memory also with regard to more and more higher, in order to make Make the big and cheap memory of capacity to meet the trend of this demand, the technology and technique of memory, it has also become semiconductor section Skill continues the driving force toward integration high challenge.In various nonvolatile memories, resistance-type memory has operating voltage Small, multimode is stored, storage time is long, area is small and advantages of simple structure and simple, therefore resistance-type memory has turned into following storage The trend of device development.

Resistance-type memory generally includes resistive memory cell and diode.With a resistive memory cell It is referred to as the resistance-type memory with 1D1R structures with the resistance-type memory of a diode.1D1R structures can make resistance Formula memory has VHD and low cost, and can be used to avoid the problem of read error.

Additionally, in general 1D1R structures, typically using bipolarity resistive memory cell come diode list of arranging in pairs or groups Unit.However, the resistance-type memory with this kind of 1D1R structures can only often bear one between high resistance and low resistance state Secondary transition operation, thus influence the efficiency of resistance-type memory.

The content of the invention

For problems of the prior art, it is an object of the invention to provide a kind of manufacture of nonvolatile memory Method, it has unipolarity resistive memory cell and diode.

The present invention provides a kind of manufacture method of nonvolatile memory, and its step is as follows.In forming unipolarity in substrate Resistive memory cell and diode.Diode is electrically connected with unipolarity resistive memory cell.Described two The forming step of pole pipe unit is as follows.In forming first electrode in substrate.Using AC magnetic controlled sputtering method, with first electrode Sequentially form IZO layer and cobalt oxide layer.In forming second electrode on cobalt oxide layer.

In one embodiment of this invention, the forming method of the first electrode includes e-beam evaporation.

In one embodiment of this invention, the forming method of the second electrode includes e-beam evaporation.

In one embodiment of this invention, the unipolarity resistive memory cell and the diode are being formed Before, also including the substrate is put into high temperature furnace pipe, with forming dielectric layer in the substrate.

In one embodiment of this invention, after the dielectric layer is formed, also using e-beam evaporation, with Adhesion layer is formed on the dielectric layer so that the diode is configured at described with the unipolarity resistive memory cell On adhesion layer.

In one embodiment of this invention, the material of the adhesion layer includes titanium.

In one embodiment of this invention, the first electrode and the IZO layer directly contact, second electricity Pole and the cobalt oxide layer directly contact, and the cobalt oxide layer and the IZO layer directly contact.

In one embodiment of this invention, the diode is formed directly into the unipolarity resistive memory cell On, or the unipolarity resistive memory cell is formed directly on the diode.

In one embodiment of this invention, the diode is formed at the side of the unipolarity resistive memory cell Side.

In one embodiment of this invention, the unipolarity resistive memory cell includes two-layer transition layer.Described in two-layer The material of one of transition layer is hafnium oxide, and the material of the other of transition layer is zirconium oxide described in two-layer.

The beneficial effects of the present invention are based on above-mentioned, in nonvolatile memory of the invention, being utilized respectively oxidation Cobalt and indium zinc oxide as diode p-type semiconductor layer and n-type semiconductor layer, and by this diode and unipolarity Resistive memory cell electrically collocation and constitute the nonvolatile memory of 1D1R structures.Therefore, it is of the invention non-volatile to deposit Reservoir can not only have good rectification effect, can also bear to repeat the transition between the high resistance of more than 100 times and low resistance Operation, and cause that the reading degree of discrimination high can be maintained between high resistance and low resistance.

It is that features described above of the invention and advantage can be become apparent, special embodiment below, and it is detailed to coordinate accompanying drawing to make Carefully it is described as follows.

Brief description of the drawings

Fig. 1 is the generalized section of the nonvolatile memory of the first embodiment of the present invention.

Fig. 2 is the generalized section of the nonvolatile memory of the second embodiment of the present invention.

Fig. 3 is the generalized section of the nonvolatile memory of the third embodiment of the present invention.

Fig. 4 is the result that diode of the present invention bias test.

Fig. 5 is the tracing analysis made according to the result of Fig. 4.

Fig. 6 be diode of the present invention forward/backward current ratio relation figure.

Fig. 7 is the result that nonvolatile memory of the invention bias test.

Fig. 8 is the storage power test result of nonvolatile memory of the invention.

Fig. 9 is the non-destructive read test result of nonvolatile memory of the invention.

Wherein, description of reference numerals is as follows:

10、20、30:Nonvolatile memory

100:Substrate

120:Dielectric layer

130:Adhesion layer

200:Unipolarity resistive memory cell

210a、210b、310a、310b:Electrode

220a、220b:Transition layer

300:Diode

320:IZO layer

330:Cobalt oxide layer

Specific embodiment

In order that the present invention is readily understood, and in following embodiment, identical numbers identical element, and not Repeat other explanation.

First embodiment

Fig. 1 is the generalized section of the nonvolatile memory of the first embodiment of the present invention.Fig. 1 is refer to, it is non-volatile Property memory 10 include unipolarity resistive memory cell 200 and diode 300.Unipolarity resistive memory cell 200 are configured in substrate 100.Substrate 100 is, for example, silicon base.Additionally, dielectric layer 120 is configured at unipolarity resistance-type storage list Between unit 200 and substrate 100.The material of dielectric layer 120 is, for example, oxide, and its thickness for example between 10nm to 500nm it Between.Dielectric layer 120 is used to make unipolarity resistive memory cell 200 be electrically isolated with substrate 100.In addition, adhesion layer 130 is selected It is configured between unipolarity resistive memory cell 200 and dielectric layer 120 to property.The material of adhesion layer 130 is, for example, titanium, and its Thickness is for example between 10nm to 100nm.Adhesion layer 130 is used to increase unipolarity resistive memory cell 200 and dielectric layer Adhesive force between 120.

In the present embodiment, unipolarity resistive memory cell 200 includes the electrode being sequentially configured on dielectric layer 120 210a, transition layer 220a, transition layer 220b and electrode 210b.The material of electrode 210a is, for example, titanium nitride.Transition layer 220a's Material is, for example, hafnium oxide, and its thickness is for example between 2nm to 8nm.The material of transition layer 220b is, for example, zirconium oxide, and Its thickness is for example between 2nm to 8nm.The material of electrode 210b is, for example, platinum or tungsten, its thickness for example between 10nm extremely Between 1000nm.

Special one is mentioned that, in the present embodiment, the structure of unipolarity resistive memory cell 200 is also visual real with material Border demand and be changed, this technology being well known to those skilled in the art, in this NES.

Diode 300 is configured on unipolarity resistive memory cell 200.In the present embodiment, diode 300 include the electrode 210b, the IZO layer 320, cobalt oxide layer that are sequentially configured on unipolarity resistive memory cell 200 330 and electrode 310a.That is, in nonvolatile memory 10, unipolarity resistive memory cell 200 and diode The common electrode 210b of unit 300.Certainly, in other embodiments, unipolarity resistive memory cell 200 and diode 300 can not also common electrode 210b, but with respective electrode.The material of electrode 310a is, for example, platinum or tungsten, and it is thick Degree is for example between 10nm to 1000nm.

Additionally, IZO layer 320 is used as the n-type semiconductor layer in diode 300, and the conduct of cobalt oxide layer 330 P-type semiconductor layer in diode 300.The thickness of IZO layer 320 is for example between 1nm to 1000nm.Oxidation The thickness of cobalt layers 330 is for example between 1nm to 1000nm.In the present embodiment, IZO layer 320 is configured at cobalt oxide layer 330 lower sections.However, according to the practical manner of memory, in other embodiments, IZO layer 320 is then configured in The top of cobalt oxide layer 330.

It is because both cobalt oxide and indium zinc oxide are all the material of low band gap, therefore to be made respectively with both with being worth mentioning During for p-type semiconductor layer and n-type semiconductor layer in diode 300, may be such that diode 300 is obtained big suitable To/backward current ratio (F/R current ratio), so cause nonvolatile memory 10 have forward current high and Good rectification effect.Additionally, when nonvolatile memory 10 has above-mentioned diode 300, nonvolatile memory 10 can between high resistance and low resistance repeatedly transition operation, and cause between high resistance and low resistance have reading high The degree of discrimination.

Second embodiment

Fig. 2 is the generalized section of the nonvolatile memory of the second embodiment of the present invention.Fig. 2 is refer to, it is non-volatile Property memory 20 is with the difference of nonvolatile memory 10:In nonvolatile memory 20, diode 300 is configured In on adhesion layer 130, and unipolarity resistive memory cell 200 is then configured on diode 300, and the two common electrode 210a。

3rd embodiment

Fig. 3 is the generalized section of the nonvolatile memory of the third embodiment of the present invention.Fig. 3 is refer to, it is non-volatile Property memory 30 is with the difference of nonvolatile memory 10:In nonvolatile memory 30, diode 300 with it is single Polarity resistive memory cell 200 is all configured on adhesion layer 130, and diode 300 stores single with unipolarity resistance-type Unit 200 is for example electrically connected to each other by intraconnections (not illustrating).In the present embodiment, unipolarity resistive memory cell 200 each have a pair of electrodes, i.e. unipolarity resistive memory cell 200 with diode 300 with electrode 210a and electricity Pole 210b, and diode 300 has electrode 310a and electrode 310b.In unipolarity resistive memory cell 200, electrode 210a, transition layer 220a, transition layer 220b and electrode 210b are sequentially configured on adhesion layer 130.In diode 300, Electrode 310a, IZO layer 320, cobalt oxide layer 330 are sequentially configured on adhesion layer 130 with electrode 310a.

In the various embodiments described above, each film layer stack order and unipolarity resistive memory cell 200 and diode The technology that configuration relation between unit 300 is well known to those skilled in the art, the visual actual demand of those skilled in the art And be adjusted.

Experimental example

The making and test of diode 300

First, there is provided the silicon substrate after being cleaned by RCA cleanings is as substrate 100.Then, by substrate 100 It is put into high temperature furnace pipe, to be about the silica membrane of 200nm as dielectric layer 120 in formation thickness on silicon substrate.Then, Thickness is formed by the use of e-beam evaporation be about the titanium film of 30nm as adhesion layer 130.Then, using e-beam evaporation shape It is about the platinum film of 80nm as bottom electrode (electrode 210b or electrode 310a) into thickness.Next, in room temperature and about Under the pressure of 10mTorr, with 18sccm gas flow (argon gas:Oxygen=1:And 1.05W/cm 2)2Plasma power it is close Degree, forms thickness and is about the indium zinc oxide film of 10nm as IZO layer 320 by the use of AC magnetic controlled sputtering method.Followed by, exist Under the pressure of room temperature and about 10mTorr, with 18sccm gas flow (argon gas:Oxygen=2:And 1.05W/cm 1)2Plasma Body power density, reuses AC magnetic controlled sputtering method and forms the oxidation cobalt thin film of thickness about 10nm as cobalt oxide layer 330. Finally, reuse e-beam evaporation and metal light cover of arranging in pairs or groups forms thickness about 50nm and area is 1.76 × 10-4cm2's Platinum film is used as electrode 310a.So far, the making of diode 300 is completed.

Two are constituted to above-mentioned formed electrode 210b, IZO layer 320, cobalt oxide layer 330 and electrode 310a below Pole pipe unit 300, carries out every test, and its test result is as shown in Figures 4 to 6.

Fig. 4 represents the graph of a relation that voltage and electric current obtained by bias test are carried out to diode 300.The horizontal stroke of Fig. 4 Axle represents the bias value for putting on diode 300, and the longitudinal axis represents the current value of gained after being biased.As shown in Figure 4, When to diode 300 plus the Dc bias born, electric current can increase with voltage;And work as and diode 300 is applied just Dc bias when, electric current will not with voltage increase and substantially increase.It follows that diode 300 is with good Rectification effect.Additionally, the resulting current value when 100 tests are carried out to diode 300, and only from Fig. 4 also The current value and no significant difference obtained by 10 tests are carried out, that is, diode 300 is at least repeated and born 100 times Operation above.

Fig. 5 is the tracing analysis made according to the result of Fig. 4.The transverse axis of Fig. 5 represents the bias for applying diode 300 Value, and longitudinal axis representative carries out the value of gained after Logarithmic calculation to its current value.Fig. 5 is refer to, slope of a curve is 8, if with oblique Rate=1/nkT is calculated, and can learn that the ideal factor of diode 300 is 5, and this value is in the reason for meeting oxide diode Think the scope of the factor.

Fig. 6 for diode 300 forward/backward current ratio relation figure.The transverse axis of Fig. 6 represents what is be biased Absolute value, and the longitudinal axis represents its forward/backward current ratio.It will be appreciated from fig. 6 that diode of the invention 300 has well Rectification effect, and in | 2 | during V, forward/backward current ratio may be up to 7 × 103.This result display diode 300 has There is forward current characteristic high, therefore be especially suitable for being used come resistive memory cell of arranging in pairs or groups.

The test of nonvolatile memory of the invention

Above-mentioned diode 300 is arranged in pairs or groups into unipolarity resistive memory cell 200 of the invention non-volatile to be formed After memory, every test is carried out to memory of the present invention, its test result is as shown in Figure 7 to 9.

Fig. 7 is the graph of a relation that voltage and electric current obtained by bias test are carried out to nonvolatile memory of the invention.Fig. 7 Transverse axis represent applied bias value, and the longitudinal axis represents the current value corresponding to being biased.As shown in Figure 7, when to this When the nonvolatile memory of invention imposes the write-in voltage of positive bias, electric current can increase as voltage increases, and work as electric current When reaching its cut-off current (about 1mA), nonvolatile memory of the invention will be changed to low resistance state from high resistance state.When Nonvolatile memory of the invention is imposed positive bias erase voltage when, it is foregoing erase voltage reach 2V when, electric current will The rapid current value for dropping to script, this kind of situation represent nonvolatile memory of the invention changed by low resistance state it is paramount Resistance states.Additionally, this result shows, nonvolatile memory of the invention can at least repeat the high resistance of more than 100 times Transition operation between low resistance.

Fig. 8 represents the storage power test result of nonvolatile memory of the invention.Above-mentioned storage power test, is difference At room temperature and 85 DEG C, the write-in voltage of positive bias and erasing for positive bias are imposed respectively to nonvolatile memory of the invention Voltage, thereby changes to low resistance state and high resistance state nonvolatile memory of the invention respectively.Then, then with 1V Voltage read respectively low resistance state and high resistance state nonvolatile memory of the invention current value.The horizontal stroke of Fig. 8 Axle represents the time that data are read by nonvolatile memory of the invention, and the longitudinal axis represents read electric current.Can by Fig. 8 Know, 1 × 105After second, still correct data can be read from nonvolatile memory of the invention, and it is bad without any storage power The situation of change occurs.And two storage state (high resistance state and low resistance state) room temperature with 85 DEG C at, have 40 times respectively Resistance ratio above.This represents nonvolatile memory of the invention at higher temperatures, remains to maintain more than 40 times of reading The degree of discrimination.

Fig. 9 represents the non-destructive read test result of nonvolatile memory of the invention.Above-mentioned non-destructive is read Test is taken, is the write-in voltage for imposing positive bias respectively to nonvolatile memory of the invention respectively at room temperature and 85 DEG C And the voltage of erasing of positive bias, thereby nonvolatile memory of the invention is changed to low resistance state and high resistance shape respectively State.Then the nonvolatile memory of the invention of low resistance state and high resistance state, then with 1V is read respectively and measures it Current value.The transverse axis of Fig. 9 represents the time that data are read by nonvolatile memory of the invention, and the longitudinal axis is represented and read Electric current.As shown in Figure 9,10000 seconds are read afterwards continuous, can be still read from nonvolatile memory of the invention correct Data, and without the situation generation of any storage power deterioration.Additionally, at room temperature with 85 DEG C, high resistance state or low resistance state Still maintain more than 35 times of gap.This represents nonvolatile memory of the invention high resistance and low resistance under high temperature and normal temperature State, remains to maintain more than 35 times of the reading degree of discrimination.

Although the present invention is disclosed as above with embodiment, so it is not limited to the present invention, any art In technical staff, without departing from the spirit and scope of the present invention, when a little change can be made with retouching, therefore guarantor of the invention Shield scope is defined when the scope defined depending on claims.

Claims (10)

1. a kind of manufacture method of nonvolatile memory, it is characterised in that the manufacture method is comprised the following steps:
In formation unipolarity resistive memory cell and diode, the diode and the unipolarity in substrate Resistive memory cell is electrically connected with, wherein the forming step of the diode includes:
In forming first electrode in the substrate;
Using AC magnetic controlled sputtering method, with sequentially forming IZO layer and cobalt oxide layer in the first electrode;And
In forming second electrode on the cobalt oxide layer.
2. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the forming method bag of the first electrode Include e-beam evaporation.
3. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the forming method bag of the second electrode Include e-beam evaporation.
4. the manufacture method of nonvolatile memory as claimed in claim 1, is forming the unipolarity resistance-type storage list Before the first and diode, also including the substrate is put into high temperature furnace pipe, it is situated between with being formed in the substrate Electric layer.
5. the manufacture method of nonvolatile memory as claimed in claim 4, after the dielectric layer is formed, also including profit With e-beam evaporation, with forming adhesion layer on the dielectric layer so that the diode and the unipolarity resistance Formula memory cell arrangements are on the adhesion layer.
6. the manufacture method of nonvolatile memory as claimed in claim 5, wherein the material of the adhesion layer includes titanium.
7. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the first electrode and the indium oxide Zinc layers directly contact, the second electrode and the cobalt oxide layer directly contact, and the cobalt oxide layer and the indium zinc oxide Layer directly contact.
8. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the diode is formed directly into On the unipolarity resistive memory cell, or the unipolarity resistive memory cell is formed directly into the diode On unit.
9. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the diode be formed at it is described The side of unipolarity resistive memory cell.
10. the manufacture method of nonvolatile memory as claimed in claim 1, wherein the unipolarity resistive memory cell Including two-layer transition layer, the material of one of transition layer is hafnium oxide described in two-layer, the other of transition layer described in two-layer Material be zirconium oxide.
CN201710060790.6A 2012-11-06 2012-11-06 The manufacture method of nonvolatile memory CN106803486A (en)

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