CN106711115A - 芯片封装件及其制造方法 - Google Patents
芯片封装件及其制造方法 Download PDFInfo
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- CN106711115A CN106711115A CN201610724404.4A CN201610724404A CN106711115A CN 106711115 A CN106711115 A CN 106711115A CN 201610724404 A CN201610724404 A CN 201610724404A CN 106711115 A CN106711115 A CN 106711115A
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- core
- layer
- underbump metallization
- tube core
- chip package
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Abstract
芯片封装件可以包括管芯、位于管芯上方的再分布结构以及位于再分布结构上方的凸块下金属(UBM)结构。UBM结构可以包括中心部分、与中心部分物理分隔开并且围绕中心部分的周界的外围部分以及具有第一端和与第一端相对的第二端的桥接部分。桥接部分的第一端可以连接至UBM结构的中心部分,而桥接部分的第二端可以连接至UBM结构的外围部分。本发明的实施例还涉及芯片封装件的制造方法。
Description
技术领域
本发明的实施例涉及集成电路器件,更具体地,涉及芯片封装件及其制造方法。
背景技术
在封装技术方面,再分布层(RDL)可以形成在芯片上方并且电连接至芯片中的有源器件。之后,可以形成诸如凸块下金属(UBM)上的焊料球的输入/输出(I/O)连接器以通过RDL电连接至芯片。这种封装技术的优势特征在于形成扇出封装件的可能性。因此,芯片上的I/O焊盘可以再分布以覆盖比芯片更大的面积,并且因此可以增加封装的芯片的表面上包装的I/O焊盘的数量。
集成扇出(InFO)封装技术变得越来越流行,尤其当与晶圆级封装(WLP)技术结合时。这样产生的封装结构提供具有相对较低的成本和高性能封装件的高功能密度。
发明内容
本发明的实施例提供了一种芯片封装件,包括:管芯;以及再分布结构,位于所述管芯上方;以及凸块下金属(UBM)结构,位于所述再分布结构上方,所述凸块下金属结构包括中心部分、与所述中心部分物理分隔开并且围绕所述中心部分的周界的外围部分以及具有第一端和与所述第一端相对的第二端的桥接部分,所述桥接部分的所述第一端连接至所述凸块下金属结构的所述中心部分,所述桥接部分的所述第二端连接至所述凸块下金属结构的所述外围部分。
本发明的另一实施例提供了一种芯片封装件,包括:管芯;模塑料,围绕所述管芯;多层级再分布层(RDL),位于所述管芯上方和所述模塑料的第一表面上方;凸块下金属(UBM)结构,位于所述多层级再分布层上方并且电连接至所述多层级再分布层,其中,所述凸块下金属结构包括焊盘区域以及与所述焊盘区域横向分隔开并且围绕所述焊盘区域的周界的外围部分;以及外部连接器,位于所述凸块下金属结构的所述焊盘区域上方。
本发明的又一实施例提供了一种用于制造芯片封装件的方法,所述方法包括:将管芯附接至载体;在所述管芯的侧壁周围形成模塑料;在所述管芯和所述模塑料上方形成包括多个再分布层(RDL)的再分布结构;在所述再分布结构的最顶再分布层上方形成凸块下金属(UBM)结构,所述凸块下金属结构包括焊盘区域以及与所述焊盘区域横向分隔开并且围绕所述焊盘区域的周界的外围部分;在所述凸块下金属结构的所述焊盘区域上方形成外部连接器;以及去除所述载体。
附图说明
当结合附图进行阅读时,从以下详细描述可最佳理解本发明的各个方面。应该指出,根据工业中的标准实践,各个部件未按比例绘制。实际上,为了清楚的讨论,各个部件的尺寸可以任意地增大或减小。
图1示出了根据实施例的芯片封装件的截面图。
图2A至图2C示出了根据实施例的图1中所示的芯片封装件的凸块下金属(UBM)结构的放大图。
图3A至图3B示出了典型的UBM结构。
图4A至图4L示出了根据各个实施例的UBM结构的各个实例。
图5A至图5F示出了根据实施例的示出形成图1中所示的芯片封装件的方法的一些步骤的工艺流程。
具体实施方式
以下公开内容提供了许多用于实现所提供主题的不同特征的不同实施例或实例。下面描述了组件和布置的具体实例以简化本发明。当然,这些仅仅是实例,而不旨在限制本发明。例如,以下描述中,在第二部件上方或者上形成第一部件可以包括第一部件和第二部件直接接触形成的实施例,并且也可以包括在第一部件和第二部件之间可以形成额外的部件,从而使得第一部件和第二部件可以不直接接触的实例。此外,本发明可在各个实施例中重复参考标号和/或字符。该重复是为了简单和清楚的目的,并且其本身不指示所讨论的各个实施例和/或配置之间的关系。
而且,为便于描述,在此可以使用诸如“在…之下”、“在…下方”、“下部”、“在…之上”、“上部”等空间相对术语,以描述如图所示的一个元件或部件与另一个(或另一些)原件或部件的关系。除了图中所示的方位外,空间相对术语旨在包括器件在使用或操作中的不同方位。装置可以以其他方式定向(旋转90度或在其他方位上),而本文使用的空间相对描述符可以同样地作出相应的解释。
图1示出了根据实施例的芯片封装件100的截面图。芯片封装件100包括管芯102,该管芯102可以具有第一表面102a和与第一表面102a相对的第二表面102b。在一些实施例中,管芯102的第一表面102a可以是管芯102的有源表面。管芯102可以包括半导体衬底、有源器件和互连结构(未单独示出)。例如,该衬底可以包括掺杂或未掺杂的块状硅或绝缘体上半导体(SOI)衬底的有源层。一般地,SOI衬底包括半导体材料层(诸如绝缘层上形成的硅)。例如,绝缘体层可以是埋氧(BOX)层或氧化硅层。提供了衬底(诸如硅或玻璃衬底)上的绝缘体层。可选地,该衬底可以包括诸如锗的另一元素半导体;包括碳化硅、砷化镓、磷化镓、磷化铟、砷化铟和/或锑化铟的化合物半导体;包括SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP和/或GaInAsP的合金半导体;或它们的组合。也可以使用诸如多层衬底或梯度衬底的其它衬底。
诸如晶体管、电容器、电阻器、二极管、光电二极管、熔断器等的有源器件可以形成在衬底的顶面处。在有源器件和衬底的上方可以形成互连结构。该互连结构可以包括使用任何合适的方法形成的包含导电部件(例如,包括铜、铝、钨、它们的组合等的导线和通孔)的层间介电(ILD)层和/或金属间介电(IMD)层。例如,在图1所示的实施例中,管芯102的第一表面102a可以是ILD层和IMD层的最顶面。例如,ILD层和IMD层可以包括设置在这些导电部件之间的具有低于约4.0或甚至2.0的k值的低k介电材料。在一些实施例中,例如,ILD和IMD可以由通过诸如旋涂、化学汽相沉积(CVD)以及等离子体增强CVD(PECVD)的任何合适的方法形成的磷硅酸盐玻璃(PSG)、硼磷硅酸盐玻璃(BPSG)、氟硅酸盐玻璃(FSG)、SiOxCy、旋涂玻璃、旋涂聚合物、硅碳材料、它们的化合物、它们的复合材料、它们的组合等制成。互连结构电连接各个有源器件以在管芯102内形成功能电路。由这样的电路提供的功能可以包括存储器结构、处理结构、传感器、放大器、配电、输入/输出电路等。本领域普通技术人员应该理解,以上提供的实例仅用于说明的目的以进一步解释本发明的应用并且不旨在以任何方式限制本发明。其它的电路可以视情况用于给定应用。
可以在管芯102的第一表面102a上方形成输入/输出(I/O)和钝化部件。例如,可以在管芯102的第一表面102a上方(例如,在管芯102的互连结构上方并且可以通过互连结构中的各个导电部件电连接至有源器件)形成接触焊盘104。接触焊盘104可以包括诸如铝、铜等的导电材料。此外,可以在互连结构和接触焊盘上方形成钝化层106。在一些实施例中,钝化层106可以由诸如氧化硅、未掺杂的硅酸盐玻璃、氮氧化硅等的无机材料形成。也可以使用其它合适的钝化材料。部分钝化层106可以覆盖接触焊盘104的边缘部分。
诸如附加钝化层、导电柱和/或凸块下金属(UBM)层的附加互连部件也可以可选地形成在接触焊盘104上方。例如,如图1示出的,导电柱108可以形成在接触焊盘104上方并且电连接至接触焊盘104。导电柱108可以包括诸如铜、铝、钨、它们的组合等的合适的导电材料。可以在这种导电柱108周围形成介电层110。可以通过任何合适的方法形成管芯102的各个部件并且不在此处进一步详细的描述。此外,以上描述的管芯102的一般部件和配置仅是一个示例实施例,并且管芯102可以包括以上部件以及其它部件的任何数量的任何组合。
芯片封装件100可以包括至少横向包封管芯102的模塑料112。模塑料112可以具有第一表面112a和与第一表面112a相对的第二表面112b。在一些实施例中,诸如图1所示的实例,模塑料112的第二表面112b可以与管芯102的第二表面102b基本共面。模塑料112可以包括诸如环氧树脂、酚醛树脂、热定型树脂等的任何合适的材料。除了这些材料,模塑料112可以包括或可以不包括诸如氧化硅、氧化铝、氮化硼等的各种附加填料。
芯片封装件100可以包括与管芯102横向分隔开的一个或多个第一导电通孔114。图1仅示出四个第一导电通孔114作为实例。然而,在另一实例中,第一导电通孔114的数量可以小于四个(例如,两个、三个)或可以多于四个(例如,五个、六个或更多)。一个或多个第一导电通孔114可以由模塑料112至少横向包封。一个或多个第一导电通孔114可以包括与导电柱108类似的材料。
芯片封装件100可以额外地包括位于模塑料112的第一表面112a上方的再分布结构116。再分布结构116可以横向越过一个或多个第一导电通孔114上方的管芯102的边缘延伸并且位于模塑料112的第一表面112a上方。再分布结构116可以包括在一个或多个聚合物层120中形成的一个或多个再分布层(RDL)118。一个或多个RDL 118可以包括与导电柱108类似的材料。聚合物层120可以包括任何合适的材料(例如,聚酰亚胺(PI)、聚苯并恶唑(PBO)、苯并环丁烯(BCB)、环氧树脂、硅树脂、丙烯酸酯、纳米填充酚树脂、硅氧烷、含氟聚合物、聚降冰片烯等)。再分布结构116的RDL 118可以电连接至导电柱108。相应地,从管芯102的电连接件可以通过再分布结构116的RDL 118再分布(例如,扇出)。类似地,再分布结构116的RDL 118可以电连接至一个或多个第一导电通孔114。
如图1所示的实例中,再分布结构116可以是多层级再分布结构。换句话说,RDL118和聚合物层120可以空间分布在两个或多个层级之上。例如,在图1的实施例中,RDL 118空间布置为第一再分布层级118-1、第二再分布层级118-2和第三再分布层级118-3。类似地,在图1的实施例中,聚合物层120空间布置为第一聚合物层级120-1、第二聚合物层级120-2、第三聚合物层级120-3和第四聚合物层级120-4。
第一聚合物层级120-1可以设置在第一再分布层级118-1和模塑料112之间。第二聚合物层级120-2可以设置在第一再分布层级118-1和第二再分布层级118-2之间。第三聚合物层级120-3可以设置在第二再分布层级118-2和第三再分布层级118-3之间。第四聚合物层级120-4可以设置在第三再分布层级118-3上方。如图1所示,在不同再分布层级118-1、118-2、118-3中的RDL 118可以通过在第二聚合物层级120-2和第三聚合物层级120-3中形成的第二导电通孔122彼此电连接。此外,导电柱108和一个或多个第一导电通孔114可以通过在第一聚合物层级120-1中形成的第二导电通孔122电连接至再分布结构116。第二导电通孔122可以包括与导电柱108类似的材料。
芯片封装件100可以包括设置在管芯102的第二表面102b和模塑料112的第二表面112b处的绝缘层124。绝缘层124可以包括诸如聚酰亚胺(PI)、聚苯并恶唑(PBO)、苯并环丁烯(BCB)、环氧树脂、硅树脂、丙烯酸酯、纳米填充酚树脂、硅氧烷、含氟聚合物、聚降冰片烯等的介电材料。在一些实施例中,诸如图1所示的实例,绝缘层124可以具有在其中形成的开口126。开口126可以暴露一个或多个第一导电通孔114的表面,从而允许芯片封装件100与另一器件、封装件等互连。
芯片封装件100还可以包括UBM结构128-1、128-2,该UBM结构128-1、128-2可以包括与导电柱108类似的材料。可以在离管芯102最远的再分布结构116的再分布层级中形成UBM结构128-1、128-2。例如,在图1所示的实施例中,第三再分布层级118-3是离管芯102最远的再分布层级,并且因此,在再分布结构116的第三再分布层级118-3中形成UBM结构128-1、128-2。UBM结构128-1、128-2可以包括中心部分128-1和与中心部分128-1物理分隔开(例如,横向分隔开)的外围部分128-2。在一些实施例中,中心部分128-1可以是焊盘区域,在焊盘区域上方形成外部连接器130。外部连接器130可以包括BGA球、C4凸块、焊料凸块等。
图2A示出了根据实施例的芯片封装件100的UBM结构128-1、128-2、外部连接器130和聚合物层120的放大截面图。图2B示出了根据实施例的图2A中示出的UBM结构128-1、128-2、外部连接器130和聚合物层120的自顶向下视图。例如,图2A所示的截面图可以是沿着图2B中的线A-A’截取的视图。图2C示出了根据实施例的芯片封装件100的UBM结构128-1、128-2、外部连接器130和聚合物层120的另一截面图。例如,图2C所示的截面图可以是沿着图2B中的线B-B’截取的视图。
如图2A至图2C所示,UBM结构128-1、128-2的外围部分128-2可以由聚合物层120覆盖(例如,包围)。换句话说,UBM结构128-1、128-2的外围部分128-2可以由聚合物层120包封。因此,形成了位于聚合物层120和UBM结构128-1、128-2的外围部分128-2之间的第一表面132。可能存在间隙136(例如,空气间隙),该间隙136将UBM结构128-1、128-2的中心部分128-1与覆盖外围部分128-2的部分聚合物层120分隔开。在一些实施例中,覆盖外围部分128-2的部分聚合物层120的侧壁可以与UBM结构128-1、128-2的中心部分128-1的侧壁139分隔开距离D,该距离D可以在从约2微米至约50微米的范围内。
如图2B所示,UBM结构128-1、128-2的外围部分128-2可以与中心部分128-1物理分隔开并且可以围绕中心部分128-1的周界。在一些实施例中,诸如图2B所示的实例,外围部分128-2是围绕中心部分128-1的外部环结构。如图2B和图2C所示,外围部分128-2和中心部分128-1可以通过一个或多个桥接部分140(可以称为桥)连接(例如,电连接和/或物理连接),该桥接部分140可以设置在中心部分128-1和外围部分128-2之间。桥140可以具有连接(例如,物理连接)至UBM结构128-1、128-2的中心部分128-1的第一端140-1。桥140可以具有连接(例如,物理连接)至UBM结构128-1、128-2的外围部分128-2的第二端140-2(与第一端140-1相对)。
如图2B所示,UBM结构128-1、128-2的外围部分128-2可以连接(例如,电连接和/或物理连接)至RDL 118(例如,第三再分布层级118-3中的RDL 118)。因此,一个或多个桥140可以功能地将外部连接器130连接至再分布结构116。在如图2B所示的实例中,沿着UBM结构128-1、128-2的中心部分128-1的周界每隔一定间隔提供四个桥140。然而,在另一实施例中,可以形成不同数量的桥140。例如,在图4A和图4B所示的实施例中,沿着UBM结构128-1、128-2的中心部分128-1的周界每隔一定间隔形成八个桥140。
利用图2A至图2C所示的UBM结构128-1、128-2来实现多个优势。首先,在聚合物层120和第二界面138之间创建间隙136,第二界面138是位于外部连接器130和UBM结构128-1、128-2的中心部分128-1之间的界面。该间隙136的提供可以防止聚合物层120和第二界面138之间的物理接触。这进而可以消除或基本减小外部连接器130的可能在形成(例如,球安装)过程中引起的裂缝、金属间化合物(IMC)以及助焊剂攻击效应的形成。
例如,图3A示出了典型的UBM结构302,在典型的UBM结构302中,聚合物层304与位于典型的UBM结构302和外部连接器308之间的界面306物理接触或近距离物理接近。图3B示出了图3A中所示的区域310的扫描电镜(SEM)图像。如图3B所示,可以在聚合物层304和UBM结构302之间形成裂缝312。这可能是聚合物层304近距离物理接近于界面306时产生的IMC和助焊剂攻击效应的结果。裂缝312可以导致聚合物层304与UBM结构302的分层,从而减小包括典型的UBM结构302的芯片封装件的可靠性。另一方面,在图2A至图2C所示的实例中,由于消除或基本减少了UBM结构128-1、128-2中的IMC和助焊剂攻击效应的形成(例如,由于在聚合物层120和界面138之间的间隙136的提供),减小了聚合物层120与UBM结构128-1、128-2的分层的风险,从而增加了芯片封装件100的可靠性。
图4A至图4F示出了根据各个实施例的UBM结构128-1、128-2的各个实例。在图4A示出的实例中,与图2B示出的实例相比,沿着UBM结构128-1、128-2的中心部分128-1的周界每隔一定间隔形成更多数量的桥140。更多数量的桥140的形成可以减小UBM结构128-1、128-2的外围部分128-2和中心部分128-1之间的电阻。此外,每个桥140内的电流密度通过提供更大数量的桥140减小,从而减少每单位面积的功耗。这进而增加了具有这种UBM结构128-1、128-2的半导体器件的电源效率。图4B示出了位于RDL 118和外围部分128-2上方的聚合物层120的形成之后以及位于UBM结构128-1、128-2的中心部分128-1上方的外部连接器130的形成之后的图4A中的UBM结构128-1、128-2。
在图4C示出的实例中,形成桥140从而使得每个桥140的第一端140-1的横向尺寸小于每个桥140的第二端140-2的横向尺寸。在图4C示出的实例中,示出的每个桥140的第一端140-1成形为沿着UBM结构128-1、128-2的中心部分128-1的周界的三角形结构。类似于由图4B示出的实施例产生的效应,与第一端140-1相比,在第二端140-2处具有更宽的横向尺寸的桥140的形成可以减小UBM结构128-1、128-2的外围部分128-2和中心部分128-1之间的电阻。图4D示出了位于RDL 118和外围部分128-2上方的聚合物层120的形成之后以及位于UBM结构128-1、128-2的中心部分128-1上方的外部连接器130的形成之后的图4C中的UBM结构128-1、128-2。
在图4E和图4G所示的实例中,UBM结构128-1、128-2的中心部分128-1形成为导电网格或导电网。图4F和图4H示出了位于RDL 118和外围部分128-2上方的聚合物层120的形成之后以及位于UBM结构128-1、128-2的中心部分128-1上方的外部连接器130的形成之后的图4E和图4G中的UBM结构128-1、128-2。通过将UBM结构128-1、128-2的中心部分128-1形成为网,改进了外部连接器130的均匀性。此外,也增强了外部连接器130和UBM结构128-1、128-2的中心部分128-1之间的粘合。
在图4I所示的实例中,UBM结构128-1、128-2的外围部分128-2成形为多边形。此外,形成桥140,从而使得每个桥140的第一端140-1的横向尺寸小于每个桥140的第二端140-2的横向尺寸。通过改变UBM结构128-1、128-2的外围部分128-2的形状,可以减小中心部分128-1和外围部分128-2之间的寄生电容。因此,可以基于中心部分128-1和外围部分128-2之间的最小化的寄生电容的标准优化外围部分128-2的形状。图4J示出了位于RDL118和外围部分128-2上方的聚合物层120的形成之后以及位于UBM结构128-1、128-2的中心部分128-1上方的外部连接器130的形成之后的图4I中的UBM结构128-1、128-2。
在图4K示出的实例中,成形外围部分128-2和中心部分128-1以匹配可能在UBM结构128-1、128-2的中心部分128-1上方形成的BGA凸块的形状。在图4K示出的实施例中,由于BGA凸块具有自顶向下视图的椭圆形状,因此外围部分128-2和中心部分128-1的每个成形为椭圆。图4L示出了位于RDL 118和外围部分128-2上方的聚合物层120的形成之后以及位于UBM结构128-1、128-2的中心部分128-1上方的外部连接器130的形成之后的图4K中的UBM结构128-1、128-2。
图5A至图5F示出了根据实施例的示出图1中所示的形成芯片封装件100的方法的一些步骤的工艺流程。可以提供载体502。载体502可以为在随后处理步骤期间形成的芯片封装件100的部件提供临时机械和结构支撑。例如,载体502可以包括玻璃、硅、氧化硅、氧化铝等。例如,载体502可以是载体晶圆并且在载体502上方可以形成多个芯片封装件100。然而,为了简便的目的,在图5A至图5F描述的工艺流程中仅示出了一个这样的芯片封装件100的形成。如图5A所示,可以在载体502上方形成粘合层504。粘合层504可以通过将粘合层504卷至和附接至载体502的工艺形成。在一些实施例中,粘合层504可以是管芯附接膜(DAF)或光热转换(LTHC)释放层。同样图5A中示出了介电层124,可以通过诸如旋涂、化学汽相沉积(CVD)、等离子体增强CVD(PECVD)等的合适的工艺在粘合层504上方形成介电层124。
如图5A所示,可以在介电层124上方形成一个或多个第一导电通孔114。在一些实施例中,可以在介电层124中形成对应于一个或多个第一导电通孔114的位置的开口(例如,通过钻孔工艺)。随后可以在这些开口中形成晶种层并且可以在晶种层上方镀一个或多个第一导电通孔114。可以根据期望的材料可选地使用诸如溅射、蒸发、PECVD等的其它形成工艺。
如图5B所示,随后,可以在介电层124上方拾取并且放置管芯102。管芯102可以与一个或多个第一导电通孔114横向分隔开。
在放置管芯102之后,如图5B所示,可以在管芯102周围形成模塑料112。用于形成模塑料112的合适的方法可以包括压缩模塑、转移模塑、液体封装模塑等。例如,使用模制工具(未示出)成形或模制模塑料112,当运用时,模塑工具可以具有用于保留模塑料112的边界或其它部件。模塑工具可以用于将模塑料112分配在管芯102周围以将模塑料112推动至开口和凹槽,消除气袋等。模塑料112可以以液体形式分配在管芯102周围。随后,实施固化工艺以固化模塑料112。首先模塑料112可以形成为在管芯102上方延伸并且覆盖管芯102的顶面。接下来,可以采用平坦化工艺(例如,机械研磨、化学机械抛光(CMP)或其它回蚀刻技术)以去除管芯102上方的模塑料112的过量部分。在平坦化之后,暴露管芯102的连接器(例如,导电柱108),并且模塑料112和管芯102的顶面可以基本水平。
参照图5C,可以在模塑料112上方形成再分布结构116。如以上描述图1的方面,再分布结构116在模塑料112的第一表面112a上方横向越过管芯102的边缘延伸。可以使用诸如旋涂技术、层压等的任何合适的方法形成聚合物层120。
诸如RDL 118、UBM结构128-1、128-2以及第二导电通孔122的导电部件可以通过图案化聚合物层120(例如,使用光刻和蚀刻工艺的组合)以及在图案化的聚合物层上方和中形成导电部件来形成。RDL 118、UBM结构128-1、128-2以及第二导电通孔122的形成可以包括沉积晶种层(未示出),使用具有各个开口的掩模层(未示出)以限定RDL 118、UBM结构128-1、128-2以及第二导电通孔122的形状。例如,随后使用电化学镀工艺填充开口。然后可以去除掩模层和晶种层的过量部分。聚合物层120、RDL 118、UBM结构128-1、128-2以及第二导电通孔122的数量不限于图5C示出的实施例。例如,RDL 116可以包括多个聚合物层120中的任何数量的堆叠的、电连接的导电部件。
如图5C所示,这个工艺流程步骤暴露了留下的UBM结构128-1、128-2。因此,在下一步骤中,如图5D所示,在UBM结构128-1、128-2的外围部分128-2以及聚合物层级120-3上方形成最顶聚合物层级120-4。可以使用诸如旋涂技术、层压等的任何合适的方法。然而,也实施光刻工艺以在最顶聚合物层120和UBM结构128-1、128-2的中心部分128-1之间形成间隙136。
参照图5E,可以在UBM结构128-1、128-2的中心部分128-1上方形成外部连接器130。例如,可以通过球安装工艺获得外部连接器130,虽然其它合适的工艺也是可能的。外部连接器130可以用于将芯片封装件100电连接至诸如另一器件管芯、内插件、封装衬底、印刷电路板、主板等的其它封装组件。随后,可以去除载体502并且可以使用合适的管芯锯切技术沿着刻线510切割每个芯片封装件100(包括管芯102、相应的部分RDL118、UBM 128-1、128-2以及外部连接器130)。图5F施主了切割之后完成的芯片封装件100。
根据此处描述的各个实施例,可以提供芯片封装件。该芯片封装件可以包括管芯、位于管芯上方的再分布结构以及位于再分布结构上方的凸块下金属(UBM)结构。UBM结构可以包括中心部分、与中心部分物理分隔开并且围绕中心部分的周界的外围部分以及具有第一端和与第一端相对的第二端的桥接部分。该桥接部分的第一端可以连接至UBM结构的中心部分,而桥接部分的第二端可以连接至UBM结构的外围部分。
在上述芯片封装件中,还包括:聚合物层,包封所述凸块下金属结构的所述外围部分,其中,所述聚合物层的侧壁与所述凸块下金属结构的所述中心部分的侧壁分隔开。
在上述芯片封装件中,还包括:聚合物层,包封所述凸块下金属结构的所述外围部分,其中,所述聚合物层的侧壁与所述凸块下金属结构的所述中心部分的侧壁分隔开,所述聚合物层的所述侧壁和所述凸块下金属结构的所述中心部分的所述侧壁分隔开的距离在从2微米至50微米的范围内。
在上述芯片封装件中,还包括:聚合物层,包封所述凸块下金属结构的所述外围部分,其中,所述聚合物层的侧壁与所述凸块下金属结构的所述中心部分的侧壁分隔开,空气间隙设置在所述聚合物层的所述侧壁和所述凸块下金属结构的所述中心部分的所述侧壁之间。
在上述芯片封装件中,还包括:模塑料,至少横向包封所述管芯;以及一个或多个第一导电通孔,延伸穿过所述模塑料。
在上述芯片封装件中,还包括:模塑料,至少横向包封所述管芯;以及一个或多个第一导电通孔,延伸穿过所述模塑料,其中,所述再分布结构在所述一个或多个第一导电通孔上方和所述模塑料上方横向延伸。
在上述芯片封装件中,其中,所述再分布结构横向越过所述管芯的边缘延伸。
在上述芯片封装件中,还包括:外部连接器,设置在所述凸块下金属结构的所述中心部分上方。
根据此处描述的各个实施例,可以提供芯片封装件。该芯片封装件可以包括管芯、围绕管芯的模塑料以及位于管芯和模塑料的第一表面上方的多层级再分布层(RDL)。该芯片封装件还可以包括位于多层级RDL上方并且电连接至多层级RDL的凸块下金属(UBM)结构,其中,UBM结构具有焊盘区域和与焊盘区域横向分隔开并且围绕焊盘区域的周界的外围部分。该芯片封装件还可以包括位于UBM结构的焊盘区域上方的外部连接器。
在上述芯片封装件中,其中,所述凸块下金属结构还包括桥接部分,所述桥接部分从所述焊盘区域的侧壁延伸至所述凸块下金属结构的所述外围部分。
在上述芯片封装件中,其中,所述凸块下金属结构还包括桥接部分,所述桥接部分从所述焊盘区域的侧壁延伸至所述凸块下金属结构的所述外围部分,所述桥接部分包括沿着所述凸块下金属结构的所述焊盘区域的所述周界每隔一定间隔形成的多个桥。
在上述芯片封装件中,还包括:聚合物材料,包封所述多层级再分布层的导电部件,所述聚合物材料具有覆盖所述凸块下金属结构的所述外围部分的部分,所述聚合物材料的所述部分与所述凸块下金属结构的所述焊盘区域物理分隔开。
在上述芯片封装件中,还包括一个或多个导电通孔,所述一个或多个导电通孔穿过所述模塑料从所述模塑料的所述第一表面延伸至与所述第一表面相对的所述模塑料的第二表面。
在上述芯片封装件中,其中,所述凸块下金属结构的所述焊盘区域包括导电网格。
根据此处描述的各个实施例,可以提供形成芯片封装件的方法。该方法可以包括:将管芯附接至载体;在管芯的侧壁周围形成模塑料;在管芯和模塑料上方形成包括多个再分布层(RDL)的再分布结构;在再分布结构的最顶RDL上方形成凸块下金属(UBM)结构,该UBM结构包括焊盘区域和与焊盘区域横向分隔开并且围绕焊盘区域的周界的外围部分;在UBM结构的焊盘区域上方形成外部连接器;并且去除载体。
在上述方法中,其中,形成所述凸块下金属结构包括光刻工艺、蚀刻工艺或电化学镀工艺的至少一种。
在上述方法中,其中将所述管芯附接至所述载体包括使用管芯附接膜将所述管芯的底面附接至所述载体的顶面。
在上述方法中,还包括在所述凸块下金属结构的所述外围部分上方形成聚合物材料以包封所述凸块下金属结构的所述外围部分。
在上述方法中,还包括在所述凸块下金属结构的所述外围部分上方形成聚合物材料以包封所述凸块下金属结构的所述外围部分,其中,所述聚合物材料与所述凸块下金属结构的所述焊盘区域横向分隔开。
在上述方法中,还包括在所述凸块下金属结构的所述外围部分上方形成聚合物材料以包封所述凸块下金属结构的所述外围部分,其中,空气间隙设置在所述聚合物材料的侧壁和所述凸块下金属结构的所述焊盘区域之间。
上面概述了若干实施例的特征,使得本领域人员可以更好地理解本发明的方面。本领域人员应该理解,他们可以容易地使用本发明作为基础来设计或修改用于实施与本人所介绍实施例相同的目的和/或实现相同优势的其他工艺和结构。本领域技术人员也应该意识到,这种等同构造并不背离本发明的精神和范围,并且在不背离本发明的精神和范围的情况下,本文中他们可以做出多种变化、替换以及改变。
Claims (10)
1.一种芯片封装件,包括:
管芯;以及
再分布结构,位于所述管芯上方;以及
凸块下金属(UBM)结构,位于所述再分布结构上方,所述凸块下金属结构包括中心部分、与所述中心部分物理分隔开并且围绕所述中心部分的周界的外围部分以及具有第一端和与所述第一端相对的第二端的桥接部分,所述桥接部分的所述第一端连接至所述凸块下金属结构的所述中心部分,所述桥接部分的所述第二端连接至所述凸块下金属结构的所述外围部分。
2.根据权利要求1所述的芯片封装件,还包括:聚合物层,包封所述凸块下金属结构的所述外围部分,其中,所述聚合物层的侧壁与所述凸块下金属结构的所述中心部分的侧壁分隔开。
3.根据权利要求2所述的芯片封装件,其中,所述聚合物层的所述侧壁和所述凸块下金属结构的所述中心部分的所述侧壁分隔开的距离在从2微米至50微米的范围内。
4.根据权利要求2所述的芯片封装件,其中,空气间隙设置在所述聚合物层的所述侧壁和所述凸块下金属结构的所述中心部分的所述侧壁之间。
5.根据权利要求1所述的芯片封装件,还包括:
模塑料,至少横向包封所述管芯;以及
一个或多个第一导电通孔,延伸穿过所述模塑料。
6.根据权利要求5所述的芯片封装件,其中,所述再分布结构在所述一个或多个第一导电通孔上方和所述模塑料上方横向延伸。
7.根据权利要求1所述的芯片封装件,其中,所述再分布结构横向越过所述管芯的边缘延伸。
8.根据权利要求1所述的芯片封装件,还包括:
外部连接器,设置在所述凸块下金属结构的所述中心部分上方。
9.一种芯片封装件,包括:
管芯;
模塑料,围绕所述管芯;
多层级再分布层(RDL),位于所述管芯上方和所述模塑料的第一表面上方;
凸块下金属(UBM)结构,位于所述多层级再分布层上方并且电连接至所述多层级再分布层,其中,所述凸块下金属结构包括焊盘区域以及与所述焊盘区域横向分隔开并且围绕所述焊盘区域的周界的外围部分;以及
外部连接器,位于所述凸块下金属结构的所述焊盘区域上方。
10.一种用于制造芯片封装件的方法,所述方法包括:
将管芯附接至载体;
在所述管芯的侧壁周围形成模塑料;
在所述管芯和所述模塑料上方形成包括多个再分布层(RDL)的再分布结构;
在所述再分布结构的最顶再分布层上方形成凸块下金属(UBM)结构,所述凸块下金属结构包括焊盘区域以及与所述焊盘区域横向分隔开并且围绕所述焊盘区域的周界的外围部分;
在所述凸块下金属结构的所述焊盘区域上方形成外部连接器;以及
去除所述载体。
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