CN106707740A - Design method for digital power loop compensator based on integral separation PID - Google Patents
Design method for digital power loop compensator based on integral separation PID Download PDFInfo
- Publication number
- CN106707740A CN106707740A CN201710137884.9A CN201710137884A CN106707740A CN 106707740 A CN106707740 A CN 106707740A CN 201710137884 A CN201710137884 A CN 201710137884A CN 106707740 A CN106707740 A CN 106707740A
- Authority
- CN
- China
- Prior art keywords
- digital power
- pid
- compensator
- power system
- transmission function
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000013461 design Methods 0.000 title claims abstract description 16
- 238000000926 separation method Methods 0.000 title claims abstract description 12
- 238000010586 diagram Methods 0.000 claims abstract description 19
- 230000005540 biological transmission Effects 0.000 claims description 22
- 230000005611 electricity Effects 0.000 claims description 7
- 230000010354 integration Effects 0.000 claims description 7
- 230000009897 systematic effect Effects 0.000 claims description 7
- 230000014509 gene expression Effects 0.000 claims description 6
- 238000011426 transformation method Methods 0.000 claims 1
- 230000001105 regulatory effect Effects 0.000 abstract 2
- 230000006641 stabilisation Effects 0.000 description 3
- 238000011105 stabilization Methods 0.000 description 3
- 238000005457 optimization Methods 0.000 description 2
- 230000036632 reaction speed Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000013475 authorization Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B11/00—Automatic controllers
- G05B11/01—Automatic controllers electric
- G05B11/36—Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential
- G05B11/42—Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential for obtaining a characteristic which is both proportional and time-dependent, e.g. P. I., P. I. D.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Supply And Distribution Of Alternating Current (AREA)
Abstract
The invention provides a design method for a digital power loop compensator based on integral separation PID. The invention aims to acquire a digital power system with small overshoot and short regulating time. The method comprises the following steps: 1) establishing a continuous region mathematic model with a digital power topological structure; 2) drawing a bode diagram of the continuous region mathematic model, and compensating the digital power system with a phase margin less than a design standard phase margin of the digital power system in the bode diagram of the continuous region mathematic model; 3) adopting a PID algorithm for compensating the digital power system, thereby acquiring a transfer function of a PID compensator; 4) discretizing the transfer function of the PID compensator; and 5) adopting an integral separation algorithm for separating the discretized transfer function of the PID compensator, thereby acquiring the integral separation PID compensator. The digital power system adopting the loop compensator based on integral separation PID has small overshoot and short regulating time and can be applied to a power adapter of portable electronic products.
Description
Technical field
The invention belongs to power supply technical field, it is related to a kind of method for designing of digital power loop compensator, specifically
It is related to a kind of method for designing of the digital power loop compensator based on integral separating PID, can be used for portable type electronic product electricity
Source adapter.
Background technology
The control mode of general power supply is divided into simulation and controls and digital control, and the power supply of analog control mode is referred to as simulation electricity
Source, the power supply of digital control approach is referred to as digital power.With the development of power management class chip, numerically controlled Power Management Design
Have become current designer trends.Generally comprised in digital power output feedback circuit, analog-digital converter, digital compensator and
Pulse modulated circuit circuit.There is closed-loop in digital power system, then existence and stability problem, when digital display circuit is unstable
When, then need to use compensator to compensate digital power-supply system phase margin, make digital power system stabilization.Compensator is
The core of digital power, its function is the stabilization for ensureing whole digital power system.Compensator is ratio, integration and differential
Three kinds of combinations of control mode, that is, PID control, wherein ratio control mode can improve the stable state accuracy of system, accelerate
Response speed;Differential control mode can improve the response speed of system;Integration control mode can eliminate or reduce system
Steady-state error, but because integration is by eliminating steady-state error to the accumulation of error, so can drop the reaction speed of system
It is low, cause digital power adjustment time long and overshoot is big, directly affect the stabilization and dynamic property of whole digital power output.
The method for designing of conventional digital compensator is divided into direct method and indirect method, and direct method is directly set up loop discrete
Domain Mathematical Modeling, draws the Bode diagram of Mathematical Modeling, by judging the phase margin in Bode diagram, determines whether system needs to mend
Repay, such as need compensation, then by adding pid control algorithm in the loop, reach the phase margin requirement of system, then can be based on
The compensator of pid algorithm.
Indirect method and direct method difference are that indirect method is to set up the continuous domain Mathematical Modeling of digital power, are then adopted
Digital power-supply system is compensated with pid control algorithm, obtains continuous domain compensator, finally digitize continuous domain compensator
Obtain digital compensator.Indirect method carries out digital display circuit compensation using pid control algorithm, digital power system after its compensation
The middle margin of error than it is larger when, due to the effect of integration control in pid control algorithm, the reaction speed of system can be made slack-off, cause
The overshoot of digital power system is big and adjustment time is long, and for this problem, research staff proposes different PID controls and calculates
The optimization method of method parameter, it is therefore intended that reduce the overshoot and adjustment time of system, such as Authorization Notice No. CN202189240
U, the Chinese patent of entitled " a kind of PID control device of parameter optimization ", discloses a kind of PID controller, and it uses chaos
Optimized algorithm is optimized to pid control parameter, although the overshoot and adjustment time of system can be made to diminish, but its not from
Fundamentally solve when the margin of error of system is larger, because integral action causes the overshoot that system is exported big and adjustment time change
Problem long.
The content of the invention
Present invention aim to overcome that the defect that above-mentioned prior art is present, it is proposed that a kind of based on integral separating PID
The method for designing of digital power loop compensator, it is intended to obtain that overshoot is small and the short digital power system of adjustment time.
Technical thought of the invention:By setting up digital power system topology continuous domain Mathematical Modeling, draw continuous
The Bode diagram of domain Mathematical Modeling, the then phase margin in continuous domain Mathematical Modeling Bode diagram and digital power system design
The size of the phase margin of standard, to phase margin in continuous domain Mathematical Modeling Bode diagram than digital power system design criteria
The small digital power system of phase margin is compensated, and using pid algorithm, the phase margin to digital power-supply system is mended
Repay, obtain PID compensator transmission function, then on this basis, PID compensator is transferred function by into discretization, discrete
In the PID compensator of change, integral separation algorithm is introduced, obtain integral separating PID compensator.
According to above-mentioned technical thought, realize that the technical scheme that the object of the invention is taken comprises the following steps:
(1) adoption status space average method, set up digital power topological structure output signal and switch controlled signal it
Between continuous domain Mathematical Modeling Gvd(s);
(2) continuous domain Mathematical Modeling G is drawnvdS the Bode diagram of (), compares GvdDigital power system in the Bode diagram of (s)
The size of the phase margin of phase margin and digital power system design standard, to GvdS phase margin compares number in the Bode diagram of ()
The digital power system that the phase margin of word power system design standard is small is compensated;
(3) according to the phase margin of digital power system design criteria, digital power-supply system is compensated, obtains PID
The transmission function G of compensatorc(s):
(3a) builds digital power system in SISOTOOL;
(3b) uses pid control algorithm, adjusts the phase margin of digital power system, obtains the transmission letter of PID compensator
Number Gc(s);
(4) to the transmission function G of PID compensatorcS () carries out discretization, obtain the discretization transmission function of PID compensator
Gc(z);
(5) integral separation algorithm is used, to the discretization transmission function G of PID compensatorcZ () is separated, integrated
Separation PID compensator:The threshold value δ of setting digital power systematic error amount e (k);Real-time Error amount e according to digital power system
K () and the size of threshold value δ, determines the real-Time Compensation type of digital power system balance device, if e (k) >=δ, digital power system
System real-Time Compensation device is PD compensators;If e (k) < δ, digital power system real-time compensating device is PID compensator, is compensated by PD
Device and PID compensator composition integral separating PID compensator.
The present invention compared with prior art, with advantages below:
The present invention is due to during pid number power supply loop compensator is obtained, devising PID compensator transmission letter
After number, using integral separation algorithm, separation is transferred function by PID compensator, when the margin of error is big, cancel PID compensation
The integral action of device, is compensated using PD compensators;The margin of error hour, is compensated using PID compensator, final to obtain based on integration point
From PID compensator, the overshoot and adjustment time of system are improved.
Brief description of the drawings
Fig. 1 is of the invention to realize FB(flow block);
Fig. 2 is DC/DC topological structures schematic diagram of the invention;
Fig. 3 is continuous domain Mathematical Modeling G of the inventionvdThe Bode diagram of (s);
Fig. 4 is the Bode diagram of the digital power system after compensation of the invention.
Specific embodiment
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
Reference picture 1, the present invention comprises the following steps:
Step 1, adoption status space average method sets up digital power topological structure output signal and switch controlled signal
Between continuous domain Mathematical Modeling GvdS (), the digital power topological structure of the present embodiment uses DC/DC topological structures, realize step
Suddenly it is:
Step 1a, according to the operation principle of DC/DC topological structures, row write DC/DC topological structure state-space expressions:
As shown in Fig. 2 Vin (t) is input power, Q1 is switching tube to DC/DC topological structures, and D1 is diode, and L is electricity
Sense, C is electric capacity, and R is resistance, and V (t) is output voltage, and d is the control signal of switching tube, L=1uH, C=47uF, R=
0.6ohm, Vin=2.7~6V, output voltage 1.8V, output current 3A, switching frequency 1.5MHz.The working condition of Fig. 2 is as follows:
Working condition 1:When d is high level, Q1 is opened, and D1 shut-offs, DC/DC topological structures working condition can use equation
Formula is expressed as:
Working condition 2:When d is low level, Q1 shut-offs, D1 is opened, and input power Vin (t) stops being powered for circuit, this
When DC/DC topological structures working condition can be expressed as with equation:
In low-frequency time-domain, ignore the ripple influence in circuit, working condition 1 and working condition 2 can be merged into:
According to<5>With<6>Expression formula, row write out state-space expression:
Step 1b, to digital power supply topologies state-space expression<7>Laplace transform is carried out, digital electricity is obtained
Continuous domain Mathematical Modeling G between source topological structure output signal and switch controlled signalvd(s):
By the parameter substitution formula of DC/DC topological structures<8>, obtain continuous domain Mathematical Modeling Gvd(s):
Step 2, draws continuous domain Mathematical Modeling GvdThe Bode diagram of (s):Use MATLAB Software on Drawing continuous domain numeral mould
Type GvdS as shown in figure 3, transverse axis represents frequency in figure, the upper half figure longitudinal axis represents amplitude, and the lower half figure longitudinal axis represents phase for the Bode diagram of ()
Position, as can be seen from the figure the phase margin of digital power system is 10 degree, its phase for being less than digital power system design criteria
45 degree of the nargin in position, then carry out the compensation of digital power system;
Step 3, according to the phase margin of digital power system design criteria, compensates to digital power-supply system, obtains
The transmission function G of PID compensatorc(s):
Step 3a, builds digital power system in SISOTOOL;
Step 3b, using pid control algorithm, adjusts the phase margin of digital power system, obtains the transmission of PID compensator
Function Gc(s):
Fig. 4 is the Bode diagram of the digital power system after compensation, and transverse axis represents frequency in figure, and the upper half figure longitudinal axis represents width
Value, the lower half figure longitudinal axis represents phase, and the phase margin of digital power system is 50.9 degree after as can be seen from the figure compensating, and its is big
In the phase margin of digital power system design criteria.
Step 4, to the transmission function G of PID compensatorcS () carries out discretization, obtain the discretization transmission of PID compensator
Function Gc(z):By MATLAB softwares, using zero pole point matching method to the transmission function G of PID compensatorcS () carries out discretization,
Obtain the discretization transmission function G of PID compensatorc(z):
Step 5, using integral separation algorithm, to the discretization transmission function G of PID compensatorcZ () is separated, obtain
Integral separating PID compensator:The discretization transmission function G comprising PID compensator is built in SimulinkcThe numeral electricity of (z)
Origin system, gives the different threshold values of digital power systematic error amount e (k), and digital power-supply system is emulated, and chooses numeral electricity
The threshold value when overshoot and adjustment time minimum of origin system output, the threshold value δ for obtaining digital power systematic error amount e (k) is
0.2;Real-time Error amount e (k) and the size of threshold value δ according to digital power system, determine the reality of digital power system balance device
When compensate type, if e (k) >=δ, cancel PID compensator in integration control, then digital power system real-time compensating device be PD mend
Repay device;If e (k) < δ, vary without PID compensator, then digital power system real-time compensating device is PID compensator, so PD is mended
The proportional control factor for repaying device is identical with the proportional control factor of PID compensator, while both derivative control coefficients are also identical,
Integral separating PID compensator is constituted by PD compensators and PID compensator.
The above is only a preferred example of the invention, do not constitute any limitation of the invention, it is clear that of the invention
Under design, different changes can be carried out to it and is improved, but these are in the row of protection of the invention.
Claims (5)
1. a kind of method for designing of the digital power loop compensator based on integral separating PID, it is characterised in that including following step
Suddenly:
(1) adoption status space average method, sets up between digital power topological structure output signal and switch controlled signal
Continuous domain Mathematical Modeling Gvd(s);
(2) continuous domain Mathematical Modeling G is drawnvdS the Bode diagram of (), compares GvdThe phase of digital power system in the Bode diagram of (s)
The size of the phase margin of nargin and digital power system design standard, to GvdS phase margin is than numeral electricity in the Bode diagram of ()
The digital power system that the phase margin of origin system design standard is small is compensated;
(3) according to the phase margin of digital power system design criteria, digital power-supply system is compensated, obtains PID compensation
The transmission function G of devicec(s):
(3a) builds digital power system in SISOTOOL instruments;
(3b) uses pid control algorithm, adjusts the phase margin of digital power system, obtains the transmission function G of PID compensatorc
(s);
(4) to the transmission function G of PID compensatorcS () carries out discretization, obtain the discretization transmission function G of PID compensatorc
(z);
(5) integral separation algorithm is used, to the discretization transmission function G of PID compensatorcZ () is separated, obtain integration and separate
PID compensator:The threshold value δ of setting digital power systematic error amount e (k);According to Real-time Error amount e (k) of digital power system
With the size of threshold value δ, the real-Time Compensation type of digital power system balance device is determined, if e (k) >=δ, digital power system reality
When compensator be PD compensators;If e (k) < δ, digital power system real-time compensating device is PID compensator, by PD compensators and
PID compensator constitutes integral separating PID compensator.
2. the method for designing of the digital power loop compensator based on separated integrator PID algorithm according to claim 1, walks
Suddenly the continuous domain Mathematical Modeling G described in (1)vdS (), its establishment step is as follows:
(1a) opens up the operation principle for mending structure according to digital power, and row write digital power and open up benefit configuration state spatial expression;
(1b) opens up benefit configuration state spatial expression to digital power and carries out Laplace transform, obtains digital power topological structure
Continuous domain Mathematical Modeling G between output signal and switch controlled signalvd(s)。
3. the method for designing of the digital power loop compensator based on separated integrator PID algorithm according to claim 1, walks
Suddenly the transmission function G to PID compensator described in (4)cS () carries out discretization, near using zero pole point matching method, bilinearity
Seemingly, any one in backward difference converter technique, positive differential transformation method, impulse response not political reform and step response not political reform.
4. the method for designing of the digital power loop compensator based on separated integrator PID algorithm according to claim 1, walks
Suddenly the threshold value δ of setting digital power systematic error amount e (k) described in (5), its establishing method is:Built in Simulink
Discretization transmission function G comprising PID compensatorcZ the digital power system of (), gives digital power systematic error amount e (k)
Different threshold values, emulate to digital power-supply system, when choosing the overshoot and minimum adjustment time of digital power system output
Threshold value, obtain the threshold value δ of digital power systematic error amount e (k).
5. the method for designing of the digital power loop compensator based on separated integrator PID algorithm according to claim 1, walks
Suddenly PD compensators described in (5), its proportional control factor is identical with the proportional control factor of PID compensator, and its differential
Control coefrficient is identical with the derivative control coefficient of PID compensator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710137884.9A CN106707740A (en) | 2017-03-09 | 2017-03-09 | Design method for digital power loop compensator based on integral separation PID |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710137884.9A CN106707740A (en) | 2017-03-09 | 2017-03-09 | Design method for digital power loop compensator based on integral separation PID |
Publications (1)
Publication Number | Publication Date |
---|---|
CN106707740A true CN106707740A (en) | 2017-05-24 |
Family
ID=58918088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710137884.9A Pending CN106707740A (en) | 2017-03-09 | 2017-03-09 | Design method for digital power loop compensator based on integral separation PID |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106707740A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109167519A (en) * | 2018-10-18 | 2019-01-08 | 哈尔滨理工大学 | A kind of inverse-excitation type switch power-supply digital loop compensator |
CN110412865A (en) * | 2019-09-02 | 2019-11-05 | 湖南工业大学 | PID-LSSVM stable state estimates dissolution of contaminated water oxygen control method |
CN110737196A (en) * | 2019-10-31 | 2020-01-31 | 中国电子科技集团公司第四十三研究所 | design method of digital power supply loop compensator based on PID α |
CN111177906A (en) * | 2019-12-19 | 2020-05-19 | 山东大学 | Method for accurately compensating discrete die profile |
CN112415897A (en) * | 2020-11-30 | 2021-02-26 | 北京罗克维尔斯科技有限公司 | Control system optimization method, device, system, vehicle, medium and equipment |
CN112994990A (en) * | 2021-05-20 | 2021-06-18 | 蚂蚁金服(杭州)网络技术有限公司 | Loop detection method and device, electronic equipment and storage medium |
CN115097899A (en) * | 2022-06-07 | 2022-09-23 | 北京大华无线电仪器有限责任公司 | High-response power waveform simulation method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002031951A2 (en) * | 2000-10-13 | 2002-04-18 | Primarion, Inc. | System and method for highly phased power regulation using adaptive compensation control |
US8036762B1 (en) * | 2007-05-09 | 2011-10-11 | Zilker Labs, Inc. | Adaptive compensation in digital power controllers |
CN104467470A (en) * | 2014-12-18 | 2015-03-25 | 东南大学 | Switching power supply digital PFM control mode implementation method |
CN104638899A (en) * | 2015-02-05 | 2015-05-20 | 东南大学 | Quick start digital power based on integral separation structure |
CN106054995A (en) * | 2016-07-04 | 2016-10-26 | 东南大学 | Constant current control system for continuous current mode (CCM) and discontinuous conduct mode (DCM) of primary-side feedback flyback power supply |
-
2017
- 2017-03-09 CN CN201710137884.9A patent/CN106707740A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002031951A2 (en) * | 2000-10-13 | 2002-04-18 | Primarion, Inc. | System and method for highly phased power regulation using adaptive compensation control |
US8036762B1 (en) * | 2007-05-09 | 2011-10-11 | Zilker Labs, Inc. | Adaptive compensation in digital power controllers |
CN104467470A (en) * | 2014-12-18 | 2015-03-25 | 东南大学 | Switching power supply digital PFM control mode implementation method |
CN104638899A (en) * | 2015-02-05 | 2015-05-20 | 东南大学 | Quick start digital power based on integral separation structure |
CN106054995A (en) * | 2016-07-04 | 2016-10-26 | 东南大学 | Constant current control system for continuous current mode (CCM) and discontinuous conduct mode (DCM) of primary-side feedback flyback power supply |
Non-Patent Citations (2)
Title |
---|
张浩: "基于FPGA的数字控制DC-DC变换器的研究与设计", 《HTTP://WWW.WANFANGDATA.COM.CN/DETAILS/DETAIL.DO?_TYPE=DEGREE&ID=D086136》 * |
沈建冬 等: "基于状态空间法的新型DC-DC变换器的建模研究", 《电源技术》 * |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109167519A (en) * | 2018-10-18 | 2019-01-08 | 哈尔滨理工大学 | A kind of inverse-excitation type switch power-supply digital loop compensator |
CN110412865A (en) * | 2019-09-02 | 2019-11-05 | 湖南工业大学 | PID-LSSVM stable state estimates dissolution of contaminated water oxygen control method |
CN110737196A (en) * | 2019-10-31 | 2020-01-31 | 中国电子科技集团公司第四十三研究所 | design method of digital power supply loop compensator based on PID α |
CN111177906A (en) * | 2019-12-19 | 2020-05-19 | 山东大学 | Method for accurately compensating discrete die profile |
CN112415897A (en) * | 2020-11-30 | 2021-02-26 | 北京罗克维尔斯科技有限公司 | Control system optimization method, device, system, vehicle, medium and equipment |
CN112994990A (en) * | 2021-05-20 | 2021-06-18 | 蚂蚁金服(杭州)网络技术有限公司 | Loop detection method and device, electronic equipment and storage medium |
CN115097899A (en) * | 2022-06-07 | 2022-09-23 | 北京大华无线电仪器有限责任公司 | High-response power waveform simulation method |
CN115097899B (en) * | 2022-06-07 | 2023-11-07 | 北京大华无线电仪器有限责任公司 | High-response power supply waveform simulation method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106707740A (en) | Design method for digital power loop compensator based on integral separation PID | |
CN107147283B (en) | A kind of Buck converter compensating control method based on disturbance observer and Second Order Sliding Mode | |
CN110518801B (en) | Small signal modeling method for double-active full-bridge converter under double phase-shift modulation | |
Morroni et al. | Adaptive tuning of switched-mode power supplies operating in discontinuous and continuous conduction modes | |
CN104753059B (en) | Droop control method of DC converter with function of secondary adjustment of adaptive impedance | |
CN108521219B (en) | Cascade DC-DC converter method for analyzing stability based on describing function method | |
CN109245532B (en) | Fractional order sliding mode control method of buck-boost converter | |
CN103138577A (en) | System and method of maintaining gain linearity of variable frequency modulator | |
CN104779779A (en) | Method for inhibiting temperature drift of switching power supply | |
CN108549238A (en) | Robust Variable gain control method based on polytope LPV system Buck converters | |
WO2017096376A1 (en) | Digital pre-compensation for voltage slewing in a power converter | |
CN104734504A (en) | DC-DC converter control method and system | |
CN113364292B (en) | Composite model prediction control method for staggered parallel type bidirectional DC-DC converter | |
CN106094508A (en) | The voltage compensator method for designing of digital control switch regulated power supply based on δ operator | |
CN110994985B (en) | Fast response filtering backstepping control method of switching power supply Buck converter | |
Montoya et al. | A sensorless inverse optimal control plus integral action to regulate the output voltage in a boost converter supplying an unknown dc load | |
CN113949265B (en) | Self-adaptive backstepping control method for Buck type converter with uncertain parameters | |
CN107768742A (en) | The managing device and management method of the power output of battery | |
CN106160473A (en) | A kind of dual signal frequency compensation dc-dc converter based on voltage mode | |
CN111641337A (en) | Robust control method and system of direct current buck converter and power converter | |
CN111965972B (en) | Energy storage backstepping control method based on disturbance observer | |
CN101349890A (en) | Method for inhibiting feed back control circuit instability and circuit thereof | |
Jing et al. | Improved small signal modeling and analysis of the PI controlled Boost converter | |
Gezgin | Predicting load transient response of output voltage in DC-DC converters | |
CN110768234B (en) | Peak filtering method for direct-current micro-grid system with uncertainty feed constant-power load |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170524 |
|
WD01 | Invention patent application deemed withdrawn after publication |