CN106653568A - Manufacturing method of low-interference inductance structure - Google Patents
Manufacturing method of low-interference inductance structure Download PDFInfo
- Publication number
- CN106653568A CN106653568A CN201611096995.1A CN201611096995A CN106653568A CN 106653568 A CN106653568 A CN 106653568A CN 201611096995 A CN201611096995 A CN 201611096995A CN 106653568 A CN106653568 A CN 106653568A
- Authority
- CN
- China
- Prior art keywords
- groove
- substrate
- induction structure
- manufacture method
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
Abstract
The present invention provides a manufacturing method of a low-interference inductance structure. The method includes the following steps that: a substrate is provided, and a trench is formed on the upper surface of the substrate; and a first inductance structure is formed at the bottom of the trench, wherein the first inductance structure includes a first intermediate electrode, a first edge electrode, a first inductance pattern, a first conductive through hole connected with the first intermediate electrode and the first inductance pattern, and a first slope connecting layer which is connected with the first edge electrode and the first inductance pattern, wherein the first edge electrode is located at the upper surface of the substrate, the first intermediate electrode is located at the lower surface of the substrate, and the first conductive through hole passes through the bottom of a trench isolation structure and the lower surface of the substrate.
Description
Technical field
The present invention relates to a kind of semiconductor devices, is espespecially related to a kind of manufacture method of low interference induction structure.
Background technology
The forming method of conventional induction structure, including：One substrate is provided；In one layer of oxidation of the substrate surface thermal oxide
Silicon；In the silica, one layer of layers of copper is formed on silica；The layers of copper is etched, inductive patterns are formed, is then drawn
Electrode.The induction structure that the method is formed, first, is unfavorable for blocking its electromagnetic interference, can affect the normal work of other devices；
Secondly, the substrate surface area that induction structure takes is larger, is unfavorable for that the device of densification is integrated, and multiple parallel inductance knots
Electromagnetic interference between structure is larger, easily crosstalk mutually.
The content of the invention
Based on solving the above problems, the invention provides a kind of manufacture method of low interference induction structure, including：
One substrate is provided, and a groove is formed in the upper surface of the substrate；
The first induction structure is formed in the channel bottom, first induction structure includes the first target, first edge
The first conductive through hole and company of electrode, the first inductive patterns, connection first target with first inductive patterns
Connect the first inclined-plane articulamentum of the first edge electrode and first inductive patterns；
Wherein, the first edge electrode is located at the upper surface of the substrate, and first target is located at the substrate
Lower surface, first conductive through hole runs through the bottom of the groove and the lower surface of the substrate.
Embodiments in accordance with the present invention, are additionally included in the channel bottom and deposit a layer insulating with side.
Embodiments in accordance with the present invention, first inclined-plane articulamentum and the first inductive patterns are respectively positioned on the insulating barrier
On.
Embodiments in accordance with the present invention, the first conductive through hole forming method is specifically included：By the side of laser drill
Formula forms the through hole of the bottom of groove isolation construction described in insertion and the lower surface of the substrate, and described with conductive materials filling
Through hole.
Embodiments in accordance with the present invention, also include filling the groove, to form groove isolation construction, institute with isolated material
State the upper surface of the upper surface higher than the substrate of groove isolation construction.
Embodiments in accordance with the present invention, are additionally included in one groove of formation in the groove isolation construction, and described recessed
The second inductive patterns and the second inclined-plane articulamentum are formed in groove, and the second side is formed in the upper surface of the groove isolation construction
Edge electrode, second inductive patterns, the second inclined-plane articulamentum are integrally formed and are electrically connected to each other with the second edge electrode.
Embodiments in accordance with the present invention, be additionally included in the groove fill isolated material until formed with the groove every
From the top surface of the upper surface flush of structure.
Embodiments in accordance with the present invention, be additionally included in the isolated material in the groove formed the second conductive through hole and
The second target is formed on the top surface.
Technical scheme, using induction structure is arranged in groove isolation construction, saves the occupancy face of substrate surface
Product, and the isolated material using groove isolation construction carries out being mutually isolated for multiple fuse-wires structures, it is simple；Additionally, two
Induction structure is formed in isolation structure, is reduced it and is interfered, it is also possible to be effectively prevented from its interference to other devices.
Description of the drawings
Fig. 1 is the profile of the low interference induction structure of the present invention；
Fig. 2 is the top view of the low interference induction structure of the present invention；
The schematic flow sheet of the manufacture method of the low interference induction structure of Fig. 3-8 present invention.
Specific embodiment
Referring to Fig. 1 and 2, the invention provides a kind of low interference induction structure, including：
Substrate 1；
In the groove isolation construction 2 of the upper surface of the substrate 1, the top surface of the groove isolation construction 2 is upper higher than the substrate 1
Surface；
Positioned at the first induction structure of the bottom of the groove isolation construction 2, first induction structure includes the first target
9a, first edge electrode 7a, the first inductive patterns 5a, connection the first target 9a and first inductive patterns 5a
The first inclined-plane articulamentum of the first conductive through hole 8a and the connection first edge electrode 7a and first inductive patterns 5a
6a；Wherein, the first edge electrode 7a is located at the upper surface of the substrate 1, and the first target 9a is located at the lining
The lower surface at bottom 1, the first conductive through hole 8a runs through the bottom of the groove isolation construction 2 and the lower surface of the substrate 1.
Wherein, also there is a layer insulating 3 in the bottom of the groove isolation construction 2 and side.Institute's groove isolation construction 2 is wrapped
Include the isolated material of filling, preferably silica.
Additionally, the second inductance knot being additionally included in the top position of the first induction structure in the groove isolation construction 2
Structure.For example, groove 4 can be formed in groove isolation construction 2, in its bottom and side second induction structure is formed.Institute
The second induction structure is stated including in the second target 9b, second edge electrode 7b, the second inductive patterns 5b, connection described second
Between electrode 9b and the second conductive through hole 8b of second inductive patterns 5b and be connected the second edge electrode 7b with it is described
Second inclined-plane articulamentum 6b of the second inductive patterns 5b；Wherein, the second edge electrode 7b is located at the groove isolation construction 2
Upper surface, the second target 9b is located at the upper surface of the groove isolation construction 2, and the second conductive through hole 8b passes through
Wear a part for the groove isolation construction 2（The depth of groove 4）And expose from the upper surface of the groove isolation construction 2.Its
In, first inductive patterns 5a are located at the depth of the groove isolation construction 2 and are located at institute more than second inductive patterns 5b
State the depth of groove isolation construction 2.
Its specific manufacture method can be found in Fig. 3-8, comprise the following steps：
（1）Referring to Fig. 3, there is provided a substrate 1, and a groove 8 is formed in the upper surface of the substrate 1；
（2）Referring to Fig. 4, in the bottom of the groove 8 and side a layer insulating 3 is deposited；
（3）Referring to Fig. 5, the first induction structure is formed in the bottom of the groove 8, first induction structure includes electricity in the middle of first
Pole 9a, first edge electrode 7a, the first inductive patterns 5a, connection the first target 9a and first inductive patterns 5a
The first conductive through hole 8a and connect the first edge electrode 7a and be connected with the first inclined-plane of first inductive patterns 5a
Layer 6a；Wherein, the first edge electrode 7a is located at the upper surface of the substrate 1, and the first target 9a is located at described
The lower surface of substrate 1, the first conductive through hole 8a runs through the bottom of the groove isolation construction 2 and the following table of the substrate 1
Face.The first conductive through hole 8a forming methods are specifically included：Trench isolations described in insertion are formed by way of laser drill
The through hole of the bottom of structure 2 and the lower surface of the substrate, and fill the through hole with conductive materials.Also, described first is oblique
Face articulamentum 6a and the first inductive patterns 5a are respectively positioned on the insulating barrier 3；
（4）Referring to Fig. 6, the groove 8 is filled with isolated material, to form groove isolation construction 2, the groove isolation construction 2
Upper surface higher than the substrate 1 upper surface；And in the groove isolation construction 2 formed a groove 10；
（5）Referring to Fig. 7, and the second inductive patterns 5b and the second inclined-plane articulamentum 6b are formed in the groove 10, and in institute
The upper surface for stating groove isolation construction 2 forms second edge electrode 7b, second inductive patterns 5b, the second inclined-plane articulamentum 6b
It is integrally formed and is electrically connected to each other with the second edge electrode 7b.
（6）Referring to Fig. 8, isolated material is filled in the groove 10 until forming the upper table with the groove isolation construction
The top surface that face flushes, then, forms the second conductive through hole 8b and in the top surface in the isolated material in the groove 10
The second target 9b of upper formation.
Finally it should be noted that：Obviously, above-described embodiment is only intended to clearly illustrate example of the present invention, and and
The non-restriction to embodiment.For those of ordinary skill in the field, can also do on the basis of the above description
Go out the change or variation of other multi-forms.There is no need to be exhaustive to all of embodiment.And thus drawn
Obvious change that Shen goes out or among changing still in protection scope of the present invention.
Claims (8)
1. it is a kind of it is low interference induction structure manufacture method, including：
One substrate is provided, and a groove is formed in the upper surface of the substrate；
The first induction structure is formed in the channel bottom, first induction structure includes the first target, first edge
The first conductive through hole and company of electrode, the first inductive patterns, connection first target with first inductive patterns
Connect the first inclined-plane articulamentum of the first edge electrode and first inductive patterns；
Wherein, the first edge electrode is located at the upper surface of the substrate, and first target is located at the substrate
Lower surface, first conductive through hole runs through the bottom of the groove and the lower surface of the substrate.
2. it is according to claim 1 it is low interference induction structure manufacture method, it is characterised in that be additionally included in the groove
Bottom deposits a layer insulating with side.
3. the manufacture method of low interference induction structure according to claim 2, it is characterised in that first inclined-plane connection
Layer and the first inductive patterns are respectively positioned on the insulating barrier.
4. it is according to claim 1 it is low interference induction structure manufacture method, it is characterised in that first conductive through hole
Forming method is specifically included：Bottom and the lower surface of the substrate of groove described in insertion are formed by way of laser drill
Through hole, and fill the through hole with conductive materials.
5. it is according to claim 1 it is low interference induction structure manufacture method, it is characterised in that also include using isolated material
The groove is filled, to form groove isolation construction, the upper surface of the groove isolation construction is higher than the upper surface of the substrate.
6. it is according to claim 5 it is low interference induction structure manufacture method, it is characterised in that be additionally included in the groove
A groove is formed in isolation structure, and the second inductive patterns and the second inclined-plane articulamentum, Yi Ji are formed in the groove
The upper surface of the groove isolation construction forms second edge electrode, second inductive patterns, the second inclined-plane articulamentum and institute
State second edge electrode to be integrally formed and be electrically connected to each other.
7. it is according to claim 6 it is low interference induction structure manufacture method, it is characterised in that be additionally included in the groove
Middle filling isolated material is until form the top surface with the upper surface flush of the groove isolation construction.
8. it is according to claim 7 it is low interference induction structure manufacture method, it is characterised in that be additionally included in the groove
In isolated material in form the second conductive through hole and form the second target on the top surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611096995.1A CN106653568B (en) | 2016-12-02 | 2016-12-02 | A kind of manufacturing method of low interference induction structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611096995.1A CN106653568B (en) | 2016-12-02 | 2016-12-02 | A kind of manufacturing method of low interference induction structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106653568A true CN106653568A (en) | 2017-05-10 |
| CN106653568B CN106653568B (en) | 2019-04-16 |
Family
ID=58814271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611096995.1A Active CN106653568B (en) | 2016-12-02 | 2016-12-02 | A kind of manufacturing method of low interference induction structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106653568B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1207826A (en) * | 1995-11-27 | 1999-02-10 | 松下电器产业株式会社 | Coiled component and its production method |
| JP2003142592A (en) * | 2001-06-15 | 2003-05-16 | Samsung Electronics Co Ltd | Transmitting/receiving passive element and its integrated module and manufacturing method thereof |
| CN1484838A (en) * | 2001-02-10 | 2004-03-24 | �Ҵ���˾ | High & inductor with faraday shield and dielectric well buried in substrate |
| US20080291603A1 (en) * | 2005-11-08 | 2008-11-27 | Nxp B.V. | Trench Capacitor Device Suitable for Decoupling Applications in High-Frequency Operation |
| CN103474417A (en) * | 2013-09-29 | 2013-12-25 | 中国科学院微电子研究所 | Three-dimensional interconnection structure and manufacturing method thereof |
-
2016
- 2016-12-02 CN CN201611096995.1A patent/CN106653568B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1207826A (en) * | 1995-11-27 | 1999-02-10 | 松下电器产业株式会社 | Coiled component and its production method |
| CN1484838A (en) * | 2001-02-10 | 2004-03-24 | �Ҵ���˾ | High & inductor with faraday shield and dielectric well buried in substrate |
| JP2003142592A (en) * | 2001-06-15 | 2003-05-16 | Samsung Electronics Co Ltd | Transmitting/receiving passive element and its integrated module and manufacturing method thereof |
| US20080291603A1 (en) * | 2005-11-08 | 2008-11-27 | Nxp B.V. | Trench Capacitor Device Suitable for Decoupling Applications in High-Frequency Operation |
| CN103474417A (en) * | 2013-09-29 | 2013-12-25 | 中国科学院微电子研究所 | Three-dimensional interconnection structure and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106653568B (en) | 2019-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103579092B (en) | Semiconductor devices and its manufacture method | |
| CN100452399C (en) | Integrated circuit structure | |
| CN106611745B (en) | Semiconductor storage and its manufacturing method | |
| CN109075164A (en) | 3 dimension capacitor arrangements | |
| JP2009518867A5 (en) | ||
| CN103730459B (en) | High pressure integrated capacitor and manufacture method thereof | |
| CN107564962A (en) | A kind of grooved MOSFET and preparation method thereof | |
| WO2009076661A3 (en) | Super-self-aligned contacts and method for making the same | |
| TW200945387A (en) | Capacitive devices and circuits | |
| CN102543729A (en) | Forming method of capacitor and capacitor structure thereof | |
| CN106653568A (en) | Manufacturing method of low-interference inductance structure | |
| CN106783019B (en) | A kind of low interference induction structure | |
| CN106449594B (en) | a kind of manufacturing method of programmable fuse structure | |
| CN106057779A (en) | Semiconductor device structure | |
| US10529707B2 (en) | Intra-metal capacitor and method of forming the same | |
| CN106571305A (en) | Semiconductor device with contact structures extending through an interlayer and method of manufacturing | |
| CN103531617B (en) | One kind has channel terminal structure Schottky device and preparation method thereof | |
| CN108666324A (en) | Memory construction and its manufacturing method | |
| CN101692455B (en) | SOI-based capacitor | |
| JP2009111036A (en) | Thin film transformer and its production process | |
| CN110301044A (en) | Semiconductor devices | |
| TWI456700B (en) | Three dimensional memory array adjacent to trench sidewalls and manufacturing method thereof | |
| CN209087832U (en) | Capacitor and system | |
| CN103094245A (en) | Integrated circuit device and method for establishing electrical conductor in integrated circuit device | |
| CN103619750B (en) | There is the wafer of the spacer structure including horizontal element |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20190318 Address after: 226600 No. 149 South Huanghe Road, Kunshan Development Zone, Suzhou City, Jiangsu Province Applicant after: Kunshan Narg Information Technology Co.,Ltd. Address before: 226300 window of science and technology, No. 266, New Century Avenue, Nantong hi tech Zone, Nantong, Jiangsu Applicant before: NANTONG WOTE OPTOELECTRONICS TECHNOLOGY CO.,LTD. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221209 Address after: No. 1, Ronghui Road, Zhoushi Town, Kunshan City, Suzhou City, Jiangsu Province, 213000 Patentee after: Meiye (Suzhou) New Energy Co.,Ltd. Address before: 226600 No. 149 South Huanghe Road, Kunshan Development Zone, Suzhou City, Jiangsu Province Patentee before: Kunshan Narg Information Technology Co.,Ltd. |