CN106504978A - A kind of CIS silicon slice processing methods for improving substrate metal capture ability - Google Patents
A kind of CIS silicon slice processing methods for improving substrate metal capture ability Download PDFInfo
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- CN106504978A CN106504978A CN201610902791.6A CN201610902791A CN106504978A CN 106504978 A CN106504978 A CN 106504978A CN 201610902791 A CN201610902791 A CN 201610902791A CN 106504978 A CN106504978 A CN 106504978A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 65
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 58
- 239000010703 silicon Substances 0.000 title claims abstract description 58
- 239000000758 substrate Substances 0.000 title claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 23
- 238000003672 processing method Methods 0.000 title claims abstract description 15
- 239000002184 metal Substances 0.000 title claims abstract description 13
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 22
- 238000002347 injection Methods 0.000 claims abstract description 17
- 239000007924 injection Substances 0.000 claims abstract description 17
- 230000007547 defect Effects 0.000 claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 230000003647 oxidation Effects 0.000 claims abstract description 9
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 7
- 125000004432 carbon atom Chemical group C* 0.000 claims abstract 5
- 238000000034 method Methods 0.000 abstract description 23
- 150000001721 carbon Chemical group 0.000 description 14
- 230000008569 process Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- KPSZQYZCNSCYGG-UHFFFAOYSA-N [B].[B] Chemical compound [B].[B] KPSZQYZCNSCYGG-UHFFFAOYSA-N 0.000 description 1
- QVMHUALAQYRRBM-UHFFFAOYSA-N [P].[P] Chemical compound [P].[P] QVMHUALAQYRRBM-UHFFFAOYSA-N 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
A kind of CIS silicon slice processing methods for improving substrate metal capture ability, which includes：Bulk silicon substrate is provided, and deposit low-temperature oxidation film in the back side is completed at the bulk silicon substrate back side according to existing CIS products piece manufacture craft；On the basis of low-temperature oxidation film back of the body envelope is completed, the injection piece manufacturing process of carbon atom is carried out in the bulk silicon substrate front, the method as silicon substrate defect concentration is increased increases the capture ability to metallic element；The growth of EPI epitaxial layers is carried out in the front of the Semiconductor substrate, product piece manufacturing process is completed.
Description
Technical field
The present invention relates to the semiconductor product silicon chip technique in IC manufacturing field, is particularly relevant to CIS projects heavily doped
Miscellaneous silicon substrate, more particularly to a kind of CIS silicon slice processing methods for improving substrate metal capture ability.
Background technology
Cmos image sensor (Complementary Metal Oxide
Semiconductor Image Sensor, abbreviation CMOS CIS), it is a kind of typical solid state image sensor, which has electricity
The performance of lotus coupling element (Charge-coupled Device, abbreviation CCD) imageing sensor, can enter the application domain of CCD,
And used as a kind of newborn semiconductor devices, CMOS is to show great advantage and potentiality the characteristics of its own, this latent
Power will be further played in future soon.
Cmos image sensor is generally turned by image-sensitive cell array, line driver, row driver, time sequence control logic, AD
Several parts such as parallel operation, data/address bus output interface, control interface constitute this several part and are generally all integrated on same silicon chip.
Its course of work generally can be divided into reset, opto-electronic conversion, integration, several parts of reading.
Fig. 1 is referred to, Fig. 1 uses product piece schematic diagram by 12 cun of CIS projects of current industry；As illustrated, from lower to
On include low temperature oxide layer LTO films, silicon substrate BUCK and epitaxial layer EPI successively.Fig. 2 is referred to, Fig. 2 is 12 in prior art
Very little CIS projects doping content schematic diagram；As illustrated, from figure two curves (one is that phosphorus phosphorus doping is dense above
Write music line, below one be boron boron doping content curves) as can be seen that resistance is higher, doping content is just low.Refer to figure
3, Fig. 3 is 12 cun of CIS project silicon volume defect density schematic diagrames in prior art.
At present, CMOS Image sensor device products silicon chip is using substrate (the about 0.01ohm resistances of high-concentration dopant
Value substrate, doping content is 1019cm3), for improving substrate silicon volume defect density, strengthen capture of the silicon substrate to metallic pollution
Ability, eventually through the white point expressive ability that the method carrys out boost device, while improve the grinding rate of its substrate, and optimizer
The situation of part white point is simultaneously easy to the processing and manufacturing of back segment back-illuminated type BSI sensor process.However, existing Defect density is main
The control of its density is realized by the temperature of crystal pulling technique, speed, and its control has limitation to a great extent, while leading
Silicon volume defect density is caused also to there is limitation in metallic element.
If improving silicon volume defect density from crystal pulling temperature and rotating speed merely, largely the resistance and phase of silicon substrate
Close characteristic to change, and excessive silicon volume defect density under high-temperature situation can to a certain degree causing to damage to silicon chip,
This will produce the problem of dislocation in follow-up device manufacturing processes.
As existing CIS products using highly doped silicon substrate and carry on the back envelope LTO films, but produced by existing crystal pulling technique
Silicon volume defect density there is significant limitation, and the temperature of corresponding crystal pulling process, rotating speed can bring the quality of silicon chip simultaneously
Change.
Content of the invention
In order to overcome problem above, the present invention is intended to provide a kind of CIS silicon chips for improving substrate metal capture ability
Processing method, which is by being used for improving capture energy of the silicon substrate to metallic pollution using the method that carbon atom injects to CIS silicon chips
Power, being finally reached improves the purpose of CIS product white points.Present invention is primarily intended to increasing silicon substrate by new handing technique
Defect concentration mode, lifted capture ability of the silicon substrate to metallic element.
For achieving the above object, technical scheme is as follows：
The present invention provides a kind of CIS silicon slice processing methods for improving substrate metal capture ability, and which includes：
Step S1：Bulk silicon substrate is provided, and work is made at the bulk silicon substrate back side according to existing CIS products piece
Skill completes back side deposit low-temperature oxidation film；
Step S2：On the basis of low-temperature oxidation film back of the body envelope is completed, carbon atom is carried out in the bulk silicon substrate front
Injection piece manufacturing process, the method as silicon substrate defect concentration is increased increases capture ability to metallic element；
Step S3：The growth of EPI epitaxial layers is carried out in the front of the Semiconductor substrate, product piece manufacturing process is completed.
Preferably, in the step 2, the span of the metering of carbon atom injection is 1E10～IE16.
Preferably, in the step 2, the energy span of carbon atom injection is 0.2Kev～250Kev.
Preferably, in the step 2, the depth of carbon atom injection is 3～20 microns.
From above-mentioned technical proposal as can be seen that provided by the present invention for improve substrate metal capture ability CIS silicon chips
Processing method, its pass through the processing method for improving CIS product piece heavy doping substrates, 12 cun of in the industry cycle general CIS silicon chips back of the body envelopes
Add carbon atom injection on the basis of LTO films, for increasing silicon substrate defect concentration silicon substrate to be improved to metallic element
Capture ability, so that reach the effect for improving the performance of device white point.
Additionally, the present invention is likewise supplied with the effect of improvement for other heavily doped silicon chip techniques.
Description of the drawings
Fig. 1 uses product piece schematic diagram by 12 cun of CIS projects in prior art
Fig. 2 is 12 cun of CIS project doping content schematic diagrames in prior art
Fig. 3 is 12 cun of CIS project silicon volume defect density schematic diagrames in prior art
Fig. 4 is that the flow process of the CIS silicon slice processing methods in the embodiment of the present invention for improving substrate metal capture ability is shown
It is intended to
Fig. 5 is the product generalized section after completing step S1 in the embodiment of the present invention
Fig. 6 is the product generalized section after completing step S2 in the embodiment of the present invention
Fig. 7 is the product generalized section after completing step S3 in the embodiment of the present invention
Fig. 8 is that effect compares schematic diagram after the completion of existing process condition and new handling process
Specific embodiment
Embody feature of present invention to be described in the explanation of back segment in detail with the embodiment of advantage.It should be understood that of the invention
Can have various changes in different examples, which neither departs from the scope of the present invention, and therein explanation and be shown in
Substantially regard purposes of discussion, and be not used to limit the present invention.
Below in conjunction with the accompanying drawings the specific embodiment of the present invention is described in detail.
Fig. 4 is referred to, Fig. 4 is the CIS silicon chips process side for being used for improving substrate metal capture ability in the embodiment of the present invention
The schematic flow sheet of method, as illustrated, the forming step of the method can include：
Step S1：Bulk silicon substrate is provided, complete according to existing CIS products piece manufacture craft at the bulk silicon substrate back side
Low-temperature oxidation film is deposited into the back side.Specifically, as shown in figure 5, the bulk silicon substrate BUCK in figure is silicon materials.
Now, on bulk silicon substrate BUCK, cmos image sensor fundamental technology has been completed, that is to say, that
The formation of the heavy doping substrate of cmos image sensor.Also, it is low also to complete the back side deposit of cmos image sensor
Warm oxide-film.In the present embodiment, the step can adopt any means of the prior art at the bulk silicon substrate back side
Low-temperature oxidation film.
Step S2：On the basis of above-mentioned low-temperature oxidation film back of the body envelope is completed, carbon is carried out in bulk silicon substrate BUCK fronts
The injection piece manufacturing process of atom, the step can increase silicon substrate defect concentration, increase the capture ability to metallic element, are
One of key point of the present invention.
Fig. 6 is referred to, and Fig. 6 is the product generalized section after step S2 is completed in the embodiment of the present invention.
Specifically, the technique of carbon atom injection can adopt any method of the prior art, by improving CIS product pieces
The processing method of heavy doping substrate, for example, adds carbon on the basis of 12 cun of in the industry cycle general CIS silicon chips back of the body envelope LTO films former
Son injection, for increasing silicon substrate defect concentration to improve capture ability of the silicon substrate to metallic element.
The present invention similarly possesses the effect of improvement for other heavily doped silicon chip techniques, can pass through according to different
Heavily doped silicon chip technological requirement, changes the technological parameter of carbon atom injection, and these technological parameters can include Implantation of C Ion
Element combinations, ion implantation dosage, ion implantation energy and carbon ion implatation scope (depth that injects) etc..
In the present embodiment, in step 2, the span of the metering of carbon atom injection can be 1E10～IE16；Step 2
The energy span of middle carbon atom injection can be 0.2Kev～250Kev；In step 2, the depth of carbon atom injection is 3～20
Micron etc..
Step S3：The growth of EPI epitaxial layers is carried out in the front of Semiconductor substrate, product piece manufacturing process, such as Fig. 7 is completed
Shown.
Described on end, processing method of the present invention by improvement CIS product piece heavy doping substrates, in the industry cycle general 12 cun
Add carbon atom injection on the basis of CIS silicon chips back of the body envelope LTO films, for increasing silicon volume defect density, strengthen to metallic element
Capture ability, the white point expressive ability of improving product device, effect ratio after the completion of existing process condition and new handling process
As shown in Figure 8 to illustrating：
Compared with prior art, the new handling process primary focus are for traditional heavy doping product piece to carry out carbon
Atom injects, and carbon atom injects product sector-meeting and forms cluster in silicon substrate, can effectively increase the capture ability to metallic element, most
The white point expressive ability of the device that be effectively improved cmos image sensor has been reached eventually.
Above only embodiments of the invention, embodiment are simultaneously not used to the scope of patent protection for limiting the present invention, therefore
Every equivalent structure change that is made with specification of the invention and accompanying drawing content, should be included in the protection of the present invention in the same manner
In the range of.
Claims (4)
1. a kind of CIS silicon slice processing methods for improving substrate metal capture ability, it is characterised in that include：
Step S1：Bulk silicon substrate is provided, complete according to existing CIS products piece manufacture craft at the bulk silicon substrate back side
Low-temperature oxidation film is deposited into the back side；
Step S2：On the basis of low-temperature oxidation film back of the body envelope is completed, the note of carbon atom is carried out in the bulk silicon substrate front
Ru Pian manufacturing processes, increase silicon substrate defect concentration, to increase the capture ability to metallic element；
Step S3：The growth of EPI epitaxial layers is carried out in the front of the Semiconductor substrate, product piece manufacturing process is completed.
2. CIS silicon slice processing methods for improving substrate metal capture ability according to claim 1, its feature exist
In in the step 2, the span of the metering of carbon atom injection is 1E10～IE16.
3. CIS silicon slice processing methods for improving substrate metal capture ability according to claim 1, its feature exist
In in the step 2, the energy span of carbon atom injection is 0.2Kev～250Kev.
4. CIS silicon slice processing methods for improving substrate metal capture ability according to claim 1, its feature exist
In in the step 2, the depth of carbon atom injection is 3～20 microns.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610902791.6A CN106504978A (en) | 2016-10-17 | 2016-10-17 | A kind of CIS silicon slice processing methods for improving substrate metal capture ability |
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| CN201610902791.6A CN106504978A (en) | 2016-10-17 | 2016-10-17 | A kind of CIS silicon slice processing methods for improving substrate metal capture ability |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109192743A (en) * | 2018-09-04 | 2019-01-11 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040093279A (en) * | 2003-04-29 | 2004-11-05 | 매그나칩 반도체 유한회사 | Cmos image sensor with test pattern and test method |
| CN1828836A (en) * | 2005-02-07 | 2006-09-06 | 三星电子株式会社 | Epitaxial semiconductor substrate manufacturing method and semiconductor component production method |
| US20070069321A1 (en) * | 2005-09-28 | 2007-03-29 | Joon Hwang | CMOS image sensor and method for manufacturing the same |
| CN101728311A (en) * | 2008-10-10 | 2010-06-09 | 索尼株式会社 | SOI substrate and method for producing same, solid-state image pickup device and method for producing same, and image pickup apparatus |
| CN105826182A (en) * | 2016-05-25 | 2016-08-03 | 上海华力微电子有限公司 | Method of optimizing wafer edge defect of CMOS image sensor |
-
2016
- 2016-10-17 CN CN201610902791.6A patent/CN106504978A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040093279A (en) * | 2003-04-29 | 2004-11-05 | 매그나칩 반도체 유한회사 | Cmos image sensor with test pattern and test method |
| CN1828836A (en) * | 2005-02-07 | 2006-09-06 | 三星电子株式会社 | Epitaxial semiconductor substrate manufacturing method and semiconductor component production method |
| US20070069321A1 (en) * | 2005-09-28 | 2007-03-29 | Joon Hwang | CMOS image sensor and method for manufacturing the same |
| CN101728311A (en) * | 2008-10-10 | 2010-06-09 | 索尼株式会社 | SOI substrate and method for producing same, solid-state image pickup device and method for producing same, and image pickup apparatus |
| CN105826182A (en) * | 2016-05-25 | 2016-08-03 | 上海华力微电子有限公司 | Method of optimizing wafer edge defect of CMOS image sensor |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109192743A (en) * | 2018-09-04 | 2019-01-11 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
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Application publication date: 20170315 |