CN106300905B - Switch converter and control circuit thereof - Google Patents
Switch converter and control circuit thereof Download PDFInfo
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- CN106300905B CN106300905B CN201610684954.8A CN201610684954A CN106300905B CN 106300905 B CN106300905 B CN 106300905B CN 201610684954 A CN201610684954 A CN 201610684954A CN 106300905 B CN106300905 B CN 106300905B
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
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Abstract
A switching converter is disclosed. The switching converter comprises a boost or buck switching converter. The switching converter includes a control circuit. The control circuit includes a ramp generating circuit, an error amplifier, and a calibration circuit. The ramp generating circuit filters a square wave voltage at a switching node of the switching converter to generate a ramp signal. The calibration circuit filters the ramp signal to generate a calibration signal. The generated calibration signal can reduce the direct current working range of the error amplifier, thereby reducing the power consumption of the system. And because the calibration signal is formed by filtering the ramp signal, the circuit form is simple.
Description
Technical field
This disclosure relates to electronic circuit, more specifically, this disclosure relates to switch converters and its control circuit.
Background technique
It include output capacitor in the switch converters of constant on-time control, which can be equivalent to equivalent
The cascaded structure of resistance and ideal capacitance.When the equivalent series resistance impedance value of output capacitor is smaller, constant on-time
Control switch converter easily generates oscillation, and slope compensation circuit is needed to carry out systems stabilisation.However, slope compensation will introduce direct current
Error, prevent the output voltage of switch converters needs to introduce error amplifier from reaching preset value to eliminate the direct current and miss
Difference.However, the DC operation range of error amplifier is usually very wide, so that circuit power consumption is larger.Need to propose a kind of circuit with
Reduce the DC operation range of error amplifier.
Summary of the invention
One aspect according to an embodiment of the present invention proposes a kind of control circuit for switch converters.Switch becomes
Parallel operation includes buck converter or booster converter.Switch converters include switch.Switch converters have switching node and defeated
Egress.Switch converters receive input voltage and conducting and shutdown by switching convert input voltage at switching node
Square-wave voltage and output node at output voltage.Control circuit includes that slope generating circuit, calibration circuit, comparison are electric
Road, turn-on time generation circuit and logic circuit.Slope generating circuit has input terminal and output end.Slope generating circuit it is defeated
Enter end and is coupled to switching node.Slope generating circuit is filtered to generate in the output end of slope generating circuit square-wave voltage
Ramp signal.Calibration circuit is coupled to slope generating circuit to receive ramp signal, and ramp signal is filtered to generate
Calibration signal.Comparison circuit is coupled to slope generating circuit and calibration circuit to receive ramp signal and calibration signal respectively.Than
Reference signal is also received compared with circuit and characterizes the feedback signal of output voltage.Comparison circuit is according to ramp signal, calibration signal, ginseng
It examines signal and feedback signal generates comparison signal with the turn-on instant of control switch.Turn-on time generation circuit generates turn-on time
Signal is with the conducting duration of control switch.Logic circuits coupled is to comparison circuit and turn-on time generation circuit to receive ratio respectively
Compared with signal and turn-on time signal.Logic circuit generates control signal according to comparison signal and turn-on time signal with control switch
Conducting and shutdown.
Another aspect according to an embodiment of the present invention proposes a kind of switch converters.Switch converters include boosting
Converter or buck converter.Switch converters have switching node and output node.Switch converters include switching him to control
Circuit.By the conducting and shutdown of switch, switch converters convert input voltage into square-wave voltage at switching node and
Output voltage at output node.Control circuit includes slope generating circuit, calibration circuit, comparison circuit, turn-on time generation
Circuit and logic circuit.Slope generating circuit has input terminal and output end.The input terminal of slope generating circuit is coupled to switch
Node.Slope generating circuit is filtered to generate ramp signal in the output end of slope generating circuit square-wave voltage.Calibration
Circuit is coupled to slope generating circuit to receive ramp signal, and ramp signal is filtered to generate calibration signal.Compare
Circuit is coupled to slope generating circuit and calibration circuit to receive ramp signal and calibration signal respectively.Comparison circuit also receives ginseng
It examines signal and characterizes the feedback signal of output voltage.Comparison circuit is according to ramp signal, calibration signal, reference signal and feedback letter
Number generate comparison signal with the turn-on instant of control switch.Turn-on time generation circuit generates turn-on time signal with control switch
Conducting duration.When logic circuits coupled receives comparison signal and conducting to comparison circuit and turn-on time generation circuit respectively
Between signal.Logic circuit generates control signal according to comparison signal and turn-on time signal with the conducting and shutdown of control switch.
The switch converters proposed using the embodiment of the present invention can eliminate the straight of ramp signal introducing using calibration signal
Stream error.Moreover, because calibration signal is filtered according to ramp signal, so that circuit form is simple.
Detailed description of the invention
Fig. 1 shows the switch converters 100 according to one embodiment of the disclosure.
Fig. 2 shows the comparison circuits 200 for switch converters 100 in Fig. 1 according to one embodiment of the disclosure.
Fig. 3 is exemplarily illustrated the turn-on time generation circuit 300 according to one embodiment of the disclosure.
Fig. 4 shows the part working waveform figure of the switch converters 100 using comparison circuit 200 shown in Fig. 2.
Fig. 5 shows the switch converters 500 of another embodiment according to the present invention.
Specific embodiment
Specific embodiments of the present invention are described more fully below, it should be noted that the embodiments described herein is served only for illustrating
Illustrate, is not intended to restrict the invention.In the following description, in order to provide a thorough understanding of the present invention, a large amount of spies are elaborated
Determine details.It will be apparent, however, to one skilled in the art that: this hair need not be carried out using these specific details
It is bright.In other instances, in order to avoid obscuring the present invention, well known circuit, material or method are not specifically described.
Throughout the specification, meaning is referred to " one embodiment ", " embodiment ", " example " or " example "
: a particular feature, structure, or characteristic described in conjunction with this embodiment or example is comprised at least one embodiment of the invention.
Therefore, the phrase " in one embodiment ", " in embodiment ", " example " occurred in each place of the whole instruction
Or " example " is not necessarily all referring to the same embodiment or example.Furthermore, it is possible in any suitable combination and or sub-portfolio will be specific
Feature, structure or characteristic combine in one or more embodiment or examples.In addition, those of ordinary skill in the art should manage
Solution, diagram is provided to the purpose of explanation provided herein, and diagram is not necessarily drawn to scale.It should be appreciated that working as
Claim " element " " being connected to " or when " coupled " to another element, it, which can be, is directly connected or coupled to another element or can be with
There are intermediary elements.On the contrary, cental element is not present when claiming element " being directly connected to " or " being directly coupled to " another element
Part.Identical appended drawing reference indicates identical element.Term "and/or" used herein includes that one or more correlations are listed
Any and all combinations of project.
Although exemplary embodiment describes the present invention with reference to several, it is to be understood that, term used is explanation and shows
Example property, term and not restrictive.The spirit or reality that can be embodied in a variety of forms due to the present invention without departing from invention
Matter, it should therefore be appreciated that above-described embodiment is not limited to any of the foregoing details, and the spirit defined by appended claims
It all should be accompanying power with the whole change and modification widely explained, therefore fallen into claim or its equivalent scope in range
Benefit requires to be covered.
Fig. 1 shows the switch converters 100 according to one embodiment of the disclosure.As shown in Figure 1, switch converters are using decompression
Transformer configuration comprising switching circuit 101 and control circuit 102.
Switching circuit includes switch, and switching circuit has switching node and output node, and switching circuit is by received input
Voltage is converted to the output voltage at square-wave voltage and output node at switching node.More specifically, it in Fig. 1, opens
Powered-down road 101 illustratively includes upper switch pipe M1, lower switch pipe M2, output inductor L and output capacitor C.Upper switch pipe
One end of M1 receives input voltage VIN, and the other end is electrically coupled to one end of lower switch pipe M2, another termination of lower switch pipe M2
Ground.The common end of upper switch pipe M1 and lower switch pipe M2 form the switching node of switching circuit 101 that is, switch converters 100
SW.Input voltage VIN is converted to joint by the conducting and shutdown of upper switch pipe M1 and lower switch pipe M2 by switch converters
Square-wave voltage VSW at point SW.One end of output inductor L is electrically coupled to switching node SW, output capacitor COUT electric coupling
In the other end of output inductor L and with reference between ground.The common end of output inductor L and output capacitor COUT form switch
The output node of circuit 101 that is, switch converters 100.Switch converters pass through the conducting of upper switch pipe M1 and lower switch pipe M2
Input voltage VIN is converted to the output voltage VO UT at output node with shutdown.
It will be appreciated by those skilled in the art that in the embodiment shown in fig. 1, switching circuit 101 is using synchronous transformation topology
Structure.However, in another embodiment, switching circuit 101 can use asynchronous transformation topology structure, wherein asynchronous change
The lower switch pipe changed in topological structure can be diode etc..In addition, the switching tube in switching circuit 101 can partly lead to be any
Body switching device, such as Metal Oxide Semiconductor Field Effect Transistor (MOSFET), insulated gate bipolar transistor (IGBT) etc..
When control circuit 102 illustratively includes slope generating circuit 121, calibration circuit 122, comparison circuit 123, conducting
Between generation circuit 124 and logic circuit 125.Slope generating circuit 121 has input terminal 121A and output end 121B, wherein
Input terminal 121A is coupled to switching node SW to receive square-wave voltage VSW.Slope generating circuit 121 carries out square-wave voltage VSW
Filtering is to generate ramp signal VRAMP in output end 121B.Ramp signal VRAMP can be such that switch converters 100 stablize, and prevent from producing
Raw oscillation.In the embodiment shown in fig. 1, slope generating circuit 121 illustratively includes slope resistance RRAMP and slope capacitor
CRAMP.Slope resistance RRAMP has a first end and a second end, wherein the first end of slope resistance RRAMP is coupled to joint
Point SW is to receive square-wave voltage.Slope capacitor CRAMP has a first end and a second end, wherein the first end of slope capacitor CRAMP
It is coupled to the second end of slope resistance RRAMP and ramp signal VRAMP is provided, the second end of slope capacitor CRAMP is coupled to ginseng
Examine ground.
Calibration circuit 122 is coupled to slope generating circuit 121 to receive ramp signal VRAMP, and to ramp signal VRAMP
It is filtered to generate calibration signal VRR.Calibration signal VRR can be used for eliminating ramp signal VRAMP in switch converters 100
The DC error of introducing, so that output voltage VO UT be made to adjust to desired value.In the embodiment shown in fig. 1, calibration circuit 122 shows
It include example property calibrating resistance RCAL and calibration capacitance CRAL.Calibrating resistance RCAL has a first end and a second end, wherein calibration
The first end of resistance RCAL is coupled to the output end 121B of slope generating circuit 121 to receive ramp signal VRAMP.Calibration capacitance
CRAL has a first end and a second end, wherein the first end of calibration capacitance CRAL be coupled to the second end of calibrating resistance RCAL and
Calibration signal VRR is provided, the second end of calibration capacitance CRAL is coupled to reference to ground.
Comparison circuit 123 is coupled to slope generating circuit 121 and calibration circuit 122 to receive ramp signal VRAMP respectively
With calibration signal VRR, comparison circuit 123 also receives reference signal VREF and represents the feedback signal VFB of output voltage VO UT, and
Comparison signal CMP is generated according to ramp signal VRAMP, calibration signal VRR, feedback signal VFB and reference signal VREF.Compare letter
Number CMP can be used for the turn-on instant of switching tube in control switch circuit 101, for example, the turn-on instant of upper switch pipe M1.
In one embodiment, control circuit 102 further includes error amplifier EA.Error amplifier EA has the first input
End, the second input terminal and output end.The first input end reception feedback signal of error amplifier EA, the second of error amplifier EA
Input terminal receive reference signal VREF, error amplifier EA amplify reference signal VREF and feedback signal VFB between difference with
Error amplification signal VEAO is obtained in output end.Comparison circuit 123 is further coupled to error amplifier EA and is put with receiving error
Big signal VEAO, and according to ramp signal VRAMP, calibration signal VRR, feedback signal VFB, error amplification signal VEAO and reference
Signal VREF generates comparison signal CMP.
In another embodiment, comparison circuit 123 receives a DC error signal VOFFSET also to eliminate thermal compensation signal
The DC error that VRAMP is introduced.Comparison circuit 123 further receives DC error signal VOFFSET, and according to ramp signal
VRAMP, calibration signal VRR, feedback signal VFB, error amplification signal VEAO, DC error signal VOFFSET and reference signal
VREF generates comparison signal CMP.
In one embodiment, feedback signal VFB can be generated by the bleeder circuit divided to output voltage VO UT.
For example, bleeder circuit includes the first feedback resistance and the second feedback resistance.First feedback resistance and the second feedback resistance all have
First end and second end, the first end of the first feedback resistance are coupled to switching circuit 101 to receive output voltage VO UT, and second is anti-
The first end of feed resistance is coupled to the second end of the first feedback resistance and provides feedback signal VFB, and the second of the second feedback resistance
End is coupled to reference to ground.
Fig. 2 shows the comparison circuits 200 for switch converters 100 in Fig. 1 according to one embodiment of the disclosure.Such as Fig. 2
It is shown, comparison circuit 200 illustratively have first input end P1 (for example, inverting input terminal), the second input terminal P2 (for example,
Non-inverting input terminal) and output end P3.Wherein, first input end P1 receive feedback signal VFB and ramp signal VRAMP's and value,
Second input terminal P2 receive reference signal VREF and calibration signal VRR's and value, comparison circuit 200 will be at first input end P1
Signal is compared with the signal at the second input terminal P2, i.e., by feedback signal VFB and ramp signal VRAMP's and value and reference
Signal VREF's and calibration signal VRR is compared with value to generate comparison signal CMP.In the embodiment depicted in figure 2, more electric
The second input terminal P2 on road 200 can also further receive error amplification signal VEAO, and correspondingly, first input end P1 can
Further to receive DC error signal VOFFSET, comparison circuit 200 is by feedback signal VFB, DC error signal VOFFSET
With ramp signal VRAMP's and value and reference signal VREF, error amplification signal VEAO and calibration signal VRR's and value compared
Compared with to generate comparison signal CMP.
With continued reference to Fig. 1, in the embodiment shown in fig. 1, control circuit 102 can further include bleeder circuit
126.Bleeder circuit 126 has input terminal 126A and output end 126B.The input terminal 126A of bleeder circuit 126 is coupled to joint
For point SW to receive square-wave voltage VSW, the output end 126B of bleeder circuit 126 is coupled to the input terminal of slope generating circuit 121
121A.Bleeder circuit 126 divides to generate voltage division signal in the output end 126B of bleeder circuit 126 square-wave voltage VSW
VDIV.Voltage division signal VDIV be provided to the input terminal 121A of slope generating circuit 121 so as to slope generating circuit 121 according to point
Signal VDIV is pressed to generate ramp signal VRAMP.More specifically, as shown in Figure 1, branch pressure voltage 126 includes the first divider resistance
R1 and the second divider resistance R2, the first divider resistance R1 and the second divider resistance R2 all have first end and second end.First point
The first end of piezoresistance R1 is coupled to switching node SW to receive square-wave voltage VSW, the first end coupling of the second divider resistance R2
Second end and offer voltage division signal VDIV, the second end of the second divider resistance R2 to the first divider resistance R1 are coupled to reference
Ground.
Turn-on time generation circuit 124 generates turn-on time signal COT with switching tube in control switch circuit 101, for example,
The conducting duration of upper switch pipe M1.In one embodiment, the reception of turn-on time generation circuit 124 calibration voltage VRR, and according to
Calibration voltage VRR is to generate turn-on time signal COT.
Fig. 3 is exemplarily illustrated the turn-on time generation circuit 300 according to one embodiment of the disclosure.Turn-on time generates electricity
Road 300 includes current source CS, turn-on time capacitor CTON, turn-on time switch STONAnd turn-on time comparator CMP.Current source
CS has a first end and a second end, and first end receives supply voltage VSS.Turn-on time capacitor CTONWith first end and second
End, first end are coupled to the second end of current source CS, and second end is connected to reference to ground.Turn-on time switch STONWith
One end, second end and control terminal, first end are coupled to the second end of current source CS, and second end is connected to reference to ground, and its
Control terminal receives control signal, for example, the upside being described next is controlled signal HS.Turn-on time comparator CMP tool
There are first input end, the second input terminal and output end, first input end is coupled to turn-on time capacitor CTONFirst end with
Receive turn-on time capacitor CTONOn voltage, second end receive calibration signal VRR.Turn-on time comparator CMP1 will be led
Logical time capacitor CTONOn voltage be compared with calibration signal VRR, and its output end generate turn-on time control signal
COT.Make reference signal since turn-on time generation circuit 300 utilizes calibration signal VRR, so that entire circuit obtains letter
Change, has saved cost.
It continues to refer to figure 1, as shown in Figure 1, logic circuit 125 is coupled to comparison circuit 123 and turn-on time generation circuit
124 to receive comparison signal CMP and turn-on time signal COT respectively, and according to comparison signal CMP and turn-on time signal COT
Control signal is generated with switching tube in control switch circuit 101, for example, conducting and the pass of upper switch pipe M1 and lower switch pipe M2
It is disconnected.More specifically, in the embodiment shown in fig. 1, logic circuit 125 includes rest-set flip-flop comprising set end S, reset terminal
R, the first output end Q and second output terminal Q ', wherein set end S is coupled to comparison circuit 123 to receive comparison signal CMP, again
Position end R is coupled to turn-on time generation circuit 124 to receive turn-on time signal COT.When comparison signal CMP sets rest-set flip-flop
When position, rest-set flip-flop controls signal HS upper switch pipe M1 is connected and in second output terminal Q ' on the upside of the first output end Q output
Signal LS is to turn off lower switch pipe M2 for the control of output downside.When signal COT resets rest-set flip-flop between when closed, rest-set flip-flop
Control signal HS is on the upside of the first output end Q output to turn off upper switch pipe M1 and export downside control letter in second output terminal Q '
Number LS is to be connected lower switch pipe M2.
Fig. 4 is shown using the part working waveform figure of the switch converters 100 of comparison circuit 200 shown in Fig. 2 and using existing
There is the waveform diagram of technology.As shown in figure 4, from top to bottom, Fig. 4 successively shows slope compensation signal VRAMP and feedback signal VFB
The sum of the sum of (VRAMP+VFB), reference signal VREF and calibration signal VRR (VREF+VRR), slope compensation signal VRAMP and anti-
The sum of feedback signal VFB and calibration signal VRR (VRAMP+VFB+VRR), ramp signal VRAMP and calibration signal VRR.It can by Fig. 4
See, calibration signal VRR is the average value of ramp signal VRAMP.When not adding calibration signal VRR, error amplifier EA needs
Work adapts to underloading operating mode within the scope of biggish direct current, this meeting is so that circuit power consumption is larger.When addition calibration signal
When VRR, the direct current range of error amplifier EA work is significantly reduced, and power consumption accordingly becomes smaller.Moreover, in the present invention, due to
Ramp signal VRAMP directly is filtered to be formed by calibration signal VRR, and circuit is simple.
Fig. 5 shows the switch converters 500 of another embodiment according to the present invention.It switch converters 500 and shown in FIG. 1 opens
Closing converter 100 has similar structures, herein, for the purpose of clear simplicity, in switch converters 500 with switch converters
100 different structures are described, and omit mutually isostructural description.It is compared with switch converters 100, switch converters
500 use the switching circuit 501 of boost topology.Specifically, switching circuit 501 include upper switch pipe M1, lower switch pipe M2,
Output inductor L and output capacitor COUT.Output inductor L has a first end and a second end, wherein output inductor L's
First end receives input voltage VIN.Lower switch pipe M2 has first end, second end and control terminal, wherein the of lower switch pipe M2
One end is coupled to the second end of output inductor L, and the second end of lower switch pipe M2 is coupled to reference to ground, the control of lower switch pipe M2
End is coupled to control circuit to receive downside and control signal LS.Upper switch pipe M1 has first end, second end and control terminal,
In, the first end of upper switch pipe M1 is coupled to the second end of output inductor L, and the control terminal of upper switch pipe M1 is coupled to control electricity
Road controls signal HS with side to receive.Output capacitor COUT has a first end and a second end, wherein output capacitor COUT's
First end is coupled to the second end of upper switch pipe M1 and provides output voltage VO UT, and the second end of output capacitor COUT is coupled to
With reference to ground.
Switch converters 500 are converted input voltage VIN with shutdown by the conducting of upper switch pipe M1 and lower switch pipe M2
For the square-wave voltage VSW at switching node SW.Switch converters 500 pass through conducting and the pass of upper switch pipe M1 and lower switch pipe M2
The disconnected output voltage VO UT be converted to input voltage VIN at output node.
It will be appreciated by those skilled in the art that in the embodiment shown in fig. 5, switching circuit 501 is using synchronous transformation topology
Structure.However, in another embodiment, switching circuit 501 can use asynchronous transformation topology structure, wherein asynchronous change
The lower switch pipe changed in topological structure can be diode etc..In addition, the switching tube in switching circuit 501 can partly lead to be any
Body switching device, such as Metal Oxide Semiconductor Field Effect Transistor (MOSFET), insulated gate bipolar transistor (IGBT) etc..
Although exemplary embodiment describes the present invention with reference to several, it is to be understood that, term used is explanation and shows
Example property, term and not restrictive.The spirit or reality that can be embodied in a variety of forms due to the present invention without departing from invention
Matter, it should therefore be appreciated that above-described embodiment is not limited to any of the foregoing details, and the spirit defined by appended claims
It all should be accompanying power with the whole change and modification widely explained, therefore fallen into claim or its equivalent scope in range
Benefit requires to be covered.
Claims (10)
1. a kind of control circuit for switch converters, wherein switch converters include buck converter or booster converter,
Switch converters include switch, and switch converters have switching node and output node, and switch converters receive input voltage simultaneously
The square-wave voltage at switching node and the output at output node are converted input voltage by the conducting and shutdown of switch
Voltage, control circuit include:
Slope generating circuit has input terminal and output end, and the input terminal of slope generating circuit is coupled to switching node, and is produced from slope
Raw circuit is filtered to generate ramp signal in the output end of slope generating circuit square-wave voltage；
Circuit is calibrated, is coupled to slope generating circuit to receive ramp signal, and ramp signal is filtered to generate calibration
Signal；
Comparison circuit, be coupled to slope generating circuit and calibration circuit to receive ramp signal and calibration signal respectively, it is more electric
Road also receive reference signal and characterize output voltage feedback signal, comparison circuit according to ramp signal, calibration signal, with reference to letter
Number and feedback signal generate comparison signal with the turn-on instant of control switch；
Turn-on time generation circuit generates turn-on time signal with the conducting duration of control switch；And
Logic circuit is coupled to comparison circuit and turn-on time generation circuit to receive comparison signal and turn-on time letter respectively
Number, logic circuit generates control signal according to comparison signal and turn-on time signal with the conducting and shutdown of control switch.
2. control circuit as described in claim 1, wherein control circuit further includes error amplifier, and error amplifier has
First input end, the second input terminal and output end, wherein the first input end of error amplifier receives reference signal, and error is put
Second input terminal of big device receives feedback signal, and error amplifier amplifies the difference between reference signal and feedback signal and defeated
Outlet generates error amplification signal, and comparison circuit is according to ramp signal, calibration signal, reference signal, error amplification signal and anti-
Feedback signal generates comparison signal.
3. control circuit as claimed in claim 2, wherein comparison circuit also receives DC error signal, comparison circuit according to
Ramp signal, calibration signal, reference signal, error amplification signal, DC error signal and feedback signal generate comparison signal.
4. control circuit as claimed in claim 3, wherein comparison circuit has first input end, the second input terminal and output
End, wherein first input end receive feedback signal, DC error signal and ramp signal and value and the second input terminal receive and join
Examine signal, error amplification signal and calibration signal and value, comparison circuit is by feedback signal, DC error signal and ramp signal
And value and reference signal, error amplification signal and calibration signal and value be compared to generate comparison signal in output end.
5. control circuit as claimed in claim 2, wherein slope generating circuit includes:
Slope resistance, has a first end and a second end, wherein the first end of slope resistance is coupled to switching node to receive square wave
Voltage；With
Slope capacitor, has a first end and a second end, wherein the first end of slope capacitor be coupled to slope resistance second end and
Ramp signal is provided, the second end of slope capacitor is coupled to reference to ground.
6. control circuit as claimed in claim 2, wherein calibrating circuit includes:
Calibrating resistance has a first end and a second end, wherein the first end of calibrating resistance is coupled to slope generating circuit to receive
Ramp signal；With
Calibration capacitance has a first end and a second end, wherein the first end of calibration capacitance be coupled to calibrating resistance second end and
Calibration signal is provided, the second end of calibration capacitance is coupled to reference to ground.
7. control circuit as claimed in claim 2, wherein control circuit further includes bleeder circuit, and bleeder circuit has input
End and output end, the input terminal of bleeder circuit are coupled to switching node, and the output end of bleeder circuit is coupled to slope generating circuit
Input terminal, bleeder circuit to square-wave voltage divided with the output end of bleeder circuit generate voltage division signal.
8. control circuit as claimed in claim 2, wherein turn-on time generation circuit is coupled to calibration circuit to receive calibration
Signal, and turn-on time signal is generated according to calibration signal.
9. control circuit as claimed in claim 8, wherein turn-on time generation circuit includes:
Current source has a first end and a second end, and the first end of current source receives supply voltage；
Turn-on time capacitor, has a first end and a second end, and the first end of turn-on time capacitor is coupled to the second end of current source,
The second end of turn-on time capacitor is connected to reference to ground；
Turn-on time switch, has first end, second end and control terminal, and the first end of turn-on time switch is coupled to current source
Second end, turn-on time switch second end be connected to reference to ground, turn-on time switch control terminal be coupled to logic circuit with
Receive control signal；And
Turn-on time comparator has first input end, the second input terminal and output end, the first input of turn-on time comparator
End is coupled to the first end of turn-on time capacitor to receive the voltage on turn-on time capacitor, and the second of turn-on time comparator is defeated
Enter to terminate close alignment voltage, turn-on time comparator by turn-on time capacitor voltage and calibration voltage be compared and leading
The output end of logical time comparator generates turn-on time signal.
10. a kind of switch converters, including booster converter or buck converter, switch converters have switching node and output
Node, switch converters include:
Switch, by the conducting and shutdown of switch, switch converters convert input voltage into the square-wave voltage at switching node
And the output voltage at output node；And
Control circuit as in one of claimed in any of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610684954.8A CN106300905B (en) | 2016-08-18 | 2016-08-18 | Switch converter and control circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610684954.8A CN106300905B (en) | 2016-08-18 | 2016-08-18 | Switch converter and control circuit thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106300905A CN106300905A (en) | 2017-01-04 |
| CN106300905B true CN106300905B (en) | 2019-03-05 |
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| CN108336903A (en) * | 2018-03-13 | 2018-07-27 | 杰华特微电子（杭州）有限公司 | Control circuit and control method for reduction voltage circuit |
| CN114204811B (en) * | 2022-01-10 | 2022-09-30 | 艾科微电子(深圳)有限公司 | Fixed on-time power converter with sawtooth wave modulated by inductance and voltage |
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| CN103683935A (en) * | 2013-12-03 | 2014-03-26 | 成都芯源系统有限公司 | Switch mode power supply and control circuit and control method thereof |
| CN103825433A (en) * | 2014-02-27 | 2014-05-28 | 成都芯源系统有限公司 | Switch converter and control circuit thereof |
| CN104065261A (en) * | 2014-06-26 | 2014-09-24 | 成都芯源系统有限公司 | Switch converter and control circuit and control method thereof |
| CN105356729A (en) * | 2015-12-07 | 2016-02-24 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and control method used in switch power supply |
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| US10110122B2 (en) * | 2014-04-01 | 2018-10-23 | Virginia Tech Intellectual Properties, Inc. | Transient performance improvement for constant on-time power converters |
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| CN103683935A (en) * | 2013-12-03 | 2014-03-26 | 成都芯源系统有限公司 | Switch mode power supply and control circuit and control method thereof |
| CN103825433A (en) * | 2014-02-27 | 2014-05-28 | 成都芯源系统有限公司 | Switch converter and control circuit thereof |
| CN104065261A (en) * | 2014-06-26 | 2014-09-24 | 成都芯源系统有限公司 | Switch converter and control circuit and control method thereof |
| CN105356729A (en) * | 2015-12-07 | 2016-02-24 | 矽力杰半导体技术(杭州)有限公司 | Control circuit and control method used in switch power supply |
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