CN106298707B - Encapsulating structure and preparation method thereof - Google Patents
Encapsulating structure and preparation method thereof Download PDFInfo
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- CN106298707B CN106298707B CN201510306987.4A CN201510306987A CN106298707B CN 106298707 B CN106298707 B CN 106298707B CN 201510306987 A CN201510306987 A CN 201510306987A CN 106298707 B CN106298707 B CN 106298707B
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- engagement pad
- encapsulating structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Abstract
The present invention provides a kind of encapsulating structure and preparation method thereof, and wherein encapsulating structure includes: wiring board, multiple first engagement pads, multiple metal columns and an at least chip.First engagement pad is configured on wiring board.Chip is configured in first engagement pad of a part.Metal column is configured in first engagement pad of another part, wherein the metal column surrounds the chip.The present invention separately provides a kind of manufacturing method of encapsulating structure.Encapsulating structure provided by the invention and preparation method thereof can solve warpage issues, and then promote the yield of three-dimension packaging structure.
Description
Technical field
The present invention relates to a kind of semiconductor structure and preparation method thereof more particularly to a kind of three-dimension packaging structure and its production
Method.
Background technique
In recent years, existing in order to increase the application of printed wiring board (Printed Circuit Board, hereinafter referred to as PCB)
It is that printed wiring board is fabricated to multilayer wiring structure there are many technology.The production method of multilayer wiring structure is by copper foil
(copper foil) or other applicable conductive materials and film (prepreg, pp) or other applicable dielectric materials form and increase
Layer structure, and layer reinforced structure is pressed repeatedly and is stacked on core layer (core), it is more to increase to form multilayer wiring structure
The internal wiring space of layer line line structure, wherein the conductive material on layer reinforced structure can form conduction according to required configuration
Route, and conductive material can be filled in the blind hole of layer reinforced structure or through-hole separately each layer is connected.In this way, multilayer wiring structure can be according to
The route number of plies is adjusted according to demand, and is in the above way made.
However, since above-mentioned film or other applicable dielectric material quality are more soft, in the fabrication process just very
It is easy to produce the warpage issues (warpage issue) of multilayer wiring structure.It applies when above-mentioned printed wiring board and is sealed in stack
When assembling structure (Package-On-Package, hereinafter referred to as POP), it can also make above-mentioned stack encapsulation structure generate warpage and ask
Topic, and then reduce the yield of stack encapsulation structure.
Summary of the invention
The present invention provides a kind of encapsulating structure and preparation method thereof, can solve warpage issues, and then promote three-dimension packaging
The yield of structure.
The present invention provides a kind of encapsulating structure, comprising: wiring board, multiple first engagement pads, multiple metal columns and at least
One chip (chip).First engagement pad is configured on wiring board.Chip is configured in first engagement pad of a part.Metal
Column is configured in first engagement pad of another part, wherein the metal column surrounds the chip.
In one embodiment of this invention, the wiring board includes layer reinforced structure, the second engagement pad and soldermask layer.It is described
Second engagement pad is configured between the layer reinforced structure and the soldermask layer.The layer reinforced structure includes: multiple dielectric layers, more
A patterned line layer and multiple first via holes.Each patterned line layer is configured between the adjacent dielectric layer.First
Via hole is configured in the dielectric layer, to be electrically connected the adjacent patterned line layer.
In one embodiment of this invention, the encapsulating structure further includes support structure configuration in the wiring board.Institute
Stating support construction includes rectilinear support construction and horizontal support construction.
In one embodiment of this invention, there are multiple second via holes to be configured at and given an account of for the rectilinear support construction
In electric layer and it is configured at around the wiring board.Second via hole is mutually aligned, to form continuous structure.
In one embodiment of this invention, the encapsulating structure further includes that the first radiator structure is configured at the layer reinforced structure
Between second engagement pad.First radiator structure and the rectilinear support construction are electrically connected, inverted U-shaped to be formed
Structure.
In one embodiment of this invention, the patterned line layer has master pattern and support pattern.The support
Pattern is configured at around the master pattern, to form the horizontal support construction.The support pattern is mesh pattern.
In one embodiment of this invention, the encapsulating structure further includes that the second radiator structure is configured on the chip.
In one embodiment of this invention, the material of second radiator structure include silver, nickel, copper, aluminium, gold, palladium or its
Combination.
In one embodiment of this invention, the encapsulating structure further includes that insulation system is configured at first engagement pad
On.The insulation system does not cover the surface of the chip.
In one embodiment of this invention, the material of the insulation system includes epoxy resin (Epoxy), polyimides
(Polyimide) or combinations thereof.
In one embodiment of this invention, the encapsulating structure further include: multiple convex blocks and multiple etching stopping layers.It is convex
Block is configured between first engagement pad and the chip.Etching stopping layer is configured at first engagement pad and the metal
Between column.
The present invention provides a kind of manufacturing method of encapsulating structure, and its step are as follows.Support plate is provided.The support plate includes first
Metal layer, second metal layer and etching stopping layer.The etching stopping layer is configured at the first metal layer and described
Between two metal layers.The second metal layer is patterned, to form multiple first engagement pads.Wiring board is formed to connect in described first
On the first surface of touch pad.The first metal layer is patterned, to form multiple metal columns.Removal is not covered by the metal column
The etching stopping layer, the second surface of exposure first engagement pad.The metal column by first engagement pad with
And the etching stopping layer covered by the metal column is electrically connected to the wiring board.An at least chip is formed in described
On the second surface of first engagement pad.The metal column surrounds the chip.
In one embodiment of this invention, the wiring board includes layer reinforced structure, the second engagement pad and soldermask layer.It is described
Second engagement pad is configured between the layer reinforced structure and the soldermask layer.The layer reinforced structure includes: multiple dielectric layers, more
A patterned line layer and multiple first via holes.Each patterned line layer is configured between the adjacent dielectric layer.First
Via hole is configured in the dielectric layer, to be electrically connected the adjacent patterned line layer.
In one embodiment of this invention, the manufacturing method of the encapsulating structure further includes forming support construction in the line
In the plate of road.The support construction includes rectilinear support construction and horizontal support construction.
In one embodiment of this invention, there are multiple second via holes to be configured at and given an account of for the rectilinear support construction
In electric layer and it is configured at around the wiring board.Second via hole is mutually aligned, to form continuous structure.
In one embodiment of this invention, the manufacturing method of the encapsulating structure further includes forming the first radiator structure in institute
It states between layer reinforced structure and second engagement pad.First radiator structure and the rectilinear support construction are electrically connected,
To form inverted U-shaped.
In one embodiment of this invention, the patterned line layer has master pattern and support pattern.The support
Pattern is configured at around the master pattern, to form the horizontal support construction.The support pattern is mesh pattern.
In one embodiment of this invention, the manufacturing method of the encapsulating structure further includes forming the second radiator structure in institute
It states on the third surface of chip.
In one embodiment of this invention, the manufacturing method of the encapsulating structure further includes forming insulation system in described
On the second surface of one engagement pad.The insulation system does not cover on the third surface of the chip.
In one embodiment of this invention, the manufacturing method of the encapsulating structure further includes forming multiple convex blocks in described
Between one engagement pad and the chip.
Based on support construction and be configured at the first engagement pad above-mentioned, that present invention utilization is configured in the wiring board
Insulation system on second surface reinforces the intensity of encapsulating structure, to solve the warpage issues of encapsulating structure, and then promotes encapsulation
The yield of structure.In addition, the present invention utilizes the first radiator structure and the second radiator structure again, encapsulating structure can be not only reduced
Temperature, can also further promote the intensity of encapsulating structure.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make
Carefully it is described as follows.
Detailed description of the invention
Figure 1A to Fig. 1 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by first embodiment of the invention
Figure；
Fig. 2A to Fig. 2 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by second embodiment of the invention
Figure；
Fig. 3 is the upper schematic diagram of the support construction 230 of Fig. 2 B；
Fig. 4 A to Fig. 4 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by third embodiment of the invention
Figure；
Fig. 5 is the upper schematic diagram of the radiator structure 330 of Fig. 4 A；
Fig. 6 A to Fig. 6 E is to illustrate according to the section of the manufacturing process of encapsulating structure shown by fourth embodiment of the invention
Figure.
Description of symbols:
10,20,30,40: encapsulating structure；
100,100a, 200,200a, 300a, 400,400a: support plate；
102,202,302,402: the first metal layer；
102a, 202a, 302a, 402a: metal column；
104,104a, 204,204a, 304,304a, 404,404a: etching stopping layer；
106,206,406: second metal layer；
106a, 106b, 106c, 206a, 206b, 206c, 306a, 306b, 306c, 406a, 406b, 406c: the first contact
Pad；
107,207,307,407: wiring board；
108,208,308,408: layer reinforced structure；
110,210,210a, 210b, 310,332,410: dielectric layer；
112,212,312,412: patterned line layer；
114,214a, 214b, 314a, 314b, 414: via hole；
116,216,316,416: the second engagement pad；
118,218,318,418: soldermask layer；
120,122,220,222,320,322,420,422: convex block；
124a, 124b, 224a, 224b, 324a, 324b, 424a, 424b: chip；
212a: master pattern；
212b: support pattern；
226,228: side；
230: support construction；
330: the first radiator structures；
330a: mesh pattern；
330b: conducting sectional hole patterns；
330c: corner pattern；
334: the second radiator structures；
430: insulation system；
S1, S2, S3: surface.
Specific embodiment
Figure 1A to Fig. 1 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by first embodiment of the invention
Figure.
Figure 1A is please referred to, support plate 100 is provided.Support plate 100 includes the first metal layer 102, second metal layer 106 and etching
Stop-layer 104.Etching stopping layer 104 is configured between the first metal layer 102 and second metal layer 106.In the present embodiment,
Support plate 100 can be for example the three-decker that copper-nickel-copper (Cu-Ni-Cu) is constituted or copper-Solder for Al-Cu Joint Welding (Cu-Al-Cu) institute structure
At three-decker.As long as the material and second metal layer 106 of the material of etching stopping layer 104 and the first metal layer 102
Material is different, and invention is not limited thereto.In other embodiments, the material of the first metal layer 102 can be for example silver,
Nickel, copper, aluminium, gold, palladium or combinations thereof, thickness can be between 10 μm to 150 μm.The material of second metal layer 106 can be such as
It is silver, nickel, copper, aluminium, gold, palladium or combinations thereof, thickness can be between 10 μm to 80 μm.The material of etching stopping layer 104 can
E.g. silver, nickel, copper, aluminium, gold, palladium or combinations thereof, thickness can be between 0.5 μm to 30 μm.
Then, referring to Figure 1A and Figure 1B, second metal layer 106 is patterned, to form multiple first engagement pads
106a, 106b, to form support plate 100a.First engagement pad 106a, 106b has opposite first surface S1 and second surface
S2.In the present embodiment, the first engagement pad 106a can be considered the via hole 114 for not being electrically connected to and being subsequently formed.And first connects
Touch pad 106b then can be considered the via hole 114 for being electrically connected to and being subsequently formed.
Later, wiring board 107 is formed on the first surface S1 of the first engagement pad 106a, 106b.Wiring board 107 includes increasing
Layer structure 108, the second engagement pad 116 and soldermask layer 118.In detail, layer reinforced structure 108 include: multiple dielectric layers 110,
Multiple patterned line layers 112 and multiple via holes 114.Each patterned line layer 112 be configured at adjacent dielectric 110 it
Between.The method for forming patterned line layer 112 is, for example, to be formed to be, for example, in the first engagement pad 106a, 106b or line layer
The photoresist layer (not shown) of dry film.Then, photoresist layer patterns the first engagement pad of exposed portion by photoetching process again
106a, 106b or line layer.Then, the removal technique of electroplating technology and photoresist layer is carried out, to form patterned circuit
Layer 112.Later, dielectric layer 110 is formed in patterned line layer 112.Then, via hole 114 is formed in dielectric layer 110,
Wherein via hole 114 is for electrically connecting to adjacent two patterned line layer 112.Although Figure 1B only show 5 layers of dielectric layer 110 with
And 5 layers of patterned line layer 112, but invention is not limited thereto.Substantially, the present invention is also using increasing layer (built up)
Method increases the number of plies of patterned line layer 112, can be adjusted according to design requirement.The material of dielectric layer 110 can wrap
Dielectric material is included, dielectric material can be for example film (prepreg), ABF (Ajinomoto build-up film) film or its group
It closes.The material of patterned line layer 112 may include metal material, metal material can be for example silver, nickel, copper, aluminium, gold, palladium or its
Combination.In the present embodiment, patterned line layer 112 can be considered the conducting wire on wiring board 107, can be according to required route cloth
Office (layout) designs.
Then, the second engagement pad 116 and soldermask layer 118 are formed on layer reinforced structure 108.Second engagement pad 116
Material and forming method are similar to the material of above-mentioned patterned line layer 112 and forming method, are just no longer described in detail herein.?
In the present embodiment, the material of soldermask layer 118 can be for example dielectric material, ABF layers or combinations thereof.The forming method of soldermask layer 118
It can be for example and be initially formed anti-welding material layer in (not shown) in the second engagement pad 116.The anti-welding material layer is patterned, again with sudden and violent
Reveal the surface of the second engagement pad of part 116.In addition, surface-treated layer can also be formed in the second engagement pad 116 and second connects
(not shown) between touch pad 116 and soldermask layer 118.The material of surface-treated layer can be for example organic solderability preservative (Organic
Solderability Preservative, hereinafter referred to as OSP), plating ni au (Ni/Au), electronickelling/palladium (Ni/Pd), electricity
Tin plating (Sn), electrosilvering (Ag), chemistry golden (Au) change nickel palladium leaching gold (Electroless Nickel Electroless
Palladium Immersion Gold, hereinafter referred to as ENEPIG) or combinations thereof.
Please refer to Fig. 1 C, patterned first metal layer 102, to form multiple metal column 102a.In detail, metal column
The forming method of 102a, which can be for example, forms patterning photoresist layer on the first metal layer 102 to expose the first metal of part
The surface (not shown) of layer 102.Then, the first metal layer 102 is lost as etching stopping layer with etching stopping layer 104
Carving technology, to form metal column 102a.And then the etching stopping layer 104 not covered by metal column 102a is removed, exposure first
The second surface S2 of engagement pad 106c, to form the etching stopping layer 104a covered by metal column 102a.Metal column 102a can
Wiring board 107 is electrically connected to by etching stopping layer 104a and the first engagement pad 106a, 106b.In one embodiment, golden
The height for belonging to column 102a can be adjusted according to chip 124a, 124b for being subsequently formed, and the invention is not limited thereto.
Fig. 1 D is please referred to, forms chip 124a, 124b on the second surface S2 of the first engagement pad 106c.Metal column 102a
Around chip 124a, 124b.Chip 124a, 124b are electrically connected to wiring board 107 by convex block 120, the first engagement pad 106c.
On the other hand, multiple convex blocks 122 are also formed in the second engagement pad 116 of wiring board 107.The encapsulating structure 10 of first embodiment can
Other encapsulating structures are electrically connected to by convex block 122, to form stack encapsulation structure (POP).Although Fig. 1 D only shows two
A chip 124a, 124b, however, the present invention is not limited thereto.In other embodiments, the number of chip can be adjusted on demand.
Fig. 1 D is please referred to, the encapsulating structure 10 of first embodiment includes: multiple first engagement pad 106a, 106b, 106c, line
Road plate 107, multiple metal column 102a and chip 124a, 124b.First engagement pad 106a, 106b, 106c has opposite the
One surface S1 and second surface S2.Wiring board 107 is configured on the first surface S1 of first engagement pad 106a, 106b, 106c.Gold
Belong to column 102a to be configured on the second surface S2 of the first engagement pad 106a, 106b.Chip 124a, 124b are configured at the first engagement pad
On the second surface S2 of 106c.Metal column 102a surrounds chip 124a, 124b.Since the material of metal column 102a is more hard,
And therefore metal column 102a can strengthen the structural strength of the encapsulating structure 10 of first embodiment around chip 124a, 124b.
In this way, which the encapsulating structure 10 of first embodiment can solve the warpage issues on chip joint technology, and then promote encapsulation
The yield of structure 10.
In addition, the manufacturing method of the present embodiment is first to form wiring board 107 on thicker support plate 100.Then, then to
One metal layer 102 is etched technique, to form multiple metal column 102a.So the present embodiment can also be kept away on manufacturing process
Exempt from that warpage issues occur in the manufacturing process of the relatively soft wiring board 107 of material, and then promotes the yield of wiring board 107.
In embodiment below, the same or similar element, component, layer are indicated with similar component symbol.Citing comes
It says, support plate 100 and support plate 200,300,400 are the same or similar component；Layer reinforced structure 108 and layer reinforced structure 208,308,
408 be also the same or similar component.It no longer repeats one by one herein.
Fig. 2A to Fig. 2 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by second embodiment of the invention
Figure.Fig. 3 is the upper schematic diagram of the support construction 230 of Fig. 2 B.
Referring to Fig. 2A to Fig. 2 C, the manufacturing process and the present invention of the encapsulating structure 20 of the second embodiment of the present invention
First embodiment encapsulating structure 10 manufacturing process it is essentially similar.Wherein, support plate 200 includes the first metal layer 202, the
Two metal layers 206 and etching stopping layer 204.Wiring board 207 includes layer reinforced structure 208, the second engagement pad 216 and soldermask layer
218.Layer reinforced structure 208 includes dielectric layer 210, patterned line layer 212, via hole 214a, 214b.Pattern second metal layer
206, to form multiple first engagement pads 206a, 206b, to form support plate 200a.It is both above-mentioned the difference is that: second
The wiring board 207 of embodiment also has more other than with via hole 214b (similar to the via hole 114 of first embodiment)
A via hole 214a configuration is in dielectric layer 210.And via hole 214a is configurable on around wiring board 207 (by Fig. 2 B's
For profile direction, can be considered around wiring board 207 close to the two sides 226,228) of wiring board 207.Via hole 214a is each other
It is mutually aligned, to form continuous structure.In the present embodiment, it is configured at around wiring board 207, and the conducting with continuous structure
Hole 214a can be considered a kind of conductive column, can be used to as rectilinear support construction.This rectilinear support construction can strengthen second
The structural strength of the encapsulating structure 20 of embodiment in vertical direction to solve the warpage issues of encapsulating structure, and then promotes envelope
The yield of assembling structure.In the present embodiment, via hole 214a can be designed according to required configuration.In other words, via hole
214a can be formed together with via hole 214b, without additional technique.
In addition, the wiring board 207 of second embodiment has support construction 230.Referring to Fig. 2 B and Fig. 3, support knot
Structure 230 can be considered horizontal support construction, can be designed using the layout of patterned line layer 212.In detail, it patterns
Line layer 212 is configured on dielectric layer 210.Dielectric layer 210 includes dielectric layer 210a and dielectric layer 210b.Patterned line layer
212 have master pattern 212a and support pattern 212b.Support pattern 212b is configured at around master pattern 212a, to form water
Flat support construction 230.Master pattern 212a can be considered the conducting wire on script online design road plate 207.Supporting pattern 212b is then
Configuration is around master pattern 212a, to strengthen the transverse structure intensity of patterned line layer 212.Therefore, pattern 212b is supported
(namely support construction 230) can solve the warpage issues of encapsulating structure, and then promote the yield of encapsulating structure.In general, every
One layer of patterned line layer 212 can all have the support pattern 212b configured around master pattern 212a, to form horizontal
Support construction 230.Therefore, the present embodiment can also promote each layer of patterned line layer 212 without additional technique
Transverse structure intensity.In one embodiment, support pattern 212b can be for example mesh pattern.
C and Fig. 2 D referring to figure 2., manufacturing step and above-mentioned Fig. 1 C are identical as Fig. 1 D, and metal column 202a, etch stop
Layer 204a, the first engagement pad 206c, the material of convex block 220,222 and chip 224a, 224b, thickness and forming method are for example above-mentioned
Described in the metal column 102a of first embodiment, etching stopping layer 104a, convex block 120,122 and chip 124a, 124b, herein not
It repeats again.
Fig. 4 A to Fig. 4 D is to illustrate according to the section of the manufacturing process of encapsulating structure shown by third embodiment of the invention
Figure.Fig. 5 is the upper schematic diagram of the radiator structure 330 of Fig. 4 A.
The manufacturing process of the encapsulating structure 30 of the third embodiment of the present invention and the encapsulation knot of the second embodiment of the present invention
The manufacturing process of structure 20 is essentially similar.Wherein, support plate 300a include the first metal layer 302, multiple first engagement pad 306a,
306b and etching stopping layer 304.Wiring board 307 includes layer reinforced structure 308, the second engagement pad 316 and soldermask layer 318.Increase
Layer structure 308 includes dielectric layer 310, patterned line layer 312, via hole 314a, 314b.Referring to Fig. 4 A, Fig. 2 B with
And Fig. 5, Fig. 4 A and Fig. 2 B the difference is that: the wiring board 307 of 3rd embodiment also has the first radiator structure 330 and is situated between
Electric layer 332 is configured between layer reinforced structure 308 and the second engagement pad 316.As shown in Figure 4 A, the first radiator structure 330 with
Rectilinear support construction 314a (namely via hole 314a) is electrically connected, to form inverted U-shaped.In detail, the first heat dissipation
Structure 330 can be considered another configuration of pattern layers line layer 312 between layer reinforced structure 308 and the second engagement pad 316.Such as figure
Shown in 5, the pattern of the first radiator structure 330 includes mesh pattern 330a, conducting sectional hole patterns 330b and corner pattern 330c.It is situated between
Electric layer 332 configures on the first radiator structure 330.Mesh pattern 330a not only can be used to increase the encapsulating structure of 3rd embodiment
30 heat dissipation also can be used to strengthen the transverse structure intensity of the encapsulating structure 30 of 3rd embodiment.Sectional hole patterns 330b is connected
It is to be for electrically connecting to layer reinforced structure 308 and the second engagement pad 316.Corner pattern 330c can be with rectilinear support construction 314a
(namely via hole 314a) is electrically connected, to form inverted U-shaped.Therefore, pattern 330c in corner can not only increase third implementation
The heat dissipation of the encapsulating structure 30 of example, can also further promote the knot of the encapsulating structure 30 of 3rd embodiment in vertical direction
Structure intensity.In the present embodiment, the material of the first radiator structure 330 may include metal material, metal material can be for example silver,
Nickel, copper, aluminium, gold, palladium or combinations thereof.And the material of dielectric layer 332 may include dielectric material, dielectric material can be for example film
(prepreg), ABF film or combinations thereof.
B and Fig. 4 C referring to figure 4., manufacturing step and above-mentioned Fig. 2 C are identical as Fig. 2 D, and metal column 302a, etch stop
Layer 304a, the first engagement pad 306c, the material of convex block 320,322 and chip 324a, 324b, thickness and forming method are for example above-mentioned
Described in the metal column 202a of second embodiment, etching stopping layer 204a, convex block 220,222 and chip 224a, 224b, herein not
It repeats again.
D referring to figure 4. forms the second radiator structure 334 on the third surface S3 of chip 324a, 324b.Second heat dissipation
Structure 334 can promote the heat dissipation of the encapsulating structure 30 of 3rd embodiment, to reduce the temperature of overall package structure 30.At this
In embodiment, the material of the second radiator structure 334 can be for example silver, nickel, copper, aluminium, gold, palladium or combinations thereof.
Fig. 6 A to Fig. 6 E is to illustrate according to the section of the manufacturing process of encapsulating structure shown by fourth embodiment of the invention
Figure.
Please refer to Fig. 6 A to Fig. 6 D, the manufacturing process of the encapsulating structure 40 of the fourth embodiment of the present invention and of the invention the
The manufacturing process of the encapsulating structure 10 of one embodiment is essentially similar.Wherein, support plate 400 includes the first metal layer 402, the second gold medal
Belong to layer 406 and etching stopping layer 404.Wiring board 407 includes layer reinforced structure 408, the second engagement pad 416 and soldermask layer 418.
Layer reinforced structure 408 includes dielectric layer 410, patterned line layer 412, via hole 414.Second metal layer 406 is patterned, to be formed
Multiple first engagement pads 406a, 406b, to form support plate 400a.Metal column 402a, the etching stopping layer of fourth embodiment
Material, the thickness of 404a, first engagement pad 406a, 406b, 406c, wiring board 407, convex block 420,422 and chip 424a, 424b
Degree and the metal column 102a of for example above-mentioned first embodiment of forming method, etching stopping layer 104a, first engagement pad 106a, 106b,
Described in 106c, wiring board 107, convex block 120,122 and chip 124a, 124b, details are not described herein.
Please refer to Fig. 6 E, with the encapsulating structure 10 of first embodiment the difference is that: the encapsulating structure of fourth embodiment
40 there is insulation system 430 to be configured on the second surface S2 of first engagement pad 406a, 406b, 406c.Insulation system 430 does not cover
On the third surface S3 of cover core piece 424a, 424b.In one embodiment, the material of insulation system 430 can be for example epoxy resin
(Epoxy), polyimides ((Polyimide) or combinations thereof.The forming method of insulation system 430, which can be for example, is initially formed insulation
Structural material is on the second surface S2 of first engagement pad 406a, 406b, 406c.Then, solidified (Curing) processing,
To form insulation system 430.Since the material of insulation system 430 is more hard, the encapsulation of fourth embodiment can be strengthened
The structural strength of structure 40.It is worth noting that, the thickness of insulation system 430 is less than the thickness of chip 424a, 424b, and do not cover
On the third surface S3 of cover core piece 424a, 424b, it can avoid clashing between chip 424a, 424b.In one embodiment,
The thickness of insulation system 430 can be between 10 μm to 100 μm.
In conclusion the present invention is using the support construction being configured in the wiring board and is configured at the first engagement pad
Insulation system on second surface reinforces the intensity of encapsulating structure, to solve the warpage issues of encapsulating structure, and then promotes encapsulation
The yield of structure.In addition, the present invention utilizes the first radiator structure and the second radiator structure again, encapsulating structure can be not only reduced
Temperature, can also further promote the intensity of encapsulating structure.
In addition, the manufacturing method of the present embodiment is first to form wiring board on thicker support plate.Then, then to the first metal
Layer is etched technique, to form multiple metal columns.In this way, on manufacturing process, the present embodiment also can avoid material compared with
Warpage issues occur in the fabrication process for soft wiring board, and then promote the yield of wiring board.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (18)
1. a kind of encapsulating structure characterized by comprising
Wiring board, the wiring board include layer reinforced structure, the second engagement pad and soldermask layer, and second engagement pad is configured at institute
It states between layer reinforced structure and the soldermask layer；
Support construction is configured in the wiring board, wherein the support construction includes rectilinear support construction；
First radiator structure is configured in the wiring board and is configured between the layer reinforced structure and second engagement pad,
Wherein first radiator structure and the rectilinear support construction are electrically connected, to form inverted U-shaped；
Multiple first engagement pads, are configured on the wiring board；
An at least chip is configured in first engagement pad of a part；And
Multiple metal columns are configured in first engagement pad of another part, wherein the metal column surrounds the chip.
2. encapsulating structure according to claim 1, which is characterized in that the layer reinforced structure includes:
Multiple dielectric layers；
Multiple patterned line layers, each patterned line layer are configured between the adjacent dielectric layer；And
Multiple first via holes, are configured in the dielectric layer, to be electrically connected the adjacent patterned line layer.
3. encapsulating structure according to claim 1, which is characterized in that the support construction further includes horizontal support knot
Structure.
4. encapsulating structure according to claim 1, which is characterized in that the rectilinear support construction has multiple second to lead
Through-hole is configured in the dielectric layer and is configured at around the wiring board, and second via hole is mutually aligned, to be formed
Continuous structure.
5. encapsulating structure according to claim 2 or 3, which is characterized in that the patterned line layer have master pattern with
And support pattern, the support pattern is configured at around the master pattern, to form the horizontal support construction, wherein institute
Stating support pattern is mesh pattern.
6. encapsulating structure according to claim 1, which is characterized in that further include that the second radiator structure is configured at the chip
On.
7. encapsulating structure according to claim 6, which is characterized in that the material of second radiator structure include silver, nickel,
Copper, aluminium, gold, palladium or combinations thereof.
8. encapsulating structure according to claim 1 or 6, which is characterized in that further include that insulation system is configured at described first
In engagement pad, wherein the insulation system does not cover the surface of the chip.
9. encapsulating structure according to claim 8, which is characterized in that the material of the insulation system include epoxy resin,
Polyimides or combinations thereof.
10. encapsulating structure according to claim 1, which is characterized in that further include:
Multiple convex blocks are configured between first engagement pad and the chip；And
Multiple etching stopping layers are configured between first engagement pad and the metal column.
11. a kind of manufacturing method of encapsulating structure characterized by comprising
Support plate is provided, the support plate includes the first metal layer, second metal layer and etching stopping layer, wherein the etch stop
Layer is configured between the first metal layer and the second metal layer；
The second metal layer is patterned, to form multiple first engagement pads；
Wiring board is formed on the first surface of first engagement pad, wherein the wiring board includes layer reinforced structure, second connects
Touch pad and soldermask layer, second engagement pad are configured between the layer reinforced structure and the soldermask layer；
Support construction is formed in the wiring board, wherein the support construction includes rectilinear support construction；
The first radiator structure is formed in the wiring board and between the layer reinforced structure and second engagement pad, wherein institute
It states the first radiator structure and the rectilinear support construction is electrically connected, to form inverted U-shaped；
The first metal layer is patterned, to form multiple metal columns；
The etching stopping layer not covered by the metal column is removed, the second surface of first engagement pad is exposed, wherein
The metal column is electrically connected to by first engagement pad and the etching stopping layer covered by the metal column
The wiring board；
An at least chip is formed on the second surface of first engagement pad, wherein the metal column surrounds the core
Piece.
12. the manufacturing method of encapsulating structure according to claim 11, which is characterized in that the layer reinforced structure includes:
Multiple dielectric layers；
Multiple patterned line layers, each patterned line layer are configured between the adjacent dielectric layer；And
Multiple first via holes, are configured in the dielectric layer, to be electrically connected the adjacent patterned line layer.
13. the manufacturing method of encapsulating structure according to claim 11, which is characterized in that the support construction further includes water
Flat support construction.
14. the manufacturing method of encapsulating structure according to claim 11, which is characterized in that the rectilinear support construction tool
There are multiple second via holes to be configured in the dielectric layer and be configured at around the wiring board, second via hole is mutual
Alignment, to form continuous structure.
15. the manufacturing method of encapsulating structure according to claim 12 or 13, which is characterized in that the patterned line layer
With master pattern and support pattern, the support pattern is configured at around the master pattern, to form the horizontal branch
Support structure, wherein the support pattern is mesh pattern.
16. the manufacturing method of encapsulating structure according to claim 11, which is characterized in that further include forming the second heat dissipation knot
Structure is on the third surface of the chip.
17. the manufacturing method of encapsulating structure described in 1 or 16 according to claim 1, which is characterized in that further include forming insulation knot
Structure is on the second surface of first engagement pad, wherein the insulation system does not cover the third table of the chip
On face.
18. the manufacturing method of encapsulating structure according to claim 11, which is characterized in that further include to be formed multiple convex blocks in
Between first engagement pad and the chip.
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| CN201510306987.4A CN106298707B (en) | 2015-06-05 | 2015-06-05 | Encapsulating structure and preparation method thereof |
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| CN106684056A (en) * | 2017-03-22 | 2017-05-17 | 中芯长电半导体（江阴）有限公司 | Fan-out type wafer-level packaging structure and preparation method thereof |
| CN107734227A (en) * | 2017-10-27 | 2018-02-23 | 昆山丘钛微电子科技有限公司 | Image sensor package structure, camera module and preparation method thereof |
| CN110241406B (en) * | 2019-07-26 | 2021-10-08 | 深圳市溢诚电子科技有限公司 | Preparation method of chemical gold-palladium-gold plating layer on plated PCB |
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| CN101150111A (en) * | 2006-09-20 | 2008-03-26 | 欣兴电子股份有限公司 | Encapsulation base plate |
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| TW200307494A (en) * | 2002-01-15 | 2003-12-01 | Sony Corp | Flexible multi-layered wiring substrate and its manufacturing method |
| CN101150111A (en) * | 2006-09-20 | 2008-03-26 | 欣兴电子股份有限公司 | Encapsulation base plate |
| CN102651352A (en) * | 2011-02-25 | 2012-08-29 | 富士通株式会社 | Semiconductor apparatus, method for manufacturing the same and electric device |
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