CN106148915A - 包含背部气体输送管路的衬底基座模块及其制造方法 - Google Patents

包含背部气体输送管路的衬底基座模块及其制造方法 Download PDF

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CN106148915A
CN106148915A CN201610312750.1A CN201610312750A CN106148915A CN 106148915 A CN106148915 A CN 106148915A CN 201610312750 A CN201610312750 A CN 201610312750A CN 106148915 A CN106148915 A CN 106148915A
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platen
bar
flange
gas
backside gas
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CN106148915B (zh
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特洛伊·艾伦·戈姆
尼克·拉伊·小林百格
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Lam Research Corp
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Lam Research Corp
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Abstract

本发明涉及包含背部气体输送管路的衬底基座模块及其制造方法。半导体衬底处理装置包括：具有其中能处理半导体衬底的处理区域的真空室；与真空室流体连通的工艺气体源以供给工艺气体到真空室中；工艺气体通过其从工艺气体源供给到真空室的处理区域的喷头模块；和衬底基座模块。衬底基座模块包括：由陶瓷材料制成的台板，其具有构造成在处理期间支承半导体衬底的上表面；由陶瓷材料制成的杆，其具有支撑台板的上部杆凸缘；和由陶瓷材料制成的背部气体管路，其位于杆的内部。背部气体管路包括位于台板的下表面与上部杆凸缘的上表面之间的上部气体管路凸缘，其中背部气体管路与台板的至少一个背部气体通道流体连通。

Description

包含背部气体输送管路的衬底基座模块及其制造方法
技术领域
本发明涉及用于处理半导体衬底的半导体衬底处理装置，并且可以发现在可操作以沉积薄膜的等离子体增强化学气相沉积处理装置中的特定用途。
背景技术
半导体衬底处理装置用于通过包括蚀刻、物理气相沉积(PVD)、化学气相沉积(CVD)、等离子体增强化学气相沉积(PECVD)、原子层沉积(ALD)、等离子体增强原子层沉积(PEALD)、脉冲沉积层(PDL)、等离子体增强脉冲沉积层(PEPDL)处理和抗蚀剂去除的技术处理半导体衬底。半导体衬底处理装置的一种类型是包括含有上电极和下电极的反应室的等离子体处理装置，其中在电极之间施加射频(RF)功率，以将工艺气体激发成用于处理反应室中的半导体衬底的等离子体。
发明内容
本发明公开了一种用于处理半导体衬底的半导体衬底处理装置。所述半导体衬底处理装置包括：真空室，其包括处理区域，半导体衬底能在该处理区域中被处理；工艺气体源，其与所述真空室流体连通以供应工艺气体到所述真空室中；喷头模块，工艺气体从工艺气体源通过该喷头模块供给到所述真空室的所述处理区域；以及衬底基座模块。所述衬底基座模块包括：台板，其由陶瓷材料制成，所述台板具有上表面，该上表面被构造成在处理期间将半导体衬底支承在其上；杆，其由陶瓷材料制成，所述杆具有支撑所述台板的上部杆凸缘；和背部气体管路，其由陶瓷材料制成，位于所述杆的内部。所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
本文还公开了一种半导体衬底处理装置的衬底基座模块。衬底基座模块包括：台板，其具有上表面，该上表面被配置为在处理期间将半导体衬底支承在该上表面上；杆，其具有支撑所述台板的上部杆凸缘和位于所述杆的内部的背部气体管路。所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
本文还公开了制造半导体衬底处理装置的衬底基座模块的方法。制造所述衬底基座模块的所述方法包括：将上部气体管路凸缘的上陶瓷表面布置成抵靠台板的下陶瓷表面，以及将上部气体管路凸缘的所述上陶瓷表面扩散结合到所述台板的所述下陶瓷表面以形成真空密封。
具体而言，本发明的一些方面可以阐述如下：
1.一种用于处理半导体衬底的半导体衬底处理装置，其包括：
真空室，其包括半导体衬底能在其中被处理的处理区域；
工艺气体源，其与所述真空室流体连通，以供给工艺气体到所述真空室中；
喷头模块，工艺气体从所述工艺气体源通过该喷头模块供给到所述真空室的所述处理区域；以及
衬底基座模块，其包括：台板，其由陶瓷材料制成，所述台板具有构造成在处理期间在其上支承半导体衬底的上表面；杆，其由陶瓷材料制成，所述杆具有支撑所述台板的上部杆凸缘；和背部气体管路，其由陶瓷材料制成，位于所述杆的内部，所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
2.根据条款1所述的半导体衬底处理装置，其中所述半导体衬底处理装置包括：
(a)RF能量源，其适于在所述处理区域中将所述工艺气体激发成等离子体状态；
(b)控制系统，其被配置为控制由所述半导体衬底处理装置执行的工艺；和/或
(c)非暂时性计算机机器可读介质，其包括用于控制所述半导体衬底处理装置的程序指令。
3.根据条款1所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面被扩散接合到所述台板的下表面且所述上部气体管路凸缘的下表面被扩散接合到所述上部杆凸缘的上表面，从而在所述杆的内部与所述真空室之间形成真空密封。
4.根据条款3所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面与所述台板的下表面之间的接触面积大致等于所述上部气体管路凸缘的下表面与所述上部杆凸缘的上表面之间的接触面积。
5.根据条款1所述的半导体衬底处理装置，其中，在所述气体管路凸缘的一部分与所述台板的下表面之间形成间隙或者在所述上部气体管路凸缘的上表面与所述台板的下表面之间没有间隙。
6.根据条款1所述的半导体衬底处理装置，其中：
(a)所述背部气体管路、所述台板和/或所述杆由氮化铝制成；
(b)所述背部气体管路包括在所述上部气体管路凸缘中的至少一个开口，使得至少一个相应的电气连接件能延伸通过所述上部气体管路凸缘；
(c)所述背部气体管路位于所述杆的内部的中心或者所述背部气体管路偏离所述杆的内部的中心；和/或
(d)所述半导体衬底处理装置是化学气相沉积装置、等离子体增强化学气相沉积装置、原子层沉积装置、等离子体增强原子层沉积装置、脉冲沉积层装置、或等离子体增强的脉冲沉积层装置。
7.根据条款1所述的半导体衬底处理装置，其中所述衬底基座模块还包括：
(a)至少一个静电夹持电极，其嵌入所述台板；
(b)下RF电极，其嵌入所述台板；
(c)至少一个加热器，其嵌入所述台板；
(d)多个升降销，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；
(e)台面图案，其形成于所述台板的上表面上；
(f)承载圈，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；或者
(g)嵌入其中的单个电极，其能操作以用作静电夹持电极和RF电极。
8.根据条款1所述的半导体衬底处理装置，其还包括背部气体供给源，其能操作以供给背部气体通过与所述台板的至少一个背部气体通道流体连通的所述背部气体管路，使得背部气体能供给到在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的所述区域。
9.根据条款1所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的外周位于不超过所述台板的外径的四分之一的所述台板的半径上。
10.一种半导体衬底处理装置的衬底基座模块，所述衬底基座模块包括：
台板，其由陶瓷材料制成，所述台板具有被配置为在处理期间在其上支承半导体衬底的上表面；
杆，其由陶瓷材料制成，所述杆具有支撑所述台板的上部杆凸缘；以及
背部气体管路，其由陶瓷材料制成，所述背部气体管路位于所述杆的内部，所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
11.根据条款10所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面被扩散接合到所述台板的下表面且所述上部气体管路凸缘的下表面被扩散接合到所述上部杆凸缘的上表面以形成真空密封。
12.根据条款11所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面与所述台板的下表面之间的接触面积大致等于所述上部气体管路凸缘的下表面与所述上部杆凸缘的上表面之间的接触面积。
13.根据条款10所述的半导体衬底处理装置，其中，在所述上部气体管路凸缘的一部分与所述台板的下表面之间形成间隙或者在所述上部气体管路凸缘的上表面与所述台板的下表面之间没有间隙。
14.根据条款10所述的半导体衬底处理装置，其中：
(a)所述背部气体管路、所述台板和/或所述杆由氮化铝制成；
(b)所述背部气体管路包括在所述上部气体管路凸缘中的至少一个开口，使得至少一个相应的电气连接件能延伸通过所述上部气体管路凸缘；和/或
(c)所述背部气体管路位于所述杆的内部的中心或者所述背部气体管路偏离所述杆的内部的中心。
15.根据条款10所述的半导体衬底处理装置，其中所述衬底基座模块还包括：
(a)至少一个静电夹持电极，其嵌入所述台板；
(b)下RF电极，其嵌入所述台板；
(c)至少一个加热器，其嵌入所述台板；
(d)多个升降销，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；
(e)台面图案，其在所述台板的上表面上形成；
(f)承载圈，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；或者
(g)嵌入其中的单个电极，其能操作以用作静电夹持电极和RF电极。
16.一种制造半导体衬底处理装置的衬底基座模块的方法，所述方法包括：
将上部气体管路凸缘的上陶瓷表面布置成抵靠台板的下陶瓷表面；以及
将所述上部气体管路凸缘的上陶瓷表面扩散接合到所述台板的下陶瓷表面以便形成真空密封。
17.根据条款16所述的方法，还包括：
将上部杆凸缘的上陶瓷表面布置成抵靠所述上部气体管路凸缘的下陶瓷表面；以及
在将所述上部气体管路凸缘的上陶瓷表面扩散接合到所述台板的下陶瓷表面的同时，将所述上部杆凸缘的上陶瓷表面扩散接合到所述上部气体管路凸缘的下陶瓷表面，以形成真空密封，或者在将所述上部气体管路凸缘的上陶瓷表面扩散接合到所述台板的下陶瓷表面之后，将所述上部杆凸缘的上陶瓷表面扩散接合到所述上部气体管路凸缘的下陶瓷表面，以形成真空密封。
18.一种在根据条款1所述的半导体衬底处理装置中处理半导体衬底的方法，其包括：
从所述工艺气体源供给所述工艺气体到所述处理区域；以及
处理支承在所述台板的上表面上的半导体衬底。
19.根据条款18所述的方法，还包括将背部热传输气体或吹扫气体供给通过所述背部气体管路至在处理期间支承在所述台板的上表面上的半导体衬底的下表面下方的区域。
20.根据条款18所述的方法，其中所述处理是化学气相沉积、等离子体增强化学气相沉积、原子层沉积、等离子体增强原子层沉积、脉冲沉积层和/或等离子体增强脉冲沉积层中的至少一种。
附图说明
图1根据本发明所公开的实施方式示出了化学沉积装置的示意图。
图2根据本发明所公开的一个实施方式示出了衬底基座模块的横截面。
图3根据本发明所公开的一个实施方式示出了衬底基座模块的横截面。
具体实施方式
在下面的详细说明中，为了提供对本发明所公开的装置和方法的充分理解，阐述了许多具体的实施方式。但对于本领域技术人员而言，显而易见，在没有这些具体细节的情况下或者通过使用替代的元件或方法，仍可以实施本发明的实施方式。在其他的示例中，为了避免不必要地使本发明所公开的实施方式的方面难以理解，公知的工艺、过程和/或部件没有详细描述。如本文所用的术语“约”是指±10％。
如所指出的，所述实施方式提供用于处理在例如化学气相沉积装置或等离子体增强化学气相沉积装置之类的半导体衬底处理装置中的半导体衬底的装置和相关方法。该装置和方法特别适用于与半导体衬底的高温处理结合使用，所述高温处理如高温沉积处理，其中正被处理的半导体衬底被加热到温度高于约550℃，例如约550℃至约650℃或高于650℃。
本发明所公开的实施方式优选在等离子体增强化学沉积装置(即PECVD装置、PEALD装置或PEPDL装置)中实施，然而，它们并不限于此。图1提供了描绘布置用于实施根据本发明所公开的实施方式的各种半导体衬底等离子体处理装置的组件的简单框图。如图所示，半导体衬底等离子体处理装置300包括用于容纳处理区域中的等离子体的真空室324，所述等离子体可以通过电容类型的系统来产生，该电容类型的系统包括与其中具有下RF电极(未示出)的衬底基座模块320结合工作的其中具有上RF电极(未示出)的喷头模块314。至少一个RF产生器可操作以供给RF能量到真空室324中的半导体衬底316的上表面上方的处理区域，以将供给到真空室324的处理区域中的工艺气体激励成等离子体，使得等离子体沉积处理可在真空室324中进行。例如，高频RF产生器302和低频RF产生器304的每一个可以连接到匹配网络306，匹配网络306连接至喷头模块314的上RF电极，使得RF能量可被供给到真空室324中的半导体衬底316上方的处理区域。
通过匹配网络306供给到真空室324的内部的RF能量的功率和频率足以使等离子体从工艺气体产生。在一个实施方式中，使用高频RF产生器302和低频RF产生器304两者，而在替代的实施方式中，仅使用高频RF产生器302。在处理中，高频RF产生器302可以在约2-100MHz的频率下操作；在优选实施方式中，高频RF产生器302可以在13.56MHz或27MHz的频率下操作。低频RF产生器304可以在约50kHz至2MHz下操作；在优选的实施方式中，可以在约350kHz至600kHz下操作。工艺参数可基于室体积、衬底尺寸和其他因素按比例确定。同样地，工艺气体的流率可取决于真空室或处理区域的自由体积。
衬底基座模块320的上表面支承在处理期间在真空室324内的半导体衬底316。衬底基座模块320可以包括卡盘以容纳半导体衬底，和/或升降销以在沉积和/或等离子体处理工艺之前、期间和/或之后升高和降低半导体衬底。在一个替代的实施方式中，衬底基座模块320可以包括承载圈以在沉积和/或等离子体处理工艺之前、期间和/或之后升高和降低半导体衬底。卡盘可以是静电卡盘、机械卡盘，或如可用于工业和/或研究用途的各种其它类型的卡盘。在共同转让的美国专利No.8,840,754中可发现用于包含静电卡盘的衬底基座模块的升降销组件的细节，该专利的全部内容通过引用并入本文。在共同转让的美国专利No.6,860,965中可发现用于衬底基座模块的承载圈的细节，该专利的全部内容通过引用并入本文。背部气体供应器341可操作以在处理期间供应热传输气体或吹扫气体通过衬底基座模块320到半导体衬底的下表面下方的区域。衬底基座模块320包括在其中的下RF电极，其中下RF电极在处理期间优选地接地，然而在替代实施方式中，下RF电极在处理期间可被供给有RF能量。
为了处理半导体衬底等离子体处理装置300的真空室324中的半导体衬底，将工艺气体从工艺气体源362经由入口312和喷头模块314引入真空室324，其中用RF能量使工艺气体形成等离子体，使得膜可以被沉积在半导体衬底的上表面上。在一个实施方式中，多个源气体管线310可以连接到加热的歧管308。气体可以预先混合或单独供给到室。适当的阀和质量流量控制机构用于在半导体衬底处理期间确保正确的气体被输送通过喷头模块314。在处理期间，背部热传输气体或吹扫气体被供给到衬底基座模块320上支承的半导体衬底的下表面下方的区域中。优选地，所述处理是化学气相沉积处理、等离子体增强化学气相沉积处理、原子层沉积处理、等离子体增强原子层沉积处理、脉冲沉积层处理或等离子体增强脉冲沉积层处理中的至少一种。
在某些实施方式中，采用系统控制器162来控制在沉积期间、沉积处理后、和/或其他处理操作的工艺条件。控制器162典型地将包括一个或多个存储器设备和一个或多个处理器。所述处理器可以包括CPU或计算机、模拟和/或数字输入/输出连接、步进电机控制器板等。
在某些实施方式中，系统控制器162控制装置的所有活动。系统控制器162执行包括用于控制处理操作的定时、低频RF产生器304和高频RF产生器302的工作频率和功率、前体和惰性气体的流率和温度以及它们的相对的混合、支承在衬底基座模块320的上表面上的半导体衬底316和喷头组件314的等离子体暴露表面的温度、真空室324的压力、以及特定工艺的其它参数的指令集的系统控制软件。在一些实施方式中，可以采用存储在与控制器相关联的存储器设备的其他计算机程序。
典型地，将存在与控制器162相关联的用户界面。用户界面可以包括显示屏、装置和/或工艺条件的图形软件显示器、以及诸如定点设备、键盘、触摸屏、麦克风等用户输入设备。
非短暂性计算机的机器可读介质可包括用于控制该装置的程序指令。用于控制处理操作的计算机程序代码可以用任何常规的计算机可读编程语言来编写：例如，汇编语言、C、C++、Pascal、Fortran或其它编程语言。编译的对象编码或脚本由处理器执行以执行在程序中识别的任务。
所述控制器参数涉及诸如，例如，处理步骤的定时，前体和惰性气体的流率和温度，半导体衬底的温度，室的压力和特定工艺的其它参数之类的工艺条件。这些参数以配方的形式提供给用户，并且可以利用用户界面输入。
用于监控工艺的信号可以由系统控制器的模拟和/或数字输入连接来提供。用于控制工艺的信号通过装置的模拟和数字输出连接被输出。
系统软件可以用许多不同的方式设计或配置。例如，多个室部件子程序或控制对象可以被写入以控制要进行沉积处理所必须的室组件的操作。用于此目的程序或程序的部分的实例包括衬底的处理步骤的定时编码、前体和惰性气体的流率和温度编码、以及真空室324的压强编码。
图2和3根据本发明所公开的实施方式示出了衬底基座模块320的横截面。如图2和3所示，衬底基座模块320包括由陶瓷材料制成的台板205，所述台板具有在半导体衬底的处理期间在其上支承半导体衬底的上表面206。由陶瓷材料制成的杆210从台板205的下表面208向下延伸，其中杆210包括支撑台板205的上部杆凸缘215和可连接到基部或适配器(未示出)的下部杆凸缘220，使得衬底基座模块320可以被支撑在半导体处理装置的真空室中。通过用陶瓷材料而不是用例如铝或铝合金等金属材料制造衬底基座模块320，衬底基座模块320可以承受在高温衬底处理过程中实现的高温，如高于约550℃的温度或高于约650℃的温度。
衬底基座模块320包括位于杆210的内部213的由陶瓷制成的背部气体管路250。在一个实施方式中，背部气体管路250居中地位于杆210的内部213。在替代的实施方式中，背部气体管路250偏离杆210的内部的中心。背部气体管路250包括位于台板205的下表面208与上部杆凸缘215的上表面之间的上部气体管路凸缘253。背部气体管路250与台板205的至少一个背部气体通道207流体连通，使得背部气体可以通过背部气体管路250和背部气体通道207供给至在处理期间支撑在台板205的上表面206上的半导体衬底的下表面下方的区域。在一个实施方式中，上部杆凸缘215的外径和上部气体管路凸缘253的外径可以等于或约等于台板205的外径。优选地，上部杆凸缘215的外径和上部气体管路凸缘253的外径小于台板205的外径。选择上部杆凸缘215的外径、上部气体管路凸缘253的外径和杆210的外径，以及杆210壁的厚度，使得杆210的内部213(在处理期间保持在大气压强)能容纳被设置在内部213的电气连接件并能承受围绕杆210的真空压强与在杆210的内部213中的大气强之间的压力差。优选地，上部气体管路凸缘253的外周位于台板205的不超过台板205的外径的四分之一的半径上。
台板205可包括嵌入其中的至少一个静电夹持电极209，其中该至少一个静电夹持电极209可操作以在处理期间静电夹持半导体衬底在台板205的上表面上。如图2所示，台板205还可以包括下RF电极265，下RF电极265在半导体衬底的处理期间可以接地或被供给有RF功率。优选地，如图3所示，台板205包括嵌入其中的既用作静电夹持电极又用作RF电极的仅仅单个电极209a。返回参照图2和3，台板205还可以包括嵌入其中的至少一个加热器260，所述至少一个加热器260可操作以在处理期间控制整个台板205的上表面206的温度并且由此控制整个半导体衬底的温度。该至少一个加热器260可包括电阻性加热器膜和/或一个或多个热电模块。优选地，被布置在杆210的内部213中的连接到至少一个静电夹持电极209、至少一个加热器260、单个电极209a和/或下RF电极265的电气连接件延伸通过在上部气体管路凸缘253的相应开口251，使得电气连接件可分别连接到与相应的至少一个静电夹持电极209、至少一个加热器260、单个电极209a和/或下RF电极265电连通的在台板205中形成的电触点(未示出)。以这种方式，至少一个静电夹持电极209、至少一个加热器260、单个电极209a和/或下RF电极265可在半导体衬底的处理期间被供电。
在一个实施方式中，台板205可包括扩散接合在一起的分层，其中，至少一个静电夹持电极209、下RF电极265(或单个电极209a)，以及至少一个加热器260可以夹在台板205的分层之间。台板205的上表面206优选地包括在其中形成的台板图案206a，其中半导体衬底的下表面被支撑在台面图案206a上，背部吹扫气体或背部热传输气体可被提供给在台面图案206a的台面之间的半导体衬底下方的区域。可以在共同转让的美国专利No.7,869,184中发现台面图案和形成台面图形的方法的示范性实施方式，该专利的全部内容通过引用并入本文。
台板205的暴露表面、杆210和背部气体管路250由陶瓷材料制成，从而优选地当台板205、杆210和/或背部气体管路250被暴露于处理条件时在处理期间不导致衬底的污染。优选地，台板205的暴露表面、杆210和/或背部气体管路250由氮化铝制成。上部气体管路凸缘253的上表面优选扩散接合到台板205的下表面208，上部气体管路凸缘253的下表面优选扩散接合到上部杆凸缘215的上表面，以便在杆210的内部213与其中设置衬底基座模块320的真空室之间形成真空密封。优选地，上部气体管路凸缘253的上表面与台板205的下表面208之间的接触面积大致等于上部气体管路凸缘253的下表面与上部杆凸缘215的上表面之间的接触面积。更优选地，上部气体管路凸缘253的上表面与台板205的下表面208之间的接触面积等于上部气体管路凸缘253的下表面与上部杆凸缘215的上表面之间的接触面积。图2示出了衬底基座模块320的一个实施方式，其中上部气体管路凸缘253的上表面与台板205的下表面208之间的接触面积等于上部气体管路凸缘253的下表面与上部杆凸缘215的上表面之间的接触面积。在此实施方式中，在上部气体管路凸缘253的一部分与台板205的下表面208之间形成间隙230。在替代的实施方式中，如图3所示，可以形成衬底基座模块320使得在上部气体管路凸缘253的上表面与台板205的下表面208之间没有间隙。
本文进一步公开的是制造衬底基座模块320的方法。制造衬底基座模块320的方法包括将上部气体管路凸缘253的上陶瓷表面布置成抵靠台板205的下陶瓷表面208。上部气体管路凸缘253的上陶瓷表面扩散接合到台板205的下陶瓷表面208。在一个实施方式中，在上部杆凸缘215的上陶瓷表面被扩散接合到上部气体管路凸缘253的下陶瓷表面时，上部杆凸缘215的上陶瓷表面被布置成同时抵靠上部气体管路凸缘253的下陶瓷表面，其中上部气体管路凸缘253的上陶瓷表面同时扩散接合到台板205的下陶瓷表面。为了在将上部杆凸缘215的上陶瓷表面扩散结合到上部气体管路凸缘253的下陶瓷表面的同时，将上部气体管路凸缘253的上陶瓷表面扩散结合到台板205的下陶瓷表面，上部杆凸缘215的上陶瓷表面与上部气体管路凸缘253的下陶瓷表面之间的接触面积以及上部气体管路凸缘253的上陶瓷表面与台板205的下陶瓷表面208之间的接触面积相等或大致相等，使得扩散接合在一起的陶瓷表面形成真空密封。以这种方式，台板205、杆210和背部气体管路250可在单个扩散接合工艺中被一体地连接。
在替代的实施方式中，如果上部气体管路凸缘253的上陶瓷表面与台板205的下陶瓷表面208之间的接触面积不等于上部气体管路凸缘253的下陶瓷表面与上部杆凸缘215的上陶瓷表面之间的接触面积，那么上部气体管路凸缘253的上陶瓷表面首先扩散接合到台板205的下陶瓷表面208，随后上部杆凸缘215的上陶瓷表面扩散接合到上部气体管路凸缘253的下陶瓷表面。
虽然半导体衬底处理装置的衬底基座模块参照其具体实施方式进行了详细描述，但对那些本领域技术人员而言，显而易见，在不脱离所附权利要求的范围的情况下可以做出各种变化和修改，并可以采用等同方案。

Claims (10)

1.一种用于处理半导体衬底的半导体衬底处理装置，其包括：
真空室，其包括半导体衬底能在其中被处理的处理区域；
工艺气体源，其与所述真空室流体连通，以供给工艺气体到所述真空室中；
喷头模块，工艺气体从所述工艺气体源通过该喷头模块供给到所述真空室的所述处理区域；以及
衬底基座模块，其包括：台板，其由陶瓷材料制成，所述台板具有构造成在处理期间在其上支承半导体衬底的上表面；杆，其由陶瓷材料制成，所述杆具有支撑所述台板的上部杆凸缘；和背部气体管路，其由陶瓷材料制成，位于所述杆的内部，所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
2.根据权利要求1所述的半导体衬底处理装置，其中所述半导体衬底处理装置包括：
(a)RF能量源，其适于在所述处理区域中将所述工艺气体激发成等离子体状态；
(b)控制系统，其被配置为控制由所述半导体衬底处理装置执行的工艺；和/或
(c)非暂时性计算机机器可读介质，其包括用于控制所述半导体衬底处理装置的程序指令。
3.根据权利要求1所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面被扩散接合到所述台板的下表面且所述上部气体管路凸缘的下表面被扩散接合到所述上部杆凸缘的上表面，从而在所述杆的内部与所述真空室之间形成真空密封。
4.根据权利要求3所述的半导体衬底处理装置，其中，所述上部气体管路凸缘的上表面与所述台板的下表面之间的接触面积大致等于所述上部气体管路凸缘的下表面与所述上部杆凸缘的上表面之间的接触面积。
5.根据权利要求1所述的半导体衬底处理装置，其中，在所述气体管路凸缘的一部分与所述台板的下表面之间形成间隙或者在所述上部气体管路凸缘的上表面与所述台板的下表面之间没有间隙。
6.根据权利要求1所述的半导体衬底处理装置，其中：
(a)所述背部气体管路、所述台板和/或所述杆由氮化铝制成；
(b)所述背部气体管路包括在所述上部气体管路凸缘中的至少一个开口，使得至少一个相应的电气连接件能延伸通过所述上部气体管路凸缘；
(c)所述背部气体管路位于所述杆的内部的中心或者所述背部气体管路偏离所述杆的内部的中心；和/或
(d)所述半导体衬底处理装置是化学气相沉积装置、等离子体增强化学气相沉积装置、原子层沉积装置、等离子体增强原子层沉积装置、脉冲沉积层装置、或等离子体增强的脉冲沉积层装置。
7.根据权利要求1所述的半导体衬底处理装置，其中所述衬底基座模块还包括：
(a)至少一个静电夹持电极，其嵌入所述台板；
(b)下RF电极，其嵌入所述台板；
(c)至少一个加热器，其嵌入所述台板；
(d)多个升降销，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；
(e)台面图案，其形成于所述台板的上表面上；
(f)承载圈，其被配置成降低和升高半导体衬底以使其往返于所述台板的上表面；或者
(g)嵌入其中的单个电极，其能操作以用作静电夹持电极和RF电极。
8.一种半导体衬底处理装置的衬底基座模块，所述衬底基座模块包括：
台板，其由陶瓷材料制成，所述台板具有被配置为在处理期间在其上支承半导体衬底的上表面；
杆，其由陶瓷材料制成，所述杆具有支撑所述台板的上部杆凸缘；以及
背部气体管路，其由陶瓷材料制成，所述背部气体管路位于所述杆的内部，所述背部气体管路包括位于所述台板的下表面与所述上部杆凸缘的上表面之间的上部气体管路凸缘，其中所述背部气体管路与所述台板的至少一个背部气体通道流体连通，并且所述背部气体管路被配置为供给背部气体至在处理期间要支撑在所述台板的上表面上的半导体衬底的下表面下方的区域。
9.一种制造半导体衬底处理装置的衬底基座模块的方法，所述方法包括：
将上部气体管路凸缘的上陶瓷表面布置成抵靠台板的下陶瓷表面；以及
将所述上部气体管路凸缘的上陶瓷表面扩散接合到所述台板的下陶瓷表面以便形成真空密封。
10.一种在根据权利要求1所述的半导体衬底处理装置中处理半导体衬底的方法，其包括：
从所述工艺气体源供给所述工艺气体到所述处理区域；以及
处理支承在所述台板的上表面上的半导体衬底。
CN201610312750.1A 2015-05-12 2016-05-12 包含背部气体输送管路的衬底基座模块及其制造方法 Active CN106148915B (zh)

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