CN106125433B - A kind of array substrate wire structures, liquid crystal display panel and liquid crystal display - Google Patents
A kind of array substrate wire structures, liquid crystal display panel and liquid crystal display Download PDFInfo
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- CN106125433B CN106125433B CN201610763655.3A CN201610763655A CN106125433B CN 106125433 B CN106125433 B CN 106125433B CN 201610763655 A CN201610763655 A CN 201610763655A CN 106125433 B CN106125433 B CN 106125433B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
Abstract
It includes several routing cells that the present invention, which provides a kind of array substrate wire structures, each routing cell includes first to Article 8 data line, first to Article 5 grid line and film transistor matrix, first, four, six and seven data lines are the first data line, second, three, five and eight data lines are the second data line, and the polarity of first and second data line is opposite, first data line connects the source electrode of the thin film transistor (TFT) of odd-numbered line odd column and even number line even column in respective sets column, second data line connects the source electrode of the thin film transistor (TFT) of odd-numbered line even column and even number line odd column in respective sets column, second, four grid line connections are located at the grid of two thin film transistor (TFT)s of the adjacent rows of the first data line side, first, three and five grid line connections are located at the grid of two thin film transistor (TFT)s of the adjacent rows of the second data line side , so that the polarity of each of corresponding picture element matrix of film transistor matrix pixel is opposite with the polarity of the pixel of arbitrary neighborhood.
Description
Technical field
The present invention relates to display field more particularly to a kind of array substrate wire structures, display display panel and liquid crystal
Show device.
Background technique
Traditional red, green, blue, Bai Sise LTPS (Low Temperature Poly-silicon, low temperature polycrystalline silicon skill
Art) in display technology, in order to reduce limb number at driving integrated chip and be fanned out to cabling, often designs splitter and walk one
Line is divided into 4 data lines, by timing come pixel data line.But will lead to so any one be fanned out to it is adjacent under line traffic control
4 data lines polarity it is identical, liquid crystal is accomplished that 4 column inversion modes during polarity inverts, in this way can be greatly
It is big to reduce image display quality.It is anti-come the limit for improving panel to generally use the adjacent data line intersection thread-changing for being fanned out to existing control line
Rotary-die type, then the dot inversion mode of the polarity reversion realization panel by data line.Although can improve picture in this way shows matter
Amount, but driving integrated chip can frequently change the polarity of data line output in this way, to considerably increase driving integrated chip
Driving power consumption.
Summary of the invention
The present invention provides a kind of array substrate wire structures, to reduce the temperature of the data driving chip of LCD TV.This
Invention also provides a kind of liquid crystal display panel and liquid crystal display.
The present invention provides kind of an array substrate wire structures, is applied in liquid crystal display panel, the array substrate wire bond
Structure includes several routing cells, several routing cells from left to right successively arrangement setting from top to bottom, wherein each wiring
Unit include first from left to right to arrange arrange from top to bottom to Article 8 data line, successively first to Article 5 grid
Line, and the thin film transistor (TFT) arranged with 4 × 8 matrix forms, first and second described data line form first group of data line, institute
It states third and Article 4 data line forms second group of data line, the described 5th and Article 6 data line form third group data line,
Described 7th and Article 8 data line formed the 4th group of data line, described first, the four, the 6th and Article 7 data line be first
Data line, it is described second, third, the 5th and Article 8 data line be the second data line, and the polarity of first data line with
The polarity of second data line is on the contrary, the corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, first data
Line connects the source electrode of the thin film transistor (TFT) of odd-numbered line odd column and even number line even column in respective sets column, second data line
Connect the source electrode of the thin film transistor (TFT) of the odd-numbered line even column and even number line odd column in respective sets column, second, Article 4 grid
Line connection is located at the grid of two thin film transistor (TFT)s of the adjacent rows of the first data line side, first, third and Article 5 grid
Line connection is located at the grid of two thin film transistor (TFT)s of the adjacent rows of the second data line side, so that the thin film transistor (TFT) square
The polarity of each of the corresponding picture element matrix of battle array pixel is opposite with the polarity of the pixel of arbitrary neighborhood；
Wherein, the grid line of the array substrate wire structures is successively opened from first grid line to a last grid
Line is a cycle, and in one cycle, the polarity of the data line is constant.
Wherein, when first data line exports positive voltage signal, second data line exports negative voltage signal；Work as institute
It states the first data line and switches to negative voltage signal, second data line also accordingly switches to positive voltage signal.
Wherein, first in the first row to the 8th column thin film transistor (TFT) source electrode be respectively connected to first, second, the
Four, on third, the six, the five, the 7th and Article 8 data line, the first, the four, the 6th and the 7th column film in the first row is brilliant
The grid of body pipe is connected to Article 2 grid line, in the first row second, third, the 5th and the 8th column thin film transistor (TFT) grid
It is connected to first grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in second row is respectively connected to second, the
One, the first, the four, the 6th and the 7th column on third, the four, the five, the six, the 8th and Article 7 data line, in the second row
The grid of thin film transistor (TFT) is connected to Article 2 grid line, in the second row second, third, the 5th and the 8th column thin film transistor (TFT)
Grid be connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in the third line is respectively connected to the
One, second, the 4th, third, the six, the five, the 7th and Article 8 data line on, in the third line first, the four, the 6th and
The grid of 7th column thin film transistor (TFT) is connected to Article 4 grid line, in the third line second, third, the 5th and the 8th column film
The grid of transistor is connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in fourth line connects respectively
Be connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line on, first, the 4th, in fourth line
The grid of six and the 7th column thin film transistor (TFT) is connected to Article 4 grid line, in fourth line second, third, the 5th and the 8th column
The grid of thin film transistor (TFT) is connected to Article 5 grid line.
The present invention provides a kind of liquid crystal display panel, comprising:
Several routing cells, several routing cells from left to right successively arrangement setting from top to bottom, wherein Mei Yibu
Line unit include first from left to right to arrange arrange from top to bottom to Article 8 data line, successively first to Article 5 grid
Line, and the thin film transistor (TFT) arranged in the form of 4 × 8 formal matrices；
Pixel array, the pixel array include several pixel units, and each pixel unit is with the progress of 4 × 8 matrix forms
Arrangement, the pixel unit are from left to right successively arranged from top to bottom, and corresponding corresponding film transistor matrix；
Wherein, first and second described data line forms first group of data line, and the third and Article 4 data are linear
At second group of data line, the described 5th and Article 6 data line form third group data line, the described 7th and Article 8 data line
Form the 4th group of data line, described first, the four, the 6th and Article 7 data line are the first data line, it is described second, third,
5th and Article 8 data line be the second data line, and the polarity phase of the polarity of first data line and second data line
Instead, the corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, the odd number in the first data line connection respective sets column
The source electrode of the thin film transistor (TFT) of row odd column and even number line even column, second data line connect the odd-numbered line in respective sets column
The source electrode of the thin film transistor (TFT) of even column and even number line odd column, second, Article 4 grid line connection be located at the first data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, first, third and the connection of Article 5 grid line are located at the second data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, so that every in the corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of one pixel is opposite；
Wherein, the grid line of the liquid crystal display panel, which is successively opened from first grid line to a last grid line, is
A cycle, in one cycle, the polarity of the data line are constant.
Wherein, when first data line exports positive voltage signal, second data line exports negative voltage signal；Work as institute
It states the first data line and switches to negative voltage signal, second data line also accordingly switches to positive voltage signal.
Wherein, first in the first row to the 8th column thin film transistor (TFT) source electrode be respectively connected to first, second, the
Four, on third, the six, the five, the 7th and Article 8 data line, the first, the four, the 6th and the 7th column film in the first row is brilliant
The grid of body pipe is connected to Article 2 grid line, in the first row second, third, the 5th and the 8th column thin film transistor (TFT) grid
It is connected to first grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in second row is respectively connected to second, the
One, the first, the four, the 6th and the 7th column on third, the four, the five, the six, the 8th and Article 7 data line, in the second row
The grid of thin film transistor (TFT) is connected to Article 2 grid line, in the second row second, third, the 5th and the 8th column thin film transistor (TFT)
Grid be connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in the third line is respectively connected to the
One, second, the 4th, third, the six, the five, the 7th and Article 8 data line on, in the third line first, the four, the 6th and
The grid of 7th column thin film transistor (TFT) is connected to Article 4 grid line, in the third line second, third, the 5th and the 8th column film
The grid of transistor is connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in fourth line connects respectively
Be connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line on, first, the 4th, in fourth line
The grid of six and the 7th column thin film transistor (TFT) is connected to Article 4 grid line, in fourth line second, third, the 5th and the 8th column
The grid of thin film transistor (TFT) is connected to Article 5 grid line.
The present invention provides a kind of liquid crystal display, including liquid crystal display panel, backlight module and drive control circuit, described
Light needed for backlight module is used to provide the described liquid crystal display panel, the liquid crystal display panel include several routing cells,
Several routing cells from left to right successively arrangement setting from top to bottom, wherein each routing cell includes from left to right arranging
The first of cloth arrange from top to bottom to Article 8 data line, successively first to Article 5 grid line, and with 4 × 8 matrix forms
The thin film transistor (TFT) of arrangement；
Pixel array, the pixel array include several pixel units, and each pixel unit is with the progress of 4 × 8 matrix forms
Arrangement, the pixel unit are from left to right successively arranged from top to bottom, and corresponding corresponding film transistor matrix；The driving
Control circuit is for controlling the pixel array；
Wherein, first and second described data line forms first group of data line, and the third and Article 4 data are linear
At second group of data line, the described 5th and Article 6 data line form third group data line, the described 7th and Article 8 data line
Form the 4th group of data line, described first, the four, the 6th and Article 7 data line are the first data line, it is described second, third,
5th and Article 8 data line be the second data line, and the polarity phase of the polarity of first data line and second data line
Instead, the corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, the odd number in the first data line connection respective sets column
The source electrode of the thin film transistor (TFT) of row odd column and even number line even column, second data line connect the odd-numbered line in respective sets column
The source electrode of the thin film transistor (TFT) of even column and even number line odd column, second, Article 4 grid line connection be located at the first data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, first, third and the connection of Article 5 grid line are located at the second data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, so that every in the corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of one pixel is opposite；
Wherein, the grid line of the liquid crystal display panel, which is successively opened from first grid line to a last grid line, is
A cycle, in one cycle, the polarity of the data line are constant.
Wherein, when first data line exports positive voltage signal, second data line exports negative voltage signal；Work as institute
It states the first data line and switches to negative voltage signal, second data line also accordingly switches to positive voltage signal.
Wherein, first in the first row to the 8th column thin film transistor (TFT) source electrode be respectively connected to first, second, the
Four, on third, the six, the five, the 7th and Article 8 data line, the first, the four, the 6th and the 7th column film in the first row is brilliant
The grid of body pipe is connected to Article 2 grid line, in the first row second, third, the 5th and the 8th column thin film transistor (TFT) grid
It is connected to first grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in second row is respectively connected to second, the
One, the first, the four, the 6th and the 7th column on third, the four, the five, the six, the 8th and Article 7 data line, in the second row
The grid of thin film transistor (TFT) is connected to Article 2 grid line, in the second row second, third, the 5th and the 8th column thin film transistor (TFT)
Grid be connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in the third line is respectively connected to the
One, second, the 4th, third, the six, the five, the 7th and Article 8 data line on, in the third line first, the four, the 6th and
The grid of 7th column thin film transistor (TFT) is connected to Article 4 grid line, in the third line second, third, the 5th and the 8th column film
The grid of transistor is connected to Article 3 grid line；The source electrode of the thin film transistor (TFT) of the first to the 8th column in fourth line connects respectively
Be connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line on, first, the 4th, in fourth line
The grid of six and the 7th column thin film transistor (TFT) is connected to Article 4 grid line, in fourth line second, third, the 5th and the 8th column
The grid of thin film transistor (TFT) is connected to Article 5 grid line.
Wherein, the drive control circuit includes:
Gate drivers, are set to the side of the liquid crystal display panel, and are coupled in the institute of the liquid crystal display panel
There is the grid line, provides scanning signal to sequence；
Source electrode driver couples all data lines of the liquid crystal display panel, to provide multiple display data；And
Sequence controller couples and controls the gate drivers and source electrode driver.
Array substrate wire structures of the invention, the array substrate wire structures include several routing cells, if described
Dry routing cell from left to right successively arrangement setting from top to bottom, wherein each routing cell includes the from left to right to arrange
One arrange from top to bottom to Article 8 data line, successively first to Article 5 grid line, and with the arrangement of 4 × 8 matrix forms
Thin film transistor (TFT), first and second described data line form first group of data line, and the third and Article 4 data line are formed
Second group of data line, the described 5th and Article 6 data line formed third group data line, the described 7th and Article 8 data it is linear
At the 4th group of data line, described first, the four, the 6th and Article 7 data line are the first data line, it is described second, third, the
Five and Article 8 data line be the second data line, and the polarity phase of the polarity of first data line and second data line
Instead, the corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, the odd number in the first data line connection respective sets column
The source electrode of the thin film transistor (TFT) of row odd column and even number line even column, second data line connect the odd-numbered line in respective sets column
The source electrode of the thin film transistor (TFT) of even column and even number line odd column, second, Article 4 grid line connection be located at the first data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, first, third and the connection of Article 5 grid line are located at the second data line one
The grid of two thin film transistor (TFT)s of the adjacent rows of side, so that every in the corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of one pixel is opposite.Therefore, the present invention realizes dot inversion, improves liquid crystal
Show the quality of the display picture of panel.In addition, successively opening from first grid line to a last grid line is a cycle,
In one cycle, the polarity of all data lines is constant, to reduce the polarity switching frequency of data line, thereby reduces drive
The driving power consumption of the driving chip of dynamic data line.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the schematic diagram for the array substrate wire structures that first aspect of the present invention embodiment provides.
Fig. 2 is the schematic diagram of the routing cell in Fig. 1.
Fig. 3 is the polarity effect picture of the corresponding pixel unit of routing cell.
Fig. 4 is the schematic diagram of the routing cell after the data line polarity switching in routing cell.
Fig. 5 is the polarity effect picture of the corresponding pixel unit of routing cell of Fig. 4.
Fig. 6 is the schematic diagram for the liquid crystal display panel that second aspect of the present invention embodiment provides.
Fig. 7 is the block diagram for the liquid crystal display that third aspect of the present invention embodiment provides.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Fig. 1 and Fig. 2 is please referred to, first aspect of the present invention embodiment provides a kind of array substrate wire structures 100.It is described
Array substrate wire structures 100 are applied in liquid crystal display panel.The array substrate wire structures 100 include that several wirings are single
Member 200, several routing cells 200 from left to right successively arrangement setting from top to bottom.Wherein, each routing cell 200 wraps
Include first to Article 8 data line D1-D8 successively from left to right to arrange, first successively to arrange from top to bottom to Article 5 grid
Polar curve G1-G5, and the thin film transistor (TFT) 30 arranged with 4 × 8 matrix forms.First and second data line D1 and D2 are formed
First group of data line 10, the third and Article 4 data line D3 and D4 form second group of data line 10.Described 5th and the 6th
Data line D5 and D6 form third group data line the 10, the described 7th and Article 8 data line D7 and D8 form the 4th group of data line
10, described first, the four, the 6th and Article 7 data line D1, D4, D6 and D7 are the first data line 11.It is described second, third,
5th and Article 8 data line D2, D3, D5 and D8 be the second data line 12, and first data line 11 and second data
The polarity of line 12 is opposite.The corresponding two column thin film transistor (TFT)s of every group of data line 10 form one group of column 40.First data line 11 connects
Connect the source electrode of the thin film transistor (TFT) 30 of the odd-numbered line odd column and even number line even column in respective sets column 40.Second data line
The source electrode of the thin film transistor (TFT) 30 of odd-numbered line even column and even number line odd column in 12 connection respective sets column.The second, Article 4
Gate lines G 2, G4 connection are located at the grid of two thin film transistor (TFT)s 30 of the adjacent rows of 11 side of the first data line.The first, third
And Article 5 gate lines G 1, G3, G5 connection are located at the grid of two thin film transistor (TFT)s 30 of the adjacent rows of 12 side of the second data line
Pole, so that each of corresponding picture element matrix of film transistor matrix polarity of pixel and the pixel of arbitrary neighborhood
Polarity it is opposite.Wherein, the grid line 20 of the array substrate wire structures is successively opened from first article of gate lines G 1 to the N articles
Gate lines G n is a cycle, and in one cycle, the polarity of all data lines is constant.
It should be noted that the grid line 20 is used to control the opening and closing of the thin film transistor (TFT) 30.Described first and
Two data lines 11 and 12 are used to after the unlatching of corresponding thin film transistor (TFT) 30 charge to thin film transistor (TFT) 30.When to film crystalline substance
When body pipe 30 carries out charging data line output positive voltage signal, the polarity of the corresponding pixel of the thin film transistor (TFT) 30 is positive.When
When carrying out charging data line output negative voltage signal to thin film transistor (TFT) 30, the polarity of the corresponding pixel of the thin film transistor (TFT) 30
It is negative.
In the present embodiment, first data line 11 connects odd-numbered line odd column and even number line idol in respective sets column 40
The source electrode of the thin film transistor (TFT) 30 of ordered series of numbers.Second data line 12 connects odd-numbered line even column and even number line in respective sets column
The source electrode of the thin film transistor (TFT) 30 of odd column.The second, Article 4 gate lines G 2, G4 the connection phase that is located at 11 side of the first data line
The grid of two thin film transistor (TFT)s 30 of adjacent rows.The first, third and Article 5 gate lines G 1, G3, G5 connection is located at the second data
The grid of two thin film transistor (TFT)s 30 of the adjacent rows of 12 side of line, so that the corresponding pixel square of the film transistor matrix
The polarity of each of battle array pixel is opposite with the polarity of the pixel of arbitrary neighborhood.Therefore, the present invention realizes dot inversion, improves
The quality of the display picture of liquid crystal display panel.In addition, successively opening from first article of gate lines G 1 to the N articles gate lines G n and being
A cycle, in one cycle, the polarity of all groups of data lines are constant, thus reduce the polarity switching frequency of data line,
Thereby reduce the driving power consumption of the driving chip of driving data line.
In the present embodiment, first polarity is anode.Second polarity is cathode.In other embodiments, institute
Stating the first polarity may be cathode, and second polarity may be anode.After the polarity of i.e. all data lines switches over,
The polarity of the pixel of the polarity and arbitrary neighborhood of each of picture element matrix pixel is still on the contrary, therefore, all data
The polarity switching of line is not in scintillation, will not influence the quality of the display picture of liquid crystal display panel.
Specifically, the source electrode of the thin film transistor (TFT) 30 of the first to the 8th column in the first row be respectively connected to first, second,
On 4th, third, the six, the five, the 7th and Article 8 data line D1, D2, D4, D3, D6, D5, D7 and D8.In the first row
One, the grid of the four, the 6th and the 7th column thin film transistor (TFT) 30 is connected to Article 2 gate lines G 2.Second, in the first row
Three, the grid of the 5th and the 8th column thin film transistor (TFT) 30 is connected to first article of gate lines G 1.The first to the 8th column in second row
Thin film transistor (TFT) 30 source electrode be respectively connected to second, first, third, the four, the five, the six, the 8th and Article 7 data
On line D2, D1, D3, D4, D5, D6, D8 and D7.The grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) 30 in second row
Pole is connected to Article 2 gate lines G 2.In second row second, third, the 5th and the 8th column thin film transistor (TFT) 30 grid connection
To Article 3 gate lines G 3.The source electrode of the thin film transistor (TFT) 30 of the first to the 8th column in the third line is respectively connected to first, the
Two, the 4th, third, the six, the five, the 7th and Article 8 data line D1, D2, D4, D3, D6, D5, D7 and D8 on.The third line
In the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) 30 be connected to Article 4 gate lines G 4.In the third line
Two, the grid of the thin film transistor (TFT) 30 of the column of third, the 5th and the 8th is connected to Article 3 gate lines G 3；In fourth line first to
The source electrode of the thin film transistor (TFT) 30 of 8th column is respectively connected to second, first, third, the four, the five, the six, the 8th and the 7th
On data line D2, D1, D3, D4, D5, D6, D8 and D7.The first, the four, the 6th and the 7th column thin film transistor (TFT) in fourth line
30 grid is connected to Article 4 gate lines G 4.In fourth line second, third, the 5th and the 8th column thin film transistor (TFT) 30 grid
Pole is connected to Article 5 gate lines G 5.
In the present embodiment, driving of the routing cell 200 in the source electrode driver and gate drivers of liquid crystal display panel
Under, so that the pixel of the polarity and arbitrary neighborhood of each of corresponding picture element matrix of film transistor matrix pixel
Polarity is opposite.Therefore, the present invention realizes dot inversion (refering to Fig. 3), improves the quality of the display picture of liquid crystal display panel.
In addition, successively opening from first article of grid line 20 to the N articles grid line is a cycle, in one cycle, the M group data
The polarity of line is constant, to reduce the polarity switching frequency of data line, thereby reduces the driving chip of driving M group data line
Driving power consumption.
In the present embodiment, first polarity is anode, and second polarity is cathode.In other embodiments,
The polarity of the data line can switch over, and such as the first polarity is cathode, and second polarity is anode, and the present invention still may be used
To realize dot inversion (such as Fig. 4 and Fig. 5).The principle of reversion is identical as the inversion principle in the present embodiment.
Referring to Fig. 6, second aspect of the present invention provides a kind of liquid crystal display panel 400.The liquid crystal display panel 400 wraps
Include several routing cells, several routing cells from left to right successively arrangement setting from top to bottom, wherein each routing cell
200 include successively from left to right arrange first to Article 8 data line D1-D8, successively arrange from top to bottom first to the 5th
Gate lines G 1-G5, and the thin film transistor (TFT) 30 arranged with 4 × 8 matrix forms.
Pixel array, the pixel array include several pixel units, and each pixel unit is with the progress of 4 × 8 matrix forms
Arrangement.The pixel unit 50 is from left to right successively arranged from top to bottom, and corresponding corresponding film transistor matrix.
First and second data the line D1 and D2 form first group of data line 10, the third and Article 4 data line
D3 and D4 forms second group of data line 10.Described 5th and Article 6 data line D5 and D6 formed third group data line 10, it is described
7th and Article 8 data line D7 and D8 formed the 4th group of data line 10, described first, the four, the 6th and Article 7 data line
D1, D4, D6 and D7 are the first data line 11.It is described second, third, the 5th and Article 8 data line D2, D3, D5 and D8 be second
Data line 12, and first data line 11 is opposite with the polarity of second data line 12.Corresponding two column of every group of data line 10
Thin film transistor (TFT) forms one group of column 40.First data line 11 connects odd-numbered line odd column and even number line in respective sets column 40
The source electrode of the thin film transistor (TFT) 30 of even column.Second data line 12 connects the odd-numbered line even column and even number in respective sets column
The source electrode of the thin film transistor (TFT) 30 of row odd column.The second, Article 4 gate lines G 2, G4 connection are located at 11 side of the first data line
The grid of two thin film transistor (TFT)s 30 of adjacent rows.The first, third and Article 5 gate lines G 1, G3, G5 connection is located at the second number
According to the grid of two thin film transistor (TFT)s 30 of the adjacent rows of 12 side of line, so that the corresponding pixel of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of each of matrix pixel is opposite.Wherein, the array substrate wire structures
Grid line 20 successively to open from first article of gate lines G 1 to the N articles gate lines G n be a cycle, in one cycle, own
The polarity of data line is constant.
It should be noted that the grid line 20 is used to control the opening and closing of the thin film transistor (TFT) 30.Described first and
Two data lines 11 and 12 are used to after the unlatching of corresponding thin film transistor (TFT) 30 charge to thin film transistor (TFT) 30.When to film crystalline substance
When body pipe 30 carries out charging data line output positive voltage signal, the polarity of the corresponding pixel of the thin film transistor (TFT) 30 is positive.When
When carrying out charging data line output negative voltage signal to thin film transistor (TFT) 30, the polarity of the corresponding pixel of the thin film transistor (TFT) 30
It is negative.
In the present embodiment, first data line 11 connects odd-numbered line odd column and even number line idol in respective sets column 40
The source electrode of the thin film transistor (TFT) 30 of ordered series of numbers.Second data line 12 connects odd-numbered line even column and even number line in respective sets column
The source electrode of the thin film transistor (TFT) 30 of odd column.The second, Article 4 gate lines G 2, G4 the connection phase that is located at 11 side of the first data line
The grid of two thin film transistor (TFT)s 30 of adjacent rows.The first, third and Article 5 gate lines G 1, G3, G5 connection is located at the second data
The grid of two thin film transistor (TFT)s 30 of the adjacent rows of 12 side of line, so that the corresponding pixel square of the film transistor matrix
The polarity of each of battle array pixel is opposite with the polarity of the pixel of arbitrary neighborhood.Therefore, the present invention realizes dot inversion, improves
The quality of the display picture of liquid crystal display panel.In addition, successively opening from first article of gate lines G 1 to the N articles gate lines G n and being
A cycle, in one cycle, the polarity of all groups of data lines are constant, thus reduce the polarity switching frequency of data line,
The driving power consumption of the driving chip of driving data line is thereby reduced, therefore present invention reduces the power consumptions of liquid crystal display panel 400.
Referring to Fig. 7, third aspect of the present invention provides a kind of liquid crystal display 500.The liquid crystal display includes liquid crystal
Display panel 400, backlight module 510 and drive control circuit 520.The backlight module 510 is used to provide the described liquid crystal display
Light needed for panel 400.The liquid crystal display panel is the liquid crystal display panel 400 that above-mentioned alternative plan provides.By institute
It states liquid crystal display panel 400 to be described in detail in above-mentioned alternative plan embodiment, therefore details are not described herein.It is described
Drive control circuit 520 is for controlling the pixel array.
Further, the drive control circuit 520 further includes gate drivers, source electrode driver and sequence controller.
The gate drivers are set to the side of the liquid crystal display panel, and are coupled in all described of the liquid crystal display panel
Grid line provides scanning signal to sequence.The source electrode driver couples all data lines of the liquid crystal display panel, uses
To provide multiple display data.The sequence controller couples and controls the gate drivers and source electrode driver.
In the present embodiment, every group of data line 10 of the liquid crystal display includes the first data line 11 and the second data line
12, the polarity of first data line 11 and second data line 12 is opposite.The corresponding two column film crystals of every group of data line 10
Pipe forms one group of column 40.First data line 11 connects odd-numbered line odd column in respective sets column 40 and even number line even column
The source electrode of thin film transistor (TFT) 30.Second data line 12 connects the odd-numbered line even column and even number line odd column in respective sets column
Thin film transistor (TFT) 30 source electrode.The second, Article 4 gate lines G 2, G4 connection are located at the adjacent rows of 11 side of the first data line
The grid of two thin film transistor (TFT)s 30.The first, third and Article 5 gate lines G 1, G3, G5 connection is located at the second data line 12 1
The grid of two thin film transistor (TFT)s 30 of the adjacent rows of side, so that in the corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of each pixel is opposite.Therefore, the present invention realizes dot inversion, improves liquid crystal
The quality of the display picture of display panel 400.In addition, in addition, successively opening from first article of gate lines G 1 to the N articles gate lines G n
For a cycle, in one cycle, the polarity of all groups of data lines is constant, to reduce the polarity switching frequency of data line
Rate thereby reduces the driving power consumption of the driving chip of driving data line, therefore present invention reduces liquid crystal display panels 400
Power consumption reduces the power consumption of the liquid crystal display 500.
Above disclosed is only a preferred embodiment of the present invention, cannot limit the power of the present invention with this certainly
Sharp range, those skilled in the art can understand all or part of the processes for realizing the above embodiment, and weighs according to the present invention
Benefit requires made equivalent variations, still belongs to the scope covered by the invention.
Claims (10)
1. a kind of array substrate wire structures are applied in liquid crystal display panel, it is characterised in that: the array substrate wire bond
Structure includes several routing cells, several routing cells from left to right successively arrangement setting from top to bottom, wherein each wiring
Unit include first from left to right to arrange arrange from top to bottom to Article 8 data line, successively first to Article 5 grid
Line, and the thin film transistor (TFT) arranged with 4 × 8 matrix forms, first and second described data line form first group of data line, institute
It states third and Article 4 data line forms second group of data line, the described 5th and Article 6 data line form third group data line,
Described 7th and Article 8 data line formed the 4th group of data line, described first, the four, the 6th and Article 7 data line be first
Data line, it is described second, third, the 5th and Article 8 data line be the second data line, and the polarity of first data line with
The polarity of second data line is on the contrary, the corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, first data
Line connects the source electrode of the thin film transistor (TFT) of odd-numbered line odd column and even number line even column in respective sets column, second data line
Connect the source electrode of the thin film transistor (TFT) of the odd-numbered line even column and even number line odd column in respective sets column, second, Article 4 grid
Line connection is located at the grid of two thin film transistor (TFT)s of the adjacent rows of the first data line side, first, third and Article 5 grid
Line connection is located at the grid of two thin film transistor (TFT)s of the adjacent rows of the second data line side, so that the thin film transistor (TFT) square
The polarity of each of the corresponding picture element matrix of battle array pixel is opposite with the polarity of the pixel of arbitrary neighborhood；
Wherein, the grid line of the array substrate wire structures, which is successively opened from first grid line to a last grid line, is
A cycle, in one cycle, the polarity of the data line are constant.
2. array substrate wire structures as described in claim 1, which is characterized in that when first data line exports positive voltage
Signal, second data line export negative voltage signal；When first data line switches to negative voltage signal, second number
Positive voltage signal is also accordingly switched to according to line.
3. array substrate wire structures as claimed in claim 2, which is characterized in that in the first row first to the 8th column it is thin
The source electrode of film transistor is respectively connected to first, second, the 4th, third, the six, the five, the 7th and Article 8 data line on,
The grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in a line is connected to Article 2 grid line, and in the first row
Two, the grid of the column thin film transistor (TFT) of third, the 5th and the 8th is connected to first article of grid line；The first to the 8th column in second row
Thin film transistor (TFT) source electrode be respectively connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line
On, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in the second row is connected to Article 2 grid line, the second row
In second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 3 grid line；In the third line first to
The source electrode of the thin film transistor (TFT) of 8th column be respectively connected to first, second, the 4th, third, the six, the five, the 7th and the 8th
On data line, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in the third line is connected to Article 4 grid
Line, in the third line second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 3 grid line；Fourth line
In the first to the 8th column thin film transistor (TFT) source electrode be respectively connected to second, first, third, the 4th, the 5th, the 6th, the
Eight and Article 7 data line on, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in fourth line is connected to the 4th
Grid line, in fourth line second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 5 grid line.
4. a kind of liquid crystal display panel, comprising:
Several routing cells, several routing cells from left to right successively arrangement setting from top to bottom, wherein each wiring is single
Member include first from left to right to arrange arrange from top to bottom to Article 8 data line, successively first to Article 5 grid line,
And the thin film transistor (TFT) arranged with 4 × 8 matrix forms；
Pixel array, the pixel array include several pixel units, and each pixel unit is arranged with 4 × 8 matrix forms,
The pixel unit is from left to right successively arranged from top to bottom, and corresponding corresponding film transistor matrix；
Wherein, described first and second data line forms first group of data line, and the third and Article 4 data line form the
Two groups of data lines, the described 5th and Article 6 data line formed third group data line, the described 7th and Article 8 data line formed
4th group of data line, described first, the four, the 6th and Article 7 data line be the first data line, it is described second, third, the 5th
And Article 8 data line is the second data line, and the polarity of first data line and second data line polarity on the contrary,
The corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, and the odd-numbered line in the first data line connection respective sets column is odd
The source electrode of the thin film transistor (TFT) of ordered series of numbers and even number line even column, second data line connect the odd-numbered line even number in respective sets column
The source electrode of the thin film transistor (TFT) of column and even number line odd column, second, the connection of Article 4 grid line be located at the first data line side
The grid of two thin film transistor (TFT)s of adjacent rows, first, third and the connection of Article 5 grid line are located at the second data line side
The grid of two thin film transistor (TFT)s of adjacent rows, so that each of corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of pixel is opposite；
Wherein, it is one that the grid line of the liquid crystal display panel, which is successively opened from first grid line to a last grid line,
Period, in one cycle, the polarity of the data line are constant.
5. liquid crystal display panel as claimed in claim 4, which is characterized in that when first data line output positive voltage letter
Number, second data line exports negative voltage signal；When first data line switches to negative voltage signal, second data
Line also accordingly switches to positive voltage signal.
6. liquid crystal display panel as claimed in claim 5, which is characterized in that the film of the first to the 8th column in the first row is brilliant
The source electrode of body pipe is respectively connected to first, second, the 4th, third, the six, the five, the 7th and Article 8 data line on, the first row
In the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) be connected to Article 2 grid line, in the first row second,
The grid of the column thin film transistor (TFT) of third, the 5th and the 8th is connected to first article of grid line；In second row first to the 8th column
The source electrode of thin film transistor (TFT) is respectively connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line on,
The grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in second row is connected to Article 2 grid line, in the second row
Second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 3 grid line；First to the 8th in the third line
The source electrode of the thin film transistor (TFT) of column be respectively connected to first, second, the 4th, third, the six, the five, the 7th and Article 8 number
According on line, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in the third line is connected to Article 4 grid line, the
In three rows second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 3 grid line；In fourth line
The source electrode of the thin film transistor (TFT) of one to the 8th column is respectively connected to second, first, third, the 4th, the 5th, the 6th, the 8th and the
On seven data lines, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in fourth line is connected to Article 4 grid
Line, in fourth line second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 5 grid line.
7. a kind of liquid crystal display, including liquid crystal display panel, backlight module and drive control circuit, the backlight module are used for
Light needed for providing the liquid crystal display panel, the liquid crystal display panel include several routing cells, several wirings
Unit from left to right successively arrangement setting from top to bottom, wherein each routing cell includes first to the from left to right to arrange
Eight data lines, first successively to arrange from top to bottom to Article 5 grid line, and it is brilliant with the film of 4 × 8 matrix forms arrangement
Body pipe；
Pixel array, the pixel array include several pixel units, and each pixel unit is arranged with 4 × 8 matrix forms,
The pixel unit is from left to right successively arranged from top to bottom, and corresponding corresponding film transistor matrix；The drive control
Circuit is for controlling the pixel array；
Wherein, described first and second data line forms first group of data line, and the third and Article 4 data line form the
Two groups of data lines, the described 5th and Article 6 data line formed third group data line, the described 7th and Article 8 data line formed
4th group of data line, described first, the four, the 6th and Article 7 data line be the first data line, it is described second, third, the 5th
And Article 8 data line is the second data line, and the polarity of first data line and second data line polarity on the contrary,
The corresponding two column thin film transistor (TFT)s of every group of data line form one group of column, and the odd-numbered line in the first data line connection respective sets column is odd
The source electrode of the thin film transistor (TFT) of ordered series of numbers and even number line even column, second data line connect the odd-numbered line even number in respective sets column
The source electrode of the thin film transistor (TFT) of column and even number line odd column, second, the connection of Article 4 grid line be located at the first data line side
The grid of two thin film transistor (TFT)s of adjacent rows, first, third and the connection of Article 5 grid line are located at the second data line side
The grid of two thin film transistor (TFT)s of adjacent rows, so that each of corresponding picture element matrix of the film transistor matrix
The polarity of pixel of polarity and arbitrary neighborhood of pixel is opposite；
Wherein, it is one that the grid line of the liquid crystal display panel, which is successively opened from first grid line to a last grid line,
Period, in one cycle, the polarity of the data line are constant.
8. liquid crystal display as claimed in claim 7, which is characterized in that when first data line export positive voltage signal,
Second data line exports negative voltage signal；When first data line switches to negative voltage signal, second data line
Also positive voltage signal is accordingly switched to.
9. liquid crystal display as claimed in claim 8, which is characterized in that the film crystal of the first to the 8th column in the first row
The source electrode of pipe is respectively connected to first, second, the 4th, third, the six, the five, the 7th and Article 8 data line on, in the first row
The grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) be connected to Article 2 grid line, second, in the first row
Three, the grid of the 5th and the 8th column thin film transistor (TFT) is connected to first article of grid line；In second row first to the 8th column it is thin
The source electrode of film transistor is respectively connected to second, first, third, the four, the five, the six, the 8th and Article 7 data line on,
The grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in two rows is connected to Article 2 grid line, and in the second row
Two, the grid of the column thin film transistor (TFT) of third, the 5th and the 8th is connected to Article 3 grid line；The first to the 8th column in the third line
Thin film transistor (TFT) source electrode be respectively connected to first, second, the 4th, third, the six, the five, the 7th and Article 8 data
On line, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in the third line is connected to Article 4 grid line, third
In row second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 3 grid line；First in fourth line
To the thin film transistor (TFT) of the 8th column source electrode be respectively connected to second, first, third, the four, the five, the six, the 8th and the 7th
On data line, the grid of the first, the four, the 6th and the 7th column thin film transistor (TFT) in fourth line is connected to Article 4 grid
Line, in fourth line second, third, the 5th and the 8th the grid of column thin film transistor (TFT) be connected to Article 5 grid line.
10. liquid crystal display as claimed in claim 9, which is characterized in that the drive control circuit includes:
Gate drivers, are set to the side of the liquid crystal display panel, and are coupled in all institutes of the liquid crystal display panel
Grid line is stated, provides scanning signal to sequence；
Source electrode driver couples all data lines of the liquid crystal display panel, to provide multiple display data；And
Sequence controller couples and controls the gate drivers and source electrode driver.
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| CN106710502A (en) * | 2016-12-26 | 2017-05-24 | 武汉华星光电技术有限公司 | Display panel and multiplexing drive circuit for driving display panel |
| CN106773407A (en) * | 2016-12-29 | 2017-05-31 | 深圳市华星光电技术有限公司 | Display panel and preparation method thereof |
| CN108335683B (en) * | 2018-03-14 | 2020-12-25 | 北京集创北方科技股份有限公司 | Source driver, liquid crystal display device and driving method |
| CN111142298B (en) * | 2020-01-20 | 2023-05-09 | 合肥鑫晟光电科技有限公司 | Array substrate and display device |
| CN114071041B (en) * | 2021-11-10 | 2022-08-19 | 南京大学 | Line-column subtraction reading circuit based on composite dielectric gate double-transistor photosensitive detector |
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