CN106030406B - Method for uniform imprint pattern transfer of sub-20 nm features - Google Patents
Method for uniform imprint pattern transfer of sub-20 nm features Download PDFInfo
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- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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Abstract
Methods of increasing etch selectivity in imprint lithography are described that use material deposition techniques that impart a unique topography to a multi-layer material stack, thereby increasing the etch process window and improving etch selectivity. For example, an etch selectivity of greater than or equal to 50:1 can be achieved between the patterned photoresist layer and the deposited metal, metalloid, or non-organic oxide, which significantly preserves pattern feature height prior to the etching process that transfers the pattern into the substrate, enabling sub-20 nm pattern transfer with high fidelity.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims priority from U.S. provisional application serial No. 61/921,647 filed on 30/12/2013 as specified in 35u.s.c. § 119(e) (1), which is incorporated herein by reference in its entirety.
Background information
Nano-fabrication involves the fabrication of extremely small structures, such as structures having features on the order of 100 nanometers or less. One application where nano-fabrication has had a significant impact is the fabrication of integrated circuits. As the semiconductor processing industry continues to strive for higher production yields while increasing the number of circuits formed on a substrate per unit area, nano-fabrication becomes increasingly important. Nano-fabrication provides greater process control while allowing greater reduction in the minimum feature size of the structures formed. Other areas of development in which nano-fabrication has been applied include photovoltaic cells, biotechnology, optical technology, mechanical systems, and the like.
One exemplary nano-fabrication technique currently in use is commonly referred to as imprint lithography (imprints). Exemplary imprint lithography processes are described in detail in a number of publications, see, for example, U.S. patent No. 8,349,241, U.S. patent application publication No. 2004/0065252, and U.S. patent No. 6,936,194, all of which are incorporated herein by reference.
The imprint lithography techniques described in these U.S. patent application publications and U.S. patents mentioned above both involve forming a relief pattern in a formable (polymerizable) layer, and transferring a pattern corresponding to the relief pattern into an underlying substrate. The substrate may be coupled to a motion stage to obtain a desired positioning that facilitates the patterning process. The patterning process uses a template spaced apart from the substrate, and a formable liquid is applied between the template and the substrate. The formable liquid solidifies to form a rigid layer having a pattern recorded therein, the pattern conforming to the shape of the template surface contacting the formable liquid. After curing, the template is separated from the rigid layer such that the template and the substrate are spaced apart. The substrate and cured layer are then subjected to additional processing to transfer a relief pattern corresponding to the pattern in the cured layer into the substrate.
Brief Description of Drawings
For a more particular understanding of the nature and advantages of the present invention, reference should be made to the embodiments illustrated in the accompanying drawings. It is to be noted, however, that the appended drawings illustrate only conventional embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
FIG. 1 shows a simplified side view of an exemplary imprint lithography system.
FIG. 2 shows a simplified side view of the substrate of FIG. 1 having a patterned layer containing nanostructures thereon.
FIGS. 3A-G illustrate a method of patterning a substrate according to one embodiment of the invention;
FIGS. 4A-F illustrate a method of patterning a substrate according to another embodiment of the invention;
FIGS. 5A-F illustrate a method of patterning a substrate according to yet another embodiment of the invention;
fig. 6A-E illustrate methods of patterning a substrate according to other embodiments of the invention.
DETAILED DESCRIPTIONS
Referring to the drawings, and more particularly to FIG. 1, there is shown a lithography system 10 for forming a relief pattern on a substrate 12. Substrate 12 may be coupled to substrate chuck 14. As shown, the substrate chuck 14 is a vacuum chuck. However, the substrate chuck 14 can be any chuck including, but not limited to, a vacuum chuck, a pin-type chuck, a slot-type chuck, an electrostatic chuck, an electromagnetic chuck, and the like. An exemplary chuck is described in U.S. Pat. No. 6,873,087, incorporated herein by reference.
The substrate 12 and substrate chuck 14 may further be supported by a stage 16. The platform 16 may provide translation and/or rotation along the x-axis, y-axis, and z-axis. The platform 16, substrate 12 and substrate chuck 14 may also be disposed on a pedestal (not shown).
The template 18 may be coupled to a chuck 28. The chuck 28 may be designed as a vacuum chuck, a pin-type chuck, a groove-type chuck, an electrostatic chuck, an electromagnetic chuck, and/or other similar types of chucks, but is not limited thereto. An exemplary chuck is further described in U.S. Pat. No. 6,873,087, incorporated herein by reference. In addition, chuck 28 may be coupled to imprint head 30 such that chuck 28 and/or imprint head 30 may be configured to facilitate movement of template 18.
The system 10 may also include a fluid distribution system 32. Fluid dispensing system 32 may be used to deposit a formable material 34 (e.g., a polymerizable material) on substrate 12. Formable material 34 can be applied over substrate 12 using techniques such as droplet dispensing, spin coating, dip coating, Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), thin film deposition, thick film deposition, and the like. Formable material 34 may be applied to substrate 12 before and/or after the desired space is formed between mold 22 and substrate 12, depending upon design considerations. Formable material 34 can be functionalized nanoparticles that find application in the biological field, the solar cell industry, the battery industry, and/or other industries that require functionalized nanoparticles. For example, formable material 34 can comprise a monomer mixture as described in U.S. patent No. 7,157,036 and U.S. patent application publication No. 2005/0187339, both of which are incorporated herein by reference. Alternatively, formable material 34 can include, but is not limited to, biomaterials (e.g., PEG), solar cell materials (e.g., N-type, P-type materials), and the like.
Referring to fig. 1 and 2, system 10 may further include an energy source 38 connected to direct energy 40 along a path 42. Imprint head 30 and stage 16 may be configured to position template 18 and substrate 12 in superimposition with path 42. System 10 may be regulated using a processor 54 that is coupled to stage 16, imprint head 30, fluid distribution system 32, and/or energy source 38, and may operate using a computer-readable program stored in memory 56.
Either imprint head 30, stage 16, or both vary the distance between mold 20 and substrate 12 to define a desired volume therebetween that will be filled by formable material 34. For example, imprint head 30 may apply to template 18The force is such that mold 20 is in contact with formable material 34. After the desired volume is filled with formable material 34, energy source 38 generates energy 40, such as ultraviolet radiation, that causes formable material 34 to cure and/or crosslink and conform to the shape of surface 44 of substrate 12 and pattern surface 22 to form patterned layer 46 on substrate 12. Patterned layer 46 may include a residual layer 48 and a plurality of features, shown as protrusions 50 and recesses 52, with protrusions 50 having a thickness t1The thickness of the residual layer is t2。
The above-described systems and methods may further be applied to imprint lithography processes and systems described in: U.S. patent No. 6,932,934, U.S. patent No. 7,077,992, U.S. patent No. 7,179,396, and U.S. patent No. 7,396,475, all of which are incorporated herein by reference.
As noted above, imprint lithography processes can pattern features as small as 100nm or less, and also demonstrate the ability to pattern high fidelity features approaching sub-20 nanometers (i.e., less than 20 nm). The ability to imprint such sub-20 nm features is of great importance in many applications. For example, imprint lithography can be applied to the Hard Disk Drive (HDD) industry to pattern an underlying medium with magnetic cells (or bits), which achieves a greater areal density than would otherwise be possible. Currently, the storage capacity of high capacity HD hard disks is up to 0.5Tb (1 terabit)/square inch), but to obtain patterned media with a desired storage density of greater than or equal to 1Tb, the pattern feature size must be at least less than or equal to 18 nanometers, and preferably as small as about 10 nanometers or even as small as about 5 nanometers. The semiconductor industry similarly requires such small feature (sub-20 nm) patterning, including the imprinting of parallel lines or grids for use in, for example, NAND flash memory. However, given the aspect ratio limitations imposed by imprint lithography (i.e., the smallest features can be reliably imprinted up to an aspect ratio of about 3:1, which in some applications, e.g., many applications where the feature size is less than 20nm, may be required as low as 1.5:1), as the feature size decreases, the imprinted feature height must also decrease. This results in a severe limitation in the reduction of the etch process window required to accurately transfer the pattern into the substrate. For example, to pattern 5nm wide features, the imprinted feature height is typically about 10-15nm, with up to 5nm associated with the residual layer. The first step of pattern transfer is to remove the residual layer. After the etching process of the 5nm residual layer, the 10-15nm overall feature height typically erodes or drops to 3-8 nm. With only 3-8 nm photoresist feature height remaining, it is very difficult to reliably continue pattern transfer into the substrate because this height is too small to ensure uniform pattern transfer with reasonable process control and yield for commercial applications.
Alternative reverse tone (tone) patterned imprint methods, such as those described in U.S. patent nos. 7,241,395 and 7,186,656, the entire contents of which are incorporated herein by reference, can mitigate the effects of feature erosion at larger feature sizes, such as greater than or equal to 20 nm. Such methods typically employ forming a second conformal layer of a silicon-containing polymer photoresist (e.g., 20% Si-80% polymer) over the first patterned layer of non-silicon-containing organic polymer photoresist. The second silicon-containing polymer photoresist may be formed, for example, by spin coating or imprinting using a featureless (i.e., blank) template. A blanket etch is performed to etch back the conforming layer, exposing the protruding portions of the patterned layer. A second plasma etch is used to oxidize the silicon-containing polymer photoresist while the first patterned layer of non-silicon-containing polymer photoresist is removed. By this process, a reverse (or inverse) pattern is formed, which can then be transferred into the substrate by further etching. However, at very small feature heights, the etch selectivity of this approach is at most 3:1-4:1, which is insufficient to provide high fidelity pattern transfer in the sub-20 nm feature range. This lower selectivity occurs because the organic material in the silicon-containing photoresist continues to corrode during the etch process, even with 100% silicon oxidation. For example, to reliably obtain a patterned media with a desired 1Tb storage density, the etch selectivity should ideally be close to 7:1-8: 1. In addition, for certain photoresist material combinations, intermixing of the first patterned layer of non-silicon containing polymer photoresist and the second conforming layer of silicon containing polymer photoresist was observed. This mixing can lead to feature degradation and significant loss of feature fidelity.
For sub-20 nm pattern transfer, the present invention provides methods that include specific hard mask materials that increase selectivity during pattern etching into the substrate. That is, the material selected for use after the imprint process significantly increases the etch selectivity during the imprint photoresist etch process and the substrate pattern transfer etch process, as compared to a process using a silicon-containing polymer photoresist as a hard mask. For example, chromium (Cr), silicon (Si), Al2O3And SiO2The material of (a) is very slow to erode in the plasma chemistry used to etch the organic and can be applied to the imprinted patterned layer at a sufficiently low temperature. The deposition process imparts a unique topography to the multi-layer material stack (i.e., substrate/patterned photoresist layer/deposited material layer), which in turn determines the etch process window (e.g., requirements for over-etching, etc.) and results in significantly improved etch selectivity. For example, organic photoresist layers can be patterned with metal, metalloid, or non-organic oxides (e.g., Cr, Si, Al)2O3And SiO2) An etch selectivity of greater than or equal to 50:1 is achieved, which significantly preserves patterned feature height during etching to transfer patterns into the substrate, enabling sub-20 nm pattern transfer with high fidelity. In some aspects of the invention as further described herein, the metal, metalloid or non-organic oxide (e.g., Cr, Si, Al)2O3Or SiO2) Deposition can be performed by a variety of techniques, such as gap-filling (e.g., F-CVD), conformal (e.g., atomic layer deposition), low angle sputter deposition, and various CVD processes.
Fig. 3A-3G illustrate an exemplary method of the present invention. Fig. 3A-3C show patterned layer 146 formed on substrate 12, and patterned layer 146 includes apertures 152 having surrounding, elevated regions (i.e., protrusions) 150. A patterned layer 146 is formed from a polymerizable material deposited on the substrate 12 using a pillar-tone (pillar-tone) imprint lithography template (not shown) according to the method described above in connection with fig. 1-2, and template pillars of corresponding size and shape are used to provide the apertures 152 of the patterned layer 146. After patterned layer 146 is formed on substrate 12, the substrate is further processed as shown in FIGS. 3D-3G.
First, a pre-process etch is performed on patterned layer 146 to remove portions of the residual layer at the bottom of each hole 152, thereby exposing substrate 12 at each hole 152, as shown in fig. 3D. Methods for removing the residual layer from the patterned layer include, but are not limited to, plasma-based (e.g., oxygen plasma) etching methods and Vacuum Ultraviolet (VUV) etching methods. This method enables directional (i.e., primarily vertical) etching of the cured polymerizable material to remove the residual layer with minimal change in the lateral dimensions of the hole. The patterned layer is then subjected to a gap-fill deposition process to deposit the selected material (e.g., Cr, Si, Al)2O3Or SiO2) Onto patterned layer 146 such that the material forms a deposited layer 162 over substrate 12 exposed at the bottom of hole 152, as shown in fig. 3E. Exemplary gap fill deposition processes include, but are not limited to, SiO2Low temperature FCVD deposition.
Gap-fill deposition also results in the deposition of some selected material on the ledge 150, forming a deposited layer 160 over such ledge. A plasma etch process may be used to remove deposited layer 160 to expose protruding portions 150 while leaving deposited layer 162 still at the bottom of the holes (as shown in fig. 3F). The ledge 150 is then removed by using an oxygen or fluorocarbon based etch process resulting in a deposited layer 162, as shown in fig. 3G. Using the deposited layer 162 as a hard mask pattern, the substrate 12 is then etched to form pillars (not shown) in the substrate 12 corresponding to the original patterned holes 152, and the remaining deposited layer 162 is then removed from the tops of such formed pillars.
Another exemplary method of the present invention is illustrated in fig. 4A-4E. Similar to above, patterned layer 146 having apertures 152 is formed over substrate 12 (fig. 4A), and then other processing is similarly performed (fig. 4B-4E). First, a conformal deposition process is performed on patterned layer 146 to deposit a selected material (e.g., Cr, Si, or SiO)2) Onto patterned layer 146 such that the material forms a deposited layer 260 over the entire patterned layer 146, as shown in fig. 4B. Exemplary conformal deposition processes include, but are not limited to, SiO2Or Al2O3Low temperature atomic layer deposition.
After conformable deposition of layer 260 onto patterned layer 146, an additional planarization layer 262 is formed over layer 260, as shown in FIG. 4C. Planarization layer 262 may be formed using an imprint lithography process, such as the processes described above, or may be formed by other techniques known in the art, such as a spin-on or dip planarization process. The planarization layer 262 is then etched back to expose the deposited layer 260, as shown in FIG. 4D. Then, a portion of deposited layer 260 is etched back, exposing protruding portion 150, while a portion 264 of deposited layer 260 remains within aperture 250 of patterned layer 146, as shown in FIG. 4E. The overhang portion 150 is then removed, leaving behind portions 264 of the deposited layer 260 that correspond to the apertures 152 of the patterned layer 146, as shown in FIG. 4F. Portion 264 is used as a hard mask pattern for etching substrate 12 to form pillars (not shown) in substrate 12. The remaining portion 264 and patterned layer 146 are then removed from the tops of the pillars so formed.
Yet another exemplary method of the present invention is illustrated in FIGS. 5A-5F. Fig. 5A-C show a patterned layer 246 formed on substrate 12, in which case patterned layer 246 has pillars 250 extending from a surrounding recessed region 252. A hole-tone imprint lithography template (not shown) is used to form patterned layer 246 from a polymerizable material deposited on substrate 12, in accordance with the method described above in connection with fig. 1-2, and template holes of corresponding size and shape are used to form pillars 250 of patterned layer 246. After patterned layer 246 is formed onto substrate 12, the substrate is further processed as shown in FIGS. 5D-5F. First, a small angle deposition of a patterned layer is performed to deposit a selected material (e.g., Cr, Si, or SiO)2) Is deposited onto patterned layer 246 such that the material forms a deposited layer 360 encapsulating projections 250, as shown in fig. 5D. Specifically, the angle of material deposition is controlled so that material does not accumulate within the recess 252. Exemplary small angle deposition processes include, but are not limited to, small angle sputtering. The patterned layer 146 is then pre-etched (e.g., O)2RIE) to remove portions of the remaining layers (recessed region portions 252) and thereby expose substrate 12 over the areas surrounding pillars 250, as shown in fig. 5E. A subsequent etch is then performed to etch the post pattern into the substrate 12.
FIGS. 6A-6E illustrate the present inventionAnother exemplary method of (1). As described above, holes 152 formed in substrate 12 are used to form patterned layer 146 (FIG. 6A), in which case the selected material (e.g., Cr, Si, or SiO) is then deposited2) Is deposited by PEVCD onto patterned layer 146 such that it forms a deposited layer 460 (fig. 6B) that extends over the entire patterned layer 146. The deposited layer 460 is thick enough so that it completely fills the hole 152 and extends the elevated (raised) region 150. Exemplary PEVCD processes include, but are not limited to, atomic layer deposition and FCVD. Alternatively, the deposited layer may be applied using a spin-on process (e.g., SOG). The deposited layer 460 is then etched back to expose the holes 152 so that portions 462 of the deposited layer 460 remain within the holes 152 of the patterned layer 146, as shown in FIG. 6C. The overhang 150 is then etched in a plasma etcher, for example using an oxygen or helium based process, leaving a portion 462 of the deposited layer 460 that corresponds to the hole 152 of the patterned layer 146, as shown in fig. 6D. The protruding portions 462 serve as a hard mask pattern for etching the substrate 12 to form posts (not shown) in the substrate 12 that correspond to the original patterned holes 152. The remaining portion 462 and patterned layer 146 are then removed from the tops of the pillars so formed.
In other embodiments, the hard mask may be composed of more than two materials with an etchant that can achieve high etch selectivity between them. The dual mask layer process can overcome pattern transfer problems resulting from film surface roughness due to certain film deposition techniques.
Other modifications and alternative embodiments of various aspects of the invention will be apparent to those skilled in the art in view of this description. Accordingly, these descriptions are merely illustrative. It is to be understood that the forms of the invention herein described are to be taken as illustrative embodiments. Elements and materials may be substituted for those illustrated and described herein, compositions and operations may be reversed, and certain features of the invention may be utilized independently, such variations being apparent to those skilled in the art upon reading the present specification. Changes may be made in the elements described herein without departing from the spirit and scope of the invention as described in the following claims.
Claims (14)
1. An imprint lithography method, the method comprising:
imprinting a patterned layer of organic polymeric material on a substrate, the patterned layer having a residual layer defining features of the patterned layer and one or more protruding portions and recesses, the protruding portions extending from the residual layer a height of less than or equal to 20nm and having an aspect ratio of 1.5:1 to 3: 1;
depositing an etch-selective material onto at least the protrusions and recesses of the patterned layer, the etch-selective material comprising a metal, metalloid, or non-organic oxide having an etch selectivity greater than or equal to 50:1 relative to an organic polymeric material;
etching back the deposited etch selective material to expose the protruding portion;
etching back the protruding portion to expose the substrate; and
the substrate is etched to form an inverse pattern of the patterned layer in the substrate.
2. The method of claim 1, wherein the etch-selective material is selected from the group consisting of: SiO 22、Cr、Al2O3Or Si.
3. The method of claim 1 or 2, wherein the depositing of the etch selective material further comprises a gap-fill deposition process.
4. The method of claim 1 or 2, wherein the depositing of the etch-selective material further comprises forming a conforming layer of the etch-selective material over the patterned layer.
5. The method of claim 4, further comprising completely filling the recess with an etch selective material.
6. The method of claim 5, wherein depositing the etch-selective material further comprises a spin-on process.
7. The method of claim 4, further comprising forming a planarized layer of polymeric material on the conforming layer and then etching back the planarized layer to expose portions of the conforming layer.
8. The method of claim 1 or 2, wherein the groove defines a plurality of holes.
9. A method according to claim 1 or 2, wherein the projections define a plurality of parallel lines.
10. An imprint lithography method, the method comprising:
imprinting a patterned layer of organic polymeric material on a substrate, the patterned layer having a residual layer defining features of the patterned layer and one or more protruding portions and recesses, the protruding portions extending from the residual layer a height of less than or equal to 20nm and having an aspect ratio of 1.5:1 to 3: 1;
depositing an etch-selective material onto only protruding portions of the patterned layer, the etch-selective material comprising a metal, metalloid, or non-organic oxide having an etch selectivity greater than or equal to 50:1 relative to an organic polymeric material;
etching back the residual layer to expose the substrate; and
the substrate is etched to form a corresponding pattern of patterned layers in the substrate.
11. The method of claim 10, wherein the etch selective material is selected from the group consisting of: SiO 22、Cr、Al2O3Or Si.
12. The method of claim 10 or 11, wherein the depositing of the etch selective material further comprises a low angle deposition process.
13. The method of claim 10 or 11, wherein the protruding portion defines a plurality of posts.
14. A method according to claim 10 or 11, wherein the projections define a plurality of parallel lines.
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PCT/US2014/072706 WO2015103232A1 (en) | 2013-12-30 | 2014-12-30 | Methods for uniform imprint pattern transfer of sub-20 nm features |
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