CN105988499A - Power supply side voltage regulator - Google Patents
Power supply side voltage regulator Download PDFInfo
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- CN105988499A CN105988499A CN201510143903.XA CN201510143903A CN105988499A CN 105988499 A CN105988499 A CN 105988499A CN 201510143903 A CN201510143903 A CN 201510143903A CN 105988499 A CN105988499 A CN 105988499A
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Abstract
The invention relates to a power supply side voltage regulator. The voltage regulator produces output voltage, lower than power voltage, of designed voltage level. A reference voltage generator produces reference voltage between grounding voltage and the power voltage. A voltage divider produces feedback voltage between the power voltage and the output voltage. An amplifier produces an amplifier output voltage based on a difference value of the power voltage and the feedback voltage. A buffer device buffers the amplifier output voltage. A channel transistor receives buffer voltage at a control node of the channel transistor so as to lower average load current existing at an output node. A capacitor is connected between a power supply and the output voltage so as to provide peak load current. A load current detecting transistor receives buffer voltage at a control node of the load current detecting transistor so as to sense the load current. A compensation transistor is used for compensating leakage current. An internal load converts sensed load into a voltage control signal exerted onto the compensation transistor.
Description
Technical field
The present invention relates to integrated circuit, particularly relate to a kind of voltage regulator.
Background technology
P channel, such as P-type mos (PMOS) transistor, be
The preferable selection of low cost, the controller such as DC motor controller of low complex degree and blood pressure lowering charge stage.So
And, this is accomplished by stable and accurate voltage regulator and carrys out the power supply as PMOS drive circuit.
Accompanying drawing explanation
By the description of embodiment in detail below, claims and accompanying drawing, the present invention
Other embodiments will be apparent to, the most similar reference represents same or similar element.
Fig. 1 is the schematic block diagram of voltage regulator according to an embodiment of the invention；
Fig. 2 is the schematic circuit of the reference voltage generator of Fig. 1 voltage regulator；
Fig. 3 be Fig. 1 voltage regulator can the schematic circuit of operation transconductance amplifier；
Fig. 4 is the schematic circuit of the buffer of Fig. 1 voltage regulator；And
Fig. 5 is the schematic circuit of the potentiometer of Fig. 1 voltage regulator.
Detailed description of the invention
Disclosed herein is the embodiment being specifically described of the present invention.But, spy disclosed herein
Fixed structural and functional specific descriptions are the most representational, are to describe the exemplary of the present invention
Embodiment.The present invention can realize without being only limited to reality described here with various selectable form
Execute mode.Further, term used herein above is only used to describe specific embodiment and be not intended to
Limit the illustrative embodiments of the present invention.
Used herein above, " one " " one " of singulative and " being somebody's turn to do " mean also to include again
Number form formula, unless explicitly pointed out other implications in context.Will be further appreciated that term " includes " " bag
Contain " feature presented, step or element are listed, but it is not excluded that other one or more features, steps
Rapid or the existence of element or increase.It will also be noted that in some alternative embodiments, institute
Function/the action stated can not be carried out according to sequence represented in accompanying drawing.Such as, according to involved function/
Effect, shown continuous print two width figure can essentially perform the most simultaneously or sometimes can be with contrary
Order performs.
In one embodiment, the present invention is a kind of voltage regulator, and it produces at output node
Output voltage, the voltage level of the design of this output voltage is less than the supply voltage of voltage regulator.With reference to electricity
Pressure generator receives supply voltage and ground voltage and the reference electricity producing between ground connection and supply voltage
Pressure.Potentiometer is connected between supply voltage and output voltage to produce between power supply and output voltage
Feedback voltage.Amplifier is connected for receiving reference voltage and feedback voltage and based on reference and feedback
The difference of voltage produces amplifier output voltage.Buffer be connected for reception amplifier output voltage and
Produce the voltage of buffering.Channel transistor is connected between output and ground voltage and is connected for
It controls node and receives the voltage of buffering so that drop-down (sink) occurs in the average load current of its output node.
Capacitor is connected between power supply and output voltage to provide peak load current at output node.Negative
Carry current detecting transistor to be connected between power supply and ground voltage and be connected for control node at it
Place receives the voltage of buffering for inducing the load current of present output node.Compensation transistor is connected
To compensate the electric leakage in the output node downstream formed between output and ground voltage between power supply and output voltage
The leakage current of flow path.Internal load and load current detection transistor are connected in series in power supply and ground nodes
Between so as the load current of sensing to be transformed to voltage control signal be applied to compensate transistor control joint
Point.
Fig. 1 is the schematic block diagram of voltage regulator 100 according to an embodiment of the invention.
Voltage regulator 100 receives supply voltage VDD and ground voltage VSS and produces power source reference output
Voltage Vo, this power source reference output voltage Vo are the voltage level of the design less than supply voltage VDD.
Reference voltage generator 1110 produces reference voltage Vref, and it is as supply voltage VDD
Reference.Reference voltage Vref be applied to can computing trsanscondutance amplifier (OTA) 120 negative pole input
End, this trsanscondutance amplifier receives feedback voltage Vfb at positive terminal.Feedback voltage Vfb is by potentiometer 140 institute
Producing, potentiometer 140 arranges the gain of voltage regulator 100.OTA 120 provides enough gains to adjust
Joint output voltage Vo is to the voltage level of the design less than supply voltage VDD.
N-shaped main channel element NMOS_A is used for the drop-down downstream powered by VDD and Vo
The average load current of circuit (not shown).Shunt capacitance Cbypass is used to provide for peak load current.
N-shaped load current detection element NMOS_B is used for inductive load electric current.Internal load, in this embodiment
In be resistive load RL, being used for being transformed to the load current of sensing controlling voltage G_C, to be used for N-shaped auxiliary
Helping pull-up element NMOS_C, it is for compensating from Vo's (i.e. from output node) to VSS (ground connection)
If potential leakage current is to exist big drain current path in meaning circuit downstream in office, fault can be avoided.
It is steady to improve loop with the grid of NMOS_A that buffer 130 is used for the gain stage isolating OTA 120
Qualitative.
In operation, when output voltage Vo rises, potentiometer 140 promotes feedback voltage Vfb
Rising, this promotes the output voltage O1 of OTA 120 to rise, and this promotes the output voltage of buffer BUF
G_AB rises, and this promotes the electric current flowing through NMOS_B and NMOS_A to rise, and this promotes control signal
G_C declines, and this promotes the electric current flowing through NMOS_C to decline, and then promotes output voltage Vo to decline.
Similarly, when output voltage Vo declines, potentiometer 140 promotes feedback voltage Vfb
Declining, this promotes the output voltage O1 of OTA 120 to decline, and this promotes the output voltage of buffer BUF
G_AB declines, and this promotes the electric current flowing through NMOS_B and NMOS_A to decline, and this promotes control signal
G_C rises, and this promotes the electric current flowing through NMOS_C to rise, and then promotes output voltage Vo to rise.
So, voltage regulator 100 adjusts output voltage Vo according to below equation to follow the tracks of electricity
Source voltage:
VDD-Vo=K* (VDD-Vref),
Wherein K is the gain of voltage regulator 100, and it is determined by potentiometer 140.
Fig. 2 is the schematic circuit of the reference voltage generator 110 of Fig. 1.Reference voltage is sent out
Raw device 110 (i) receives supply voltage VDD, ground voltage VSS and the reference voltage Vbg of ground connection reference,
Such as generally in integrated circuits can band gap reference voltage, it is to technique, voltage and temperature (PVT)
Change insensitive, and (ii) produces the reference voltage Vref of power source reference.
In operation, amplifier AMP, its can be common can operation transconductance amplifier, adjust
Save the control voltage Vgate in n-type transistor MN0 to force feedback voltage V mir equal to reference to electricity
Vbg is so that the electric current flowing through voltage R1 is Vbg/R1 to pressure.This same electric current Vbg/R1 flows through crystal
Pipe MN0 and resistance R2, it is connected between node VDD and Vref, so, supply voltage VDD
With voltage difference is Vbg*R2/R1 between power source reference voltage Vref.In a possible implementation,
Vbg=1.2V, R1=12kohm, and R2=30kohm, the voltage drop on R2 is 3V, therefore,
In this embodiment, the reference voltage Vref of power source reference will be less than supply voltage VDD 3V.
Fig. 3 be Fig. 1 can the schematic circuit of operation transconductance amplifier 120.OTA 120(i)
Receive supply voltage VDD, ground voltage VSS, from reference voltage generator 110 at negative input node INM
Reference voltage Vref, and from potentiometer 140 in the feedback voltage Vfb of positive input node INP, and
And (ii) produces OTA output voltage O1 at output node OUT.
In operation, when feedback voltage Vfb goes above reference voltage Vref, then (i)
The electric current flowing through n-type transistor MN2 will increase, and (ii) flows through the electric current of n-type transistor MN1
To reduce.As a result, (i) flows through the electric current of MP3 and increase and (ii) is flow through the electric current of MP1 by minimizing.
So, it follows that will promote (i) flow through p-type mirrored transistor MP4 image current will increase and
(ii) image current flowing through p-type mirrored transistor MP2 reduces.So, it follows that will promote to flow through
The electric current of n-type transistor MN3 reduces, and it will promote to flow through the image current of N-shaped mirrored transistor MN4
Reducing, it will promote OTA output voltage O1 to rise.
Similarly, when feedback voltage Vfb becomes less than reference voltage Vref, then (i) flows
Minimizing and (ii) are flow through the electric current of n-type transistor MN1 by increasing by the electric current crossing n-type transistor MN2
Add.As a result, (i) flows through the electric current of MP3 and minimizing and (ii) is flow through the electric current of MP1 by increase.This
Sample, it follows that the image current that (i) will be promoted to flow through p-type mirrored transistor MP4 reduces and (ii)
The image current flowing through p-type mirrored transistor MP2 increases.So, it follows that will promote to flow through N-shaped crystalline substance
The electric current of body pipe MN3 increases, and this will promote the image current flowing through N-shaped mirrored transistor MN4 to increase,
It will promote OTA output voltage O1 to decline.
Thus, when feedback voltage Vfb goes above reference voltage Vref, OTA exports electricity
Pressure O1 increases, and vice versa.Because OTA 120 is arranged in voltage regulator 100 with the form of closed-loop path
In, respectively at voltage Vfb and Vref of node INP and INM, identical by being driven to, so flow
Coupling is flow through the electric current of MN4 by the electric current crossing MP4.
Fig. 4 is the schematic circuit of the buffer 130 of Fig. 1.Buffer 130 (i) receives
(it can be supply voltage VDD or other available power supply electricity to buffer supply voltage VDD_BUF
Pressure), ground voltage VSS, and from OTA 120 at the OTA output voltage O1 of its input node IN
And (ii) produce buffer output voltage G_AB at output node OUT.In some implementation,
Buffer 130 is traditional unity gain buffer, and it represents at the voltage levvl that input node IN receives
O1 is identical with its output voltage G_AB at output node OUT.
In operation, when the voltage O1 of input node IN rises, p-type transistor is flow through
The electric current of MP1 reduces, and it makes to flow through n-type transistor MN1 and the electricity of N-shaped mirrored transistor MN2
Stream reduces.Simultaneously as constant-current source ITAIL, the electric current flowing through p-type transistor MP2 increases, and it promotes
The voltage G_AB of output node OUT rises.As a result, the electric current flowing through MP2 reduces starting until flowing
The currents match crossing MP2 flows through the electric current of MN2.Thus, when input voltage O1 rises, output electricity
Pressure G_AB also increases.
Similarly, when the voltage O1 of input node IN declines, p-type transistor MP1 is flow through
Electric current increase, its electric current promoting to flow through n-type transistor MN1 and N-shaped mirrored transistor MN2 increases.
Simultaneously as constant-current source ITAIL, the electric current flowing through p-type transistor MP2 reduces, and it promotes output node
The voltage of the voltage G_AB of OUT declines.As a result, the electric current flowing through MP2 is increased up flowing through by starting
The currents match of MP2 flows through the electric current of MN2.Thus, when input voltage O1 declines, output voltage
G_AB also declines.
Fig. 5 is the schematic circuit of the potentiometer 140 of Fig. 1.Potentiometer 140 (i) receives
Supply voltage VDD and output voltage Vo and (ii) produce feedback voltage Vfb, its voltage level and electricity
The impedance of resistance RA and RB has functional relation, and wherein the gain of voltage regulator 100 is by K=(RA+RB)
/ RA gives.
Although the present invention is described in the situation of the voltage regulator 100 of Fig. 1-5, that
It will be appreciated by those skilled in the art that the present invention need not be confined to this specific embodiment.Such as, bipolarity
Transistor can be used for replacing MOS transistor.And, Fig. 2-5 shows the spy of respective element in Fig. 1
Determine embodiment.Those skilled in the art will be appreciated that alternative embodiment is for those
It is possible for each in element.
In certain embodiments, in reference voltage generator 110 and potentiometer 140 at least
One is programmable, so that the voltage of the design less than the output voltage Vo of supply voltage VDD is electric
Flat is adjustable.Such as, reference voltage generator 110 can be programmable, and it is by the resistance of Fig. 2
R1 and/or resistance R2 uses programmable resistance to realize.Similarly, potentiometer 140 can be programmable,
Programmable resistance is used to realize by the resistance RA and/or resistance RB of Fig. 5.
Also for the purpose described, term " couples " " being couple to " " being coupled to " " connection " " connection
To " " being connected " refer to can allowing of any-mode known in the art or later technology development
Transmit the any-mode of energy between two or more elements, and the insertion of one or more add ons is also
It is expected, although not necessarily.Relative, term " directly couples " " being directly connected to " etc. and means not
There is this add ons.
Additionally, for the purposes of the present invention, it is to be appreciated that all of canopy pole is all by fixing
Voltage power scope (or multiple scope) and ground connection are powered, unless had other diagrams.Ground connection can be by
It is considered the power supply with about zero volts, and the power supply with any required voltage can be replaced with
Ground connection.
For the purposes of the present invention, signal can be with mutually of the same name with corresponding node, port or path
Claim to represent and can be exchanged with each other.
For the purpose illustrated, transistor is properly viewed as single assembly.But, those abilities
Territory artisans will appreciate that transistor will have multiple size (such as, canopy pole width and length)
With characteristic (such as, threshold voltage, gain etc.) and multiple transistor being connected in parallel can be included so that
Required electrical characteristic is obtained from this combination.Further, shown transistor can be Darlington.
As, used in this specification and claims, term " channel node " is general
Refer to metal-oxide semiconductor (MOS) (MOS) transistor unit (also referred to as MOSFET) source electrode or
Drain electrode, term " raceway groove " refers to the path by the device between source electrode and drain electrode, term " control node "
The generally referred to as grid of MOSFET.Similarly, the most as used in the claims, term " source
Pole " " drain electrode " and " canopy pole " should be understood that the source electrode of MOSFET, drain electrode and canopy pole, or when this
The emitter stage of bipolar device, colelctor electrode and base stage when bright embodiment utilizes bipolar transistor Manifold technology to realize.
Unless provided other clear and definite instructions, each numerical value and scope it should be understood that be of about,
As the word " about " " approximation " before this numerical value or scope.
It will be further appreciated that, those skilled in the art can be in order to explain that the present invention implements
Example and details, material and layout in the part that is described and is set forth makes multiple change, its without departing under
The scope of the embodiment of the present invention that face claims are covered.
In this specification comprising any claim, term " each " can be used for referring to
For the one or more special characteristics in multiple aforementioned components or step.When using open-ended term " to include ",
Quoting of term " each " is not excluded for element that add, that do not describe or step, accordingly, it is to be understood that
Being that a device can have element additional, that do not describe, a kind of method can have additional, not
The step described, element additional, that do not describe or step do not have described one or more specific here
Feature.
Mean jointly to describe with embodiment herein with reference to " embodiment " or " embodiment "
Specific feature, structure or characteristic are comprised at least one embodiment of the present invention.Word is " a reality
Execute in example " occur need not being understood as identical embodiment in multiple positions of description, nor is it necessary that phase
The mutual single or selectable embodiment getting rid of other embodiments.Term " embodiment " is the most such as
This.
The embodiment that the application claim is covered is limited to (1) this specification and is capable of
And (2) meet the legal requirements the embodiment of theme.Irrealizable embodiment and corresponding to non-legal master
Even if topic embodiment its fall into protection domain within be also explicitly excluded.
Claims (10)
1. a voltage regulator, produces output voltage at output node, and this output voltage is for less than for electricity
The voltage level of the design of the supply voltage of pressure actuator, this voltage regulator includes:
Reference voltage generator, receives supply voltage and ground voltage, and produces between ground voltage and power supply
Reference voltage between voltage；
Potentiometer, is connected between supply voltage and output voltage to produce between supply voltage and output electricity
Feedback voltage between pressure；
Amplifier, be coupled to receive reference voltage and feedback voltage and based on reference voltage and feedback voltage it
Between difference produce amplifier output voltage；
Buffer, is coupled to receive amplifier output voltage and produces the voltage of buffering；
Channel transistor, is connected between output voltage and ground voltage, and connected to control at it
Node receives the voltage of buffering to drag down the average load current occurring in output node；
Capacitor, is connected between supply voltage and output voltage to provide peak load electricity at output node
Stream；
Load current detection transistor, is connected between supply voltage and ground voltage and connected with at it
The voltage controlling node reception buffering senses the load current of present output node；
Compensate transistor, be connected between supply voltage and output voltage to compensate at output voltage and connecing
The leakage current of the drain current path in output node downstream is come between ground voltage；And
Internal load, and load current detection transistor be connected in series between supply voltage and ground voltage with
The load current of sensing is just converted to be applied to compensate the voltage control signal controlling node of transistor.
Voltage regulator the most according to claim 1, wherein:
The gain resistance ratios based on potentiometer of potentiometer；
The voltage level of design is based on reference voltage and the gain of potentiometer；And
At least one in reference voltage generator and potentiometer is programmable, so that the voltage electricity of design
Flat is adjustable.
Voltage regulator the most according to claim 1, wherein internal load includes being connected to supply voltage
And compensate the resistance controlled between node of transistor.
Voltage regulator the most according to claim 1, wherein reference voltage generator is based on the band received
Gap reference voltage produces reference voltage.
Voltage regulator the most according to claim 4, wherein reference voltage generator includes:
Second amplifier, is coupled to receive band gap reference voltage and the second feedback voltage and based on bandgap reference
Difference between voltage and the second feedback voltage produces the second amplifier output voltage；
Transistor, connected to receive the second amplifier output voltage at its control node；
First resistance, is connected between transistor and ground voltage, and wherein the second feedback voltage is at crystal
The voltage level of the point of intersection between pipe and the first resistance；And
Second resistance, is connected between supply voltage and transistor, and wherein reference voltage is at the second resistance
And the voltage level at filling between transistor.
Voltage regulator the most according to claim 1, wherein amplifier is can the trsanscondutance amplifier of computing
(OTA)。
Voltage regulator the most according to claim 1, wherein buffer is the buffer of unit gain.
Voltage regulator the most according to claim 1, wherein buffer is from channel transistor and load electricity
Transistor isolation amplifier is surveyed in stream control so that the loop stability improved in voltage regulator.
Voltage regulator the most according to claim 1, wherein:
Gain impedance based on the potentiometer ratio of potentiometer；
The voltage level of described design is the gain based on reference voltage and potentiometer；
Reference voltage generator produces described reference voltage based on the band gap reference voltage received；
Reference voltage generator includes:
Second amplifier, is coupled to receive described band gap reference voltage and the second feedback voltage, and based on band
Difference between gap reference voltage and the second feedback voltage produces the second amplifier output voltage；
Transistor, connected to receive the second amplifier output voltage at its control node；
First resistance, is connected between transistor and ground voltage, and wherein the second feedback voltage is at crystal
The voltage level of the point of intersection between pipe and the first resistor；And
Second resistance, is connected between supply voltage and transistor, and wherein reference voltage is at the second resistance
And the voltage level of the point of intersection between transistor；
Amplifier is can the trsanscondutance amplifier (OTA) of computing；And
Buffer is the buffer of unit gain, by amplifier and channel transistor and load current detection crystal
Pipe isolation is so that the loop stability improved in voltage regulator.
Voltage regulator the most according to claim 9, wherein in reference voltage generator and potentiometer extremely
Few one is programmable, so that the voltage level of design is adjustable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510143903.XA CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510143903.XA CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
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| Publication Number | Publication Date |
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| CN105988499A true CN105988499A (en) | 2016-10-05 |
| CN105988499B CN105988499B (en) | 2019-08-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510143903.XA Expired - Fee Related CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114594357A (en) * | 2020-12-03 | 2022-06-07 | 圣邦微电子（北京）股份有限公司 | Drain-source voltage detection circuit and switching circuit of power tube |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101082824A (en) * | 2006-06-01 | 2007-12-05 | 罗姆股份有限公司 | Power supply device and electric appliance therewith |
| US20090009147A1 (en) * | 2007-07-03 | 2009-01-08 | Holtek Semiconductor Inc. | Low drop-out voltage regulator with high-performance linear and load regulation |
| CN101807853A (en) * | 2009-02-17 | 2010-08-18 | 精工电子有限公司 | Voltage regulator |
-
2015
- 2015-02-16 CN CN201510143903.XA patent/CN105988499B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101082824A (en) * | 2006-06-01 | 2007-12-05 | 罗姆股份有限公司 | Power supply device and electric appliance therewith |
| US20090009147A1 (en) * | 2007-07-03 | 2009-01-08 | Holtek Semiconductor Inc. | Low drop-out voltage regulator with high-performance linear and load regulation |
| CN101807853A (en) * | 2009-02-17 | 2010-08-18 | 精工电子有限公司 | Voltage regulator |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114594357A (en) * | 2020-12-03 | 2022-06-07 | 圣邦微电子（北京）股份有限公司 | Drain-source voltage detection circuit and switching circuit of power tube |
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| Publication number | Publication date |
|---|---|
| CN105988499B (en) | 2019-08-16 |
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