CN105977216B - 一种小型化气密性无引线陶瓷封装结构 - Google Patents

一种小型化气密性无引线陶瓷封装结构 Download PDF

Info

Publication number
CN105977216B
CN105977216B CN201610535293.2A CN201610535293A CN105977216B CN 105977216 B CN105977216 B CN 105977216B CN 201610535293 A CN201610535293 A CN 201610535293A CN 105977216 B CN105977216 B CN 105977216B
Authority
CN
China
Prior art keywords
layer
ceramic
ceramic layer
bonding
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610535293.2A
Other languages
English (en)
Other versions
CN105977216A (zh
Inventor
周平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHENGDU CORPRO TECHNOLOGY Co Ltd
Original Assignee
CHENGDU CORPRO TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHENGDU CORPRO TECHNOLOGY Co Ltd filed Critical CHENGDU CORPRO TECHNOLOGY Co Ltd
Priority to CN201610535293.2A priority Critical patent/CN105977216B/zh
Publication of CN105977216A publication Critical patent/CN105977216A/zh
Application granted granted Critical
Publication of CN105977216B publication Critical patent/CN105977216B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/06Containers; Seals characterised by the material of the container or its electrical properties
    • H01L23/08Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

本发明公开了小型化气密性无引线陶瓷封装结构,包括陶瓷外壳(1)、粘片胶(2)、硅片(3)、键合丝(4)和盖板(5);陶瓷外壳(1)包括陶瓷层(11)和金属化层(12),所述陶瓷层(11)为腔体结构,硅片(3)通过粘片胶(2)安装在所述腔体结构底部的粘芯区,陶瓷层(11)包括上陶瓷层(112)和下陶瓷层(111),金属化层(12)包括封口环(125)和焊盘层(121),封口环(125)、上陶瓷层(112)、下陶瓷层(111)和焊盘层(121)从上往下依次设置,盖板(5)设置在封口环(125)的顶部,下陶瓷层(111)的侧壁设有半圆孔(1110),键合丝(4)用于连接硅片(3)与金属化层(12)。本发明比现有气密性无引线封装的外形更小。

Description

一种小型化气密性无引线陶瓷封装结构
技术领域
本发明涉及集成电路陶瓷封装技术领域,特别是涉及一种小型化气密性无引线陶瓷封装结构。
背景技术
在集成电路封装技术领域,陶瓷封装在力学性能、湿气渗透和热性能等方面优于塑料封装。但是相对塑料封装来说,因陶瓷封装结构的原因,陶瓷封装往往比塑料封装的大。在部分应用场景,可采用高可靠性的塑料封装也可采用陶瓷封装,为降低产品生产成本,往往需要塑料封装焊盘与陶瓷封装焊盘兼容,从而共用一套PCB板。小型化封装的主要代表为QFN,对应陶瓷封装为CLCC封装。
为实现小型化,我们常优化封口环的宽度W2,但需保证器件的气密性,盖板与封口环的重叠宽度不低于0.35mm;且封口环边缘需有一焊料流淌区,其宽度W3约为盖板的厚度,一般盖板厚度为0.25mm,则w3为0.25mm;优化键合指的长度,为保证绑定的可行性,要求匹配键合指离封口环的距离与键合指长度W1,这样劈刀才能可靠的绑定金线。
如图1所示,现有接地的作法为:在陶瓷底部安装一散热片,散热片内嵌于下陶瓷中。接地时,将接地信号直接绑定到热沉上。这样要求硅片边缘到粘芯区内壁的距离L为1.1-1.5mm。
常规气密性封装为:采用陶瓷外壳并使用金锡合金(Au80Sn20)将盖板安装在陶瓷外壳顶部。适用于高可靠陶封应用领域,如军事领域,汽车电子领域。
发明内容
本发明的目的在于克服现有技术的不足,提供一种小型化气密性无引线陶瓷封装结构,与现有气密性无引线封装相比,其外形更小,极大的克服了陶封与塑封的兼容问题。
本发明的目的是通过以下技术方案来实现的:一种小型化气密性无引线陶瓷封装结构,包括陶瓷外壳、粘片胶、硅片、键合丝和盖板;所述陶瓷外壳包括陶瓷层和金属化层,所述陶瓷层为腔体结构,硅片通过粘片胶安装在所述腔体结构底部的粘芯区,所述陶瓷层包括上陶瓷层和下陶瓷层,所述金属化层包括封口环和焊盘层,所述封口环、上陶瓷层、下陶瓷层和焊盘层从上往下依次设置,盖板设置在封口环的顶部,下陶瓷层的侧壁设有半圆孔,键合丝用于连接硅片与金属化层。
所述下陶瓷层包括从下往上依次设置的第一陶瓷层、第二陶瓷层和第三陶瓷层。
所述上陶瓷层和下陶瓷层的俯视图均为矩形状,下陶瓷层的长宽小于上陶瓷的长宽。
所述上陶瓷层底部设计有倒角结构。
所述金属化层还包括键合指层和金属过孔,键合指层包括接地键合指和信号键合指。
所述接地键合指通过键合丝与硅片连接。
所述焊盘层包括接地焊盘和信号焊盘,所述接地键合指通过金属过孔与接地焊盘连接,所述信号键合指通过半圆孔与信号焊盘连接。
本发明的有益效果是:
(1)与常规气密性无引线封装相比,本发明的外形更小,外形尺寸可缩小3mm左右,极大的提高了陶封与塑封的兼容问题,对于引脚节距(pith)为0.5mm的QFN封装,最小可实现QFN24,外形4×4mm的完全兼容;
(2)本发明在外形很小的情况下,具有优良的板极安装优势,半圆孔可提高板极安装可靠性。
附图说明
图1为现有陶瓷封装结构轴测图;
图2为本发明小型化气密性无引线陶瓷封装结构的示意图;
图3为焊盘层的示意图;
图4为图3中焊盘层的剖视图;
图中,1-陶瓷外壳,2-粘片胶,3-硅片,4-键合丝,5-盖板,11-陶瓷层,111-下陶瓷层,1110-半圆孔,1111-第一陶瓷层,1112-第二陶瓷层,1113-第三陶瓷层,112-上陶瓷层,1120-倒角结构,12-金属化层,120-金属过孔,121-焊盘层,1211-信号焊盘,1212-接地焊盘,122-第一金属层,123-第二金属层,124-键合指层,1241-信号键合指,1242-接地键合指,125-封口环。
具体实施方式
下面结合附图进一步详细描述本发明的技术方案,但本发明的保护范围不局限于以下所述。
如图2、图3和图4所示,一种小型化气密性无引线陶瓷封装结构,包括陶瓷外壳1、粘片胶2、硅片3、键合丝4和盖板5;所述陶瓷外壳1包括陶瓷层11和金属化层12,所述陶瓷层11为腔体结构,硅片3通过粘片胶2安装在所述腔体结构底部的粘芯区。
所述陶瓷层11包括上陶瓷层112和下陶瓷层111,所述下陶瓷层111为多层陶瓷结构,下陶瓷层111包括从下往上依次设置的第一陶瓷层1111、第二陶瓷层1112和第三陶瓷层1113。
所述金属化层12包括焊盘层121、第一金属层122、第二金属层123、键合指层124、封口环125和金属过孔120,所述键合指层124包括接地键合指1242和信号键合指1241。
所述封口环125、上陶瓷层112、下陶瓷层111和焊盘层121从上往下依次设置,盖板5设置在封口环125的顶部,下陶瓷层111的侧壁设有半圆孔(半月槽城堡结构)1110,键合丝4用于连接硅片3与金属化层12。
所述上陶瓷层112和下陶瓷层111的俯视图均为矩形状,下陶瓷层111的长宽小于上陶瓷的长宽。
所述上陶瓷层112底部设计有倒角结构1120。
所述接地键合指1242通过键合丝4与硅片3连接。
所述第一金属层位于第一陶瓷层和第二陶瓷层之间,第二金属层位于第二陶瓷层和第三陶瓷层之间。
所述焊盘层121包括接地焊盘1212和信号焊盘1211,所述接地键合指1242通过金属过孔120与接地焊盘1212连接,所述信号键合指1241通过半圆孔1110与信号焊盘1211连接。
本发明中半圆孔1110不贯穿整个陶瓷外壳1(降低半圆孔1110的高度),并将下陶瓷层111向封装中心内移W,这样焊盘层121的信号焊盘1211可内移,缩小板极安装的焊盘尺寸;陶瓷外壳1顶部无半圆孔1110后,这样可以缩小封口环125宽度w2,充分利用封口环125。下陶瓷层111可向封装中心内移0.2-0.5mm,从而可以使得板极安装焊盘外形X与Y缩小1mm。
本发明接地的方法为:将内部的地信号绑定到接地键合指1242,接地键合指1242通过金属过孔120连接到封装背面的接地焊盘1212,这样可以提高粘芯区的利用率。采用本发明的做法时,只需要求硅片3边缘到粘芯区内壁的距离L为0.2mm以上,这样封装体外形X与Y可缩小2mm。
综上所述,本发明的外形尺寸可缩小3mm以上,CLCC24可实现与QFN24的焊盘可实现无缝兼容。
以上所述仅是本发明的优选实施方式,应当理解本发明并非局限于本文所披露的形式,不应看作是对其他实施例的排除,而可用于各种其他组合、修改和环境,并能够在本文所述构想范围内,通过上述教导或相关领域的技术或知识进行改动。而本领域人员所进行的改动和变化不脱离本发明的精神和范围,则都应在本发明所附权利要求的保护范围内。

Claims (6)

1.一种小型化气密性无引线陶瓷封装结构,其特征在于:包括陶瓷外壳(1)、粘片胶(2)、硅片(3)、键合丝(4)和盖板(5);所述陶瓷外壳(1)包括陶瓷层(11)和金属化层(12),所述陶瓷层(11)为腔体结构,硅片(3)通过粘片胶(2)安装在所述腔体结构底部的粘芯区,所述陶瓷层(11)包括上陶瓷层(112)和下陶瓷层(111),所述金属化层(12)包括封口环(125)和焊盘层(121),所述封口环(125)、上陶瓷层(112)、下陶瓷层(111)和焊盘层(121)从上往下依次设置,盖板(5)设置在封口环(125)的顶部,下陶瓷层(111)的侧壁设有半圆孔(1110),键合丝(4)用于连接硅片(3)与金属化层(12),所述上陶瓷层(112)和下陶瓷层(111)的俯视图均为矩形状,下陶瓷层(111)的长宽小于上陶瓷的长宽。
2.根据权利要求1所述的一种小型化气密性无引线陶瓷封装结构,其特征在于:所述下陶瓷层(111)包括从下往上依次设置的第一陶瓷层(1111)、第二陶瓷层(1112)和第三陶瓷层(1113)。
3.根据权利要求1所述的一种小型化气密性无引线陶瓷封装结构,其特征在于:所述上陶瓷层(112)底部设计有倒角结构(1120)。
4.根据权利要求1所述的一种小型化气密性无引线陶瓷封装结构,其特征在于:所述金属化层(12)还包括键合指层(124)和金属过孔(120),键合指层(124)包括接地键合指(1242)和信号键合指(1241)。
5.根据权利要求4所述的一种小型化气密性无引线陶瓷封装结构,其特征在于:所述接地键合指(1242)通过键合丝(4)与硅片(3)连接。
6.根据权利要求4所述的一种小型化气密性无引线陶瓷封装结构,其特征在于:所述焊盘层(121)包括接地焊盘(1212)和信号焊盘(1211),所述接地键合指(1242)通过金属过孔(120)与接地焊盘(1212)连接,所述信号键合指(1241)通过半圆孔(1110)与信号焊盘(1211)连接。
CN201610535293.2A 2016-07-08 2016-07-08 一种小型化气密性无引线陶瓷封装结构 Active CN105977216B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610535293.2A CN105977216B (zh) 2016-07-08 2016-07-08 一种小型化气密性无引线陶瓷封装结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610535293.2A CN105977216B (zh) 2016-07-08 2016-07-08 一种小型化气密性无引线陶瓷封装结构

Publications (2)

Publication Number Publication Date
CN105977216A CN105977216A (zh) 2016-09-28
CN105977216B true CN105977216B (zh) 2019-03-15

Family

ID=56951310

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610535293.2A Active CN105977216B (zh) 2016-07-08 2016-07-08 一种小型化气密性无引线陶瓷封装结构

Country Status (1)

Country Link
CN (1) CN105977216B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788319B (zh) * 2016-12-15 2020-12-11 广东大普通信技术有限公司 小型化smd晶体振荡器
CN107658270B (zh) * 2017-10-13 2020-06-30 中国电子科技集团公司第十三研究所 电源转换器用陶瓷外壳

Also Published As

Publication number Publication date
CN105977216A (zh) 2016-09-28

Similar Documents

Publication Publication Date Title
KR100809693B1 (ko) 하부 반도체 칩에 대한 신뢰도가 개선된 수직 적층형멀티칩 패키지 및 그 제조방법
US8058720B2 (en) Semiconductor package
JP2020515076A (ja) 超小型電子アセンブリの封止
CN104600054B (zh) 使用低温过程的高温半导体器件封装和结构的方法及装置
TWI552235B (zh) Semiconductor device, semiconductor device manufacturing method
TWI333264B (en) Packaging structure and method of mems microphone
JPS61218139A (ja) 半導体装置
CN103165562A (zh) 无引线封装半导体器件
KR102231769B1 (ko) 고열전도를 위한 히트싱크 노출형 반도체 패키지 및 그 제조방법
KR101574135B1 (ko) 칩 실장 방법 및 칩 패키지
US11128268B1 (en) Power amplifier packages containing peripherally-encapsulated dies and methods for the fabrication thereof
US7564123B1 (en) Semiconductor package with fastened leads
CN104299948B (zh) 具有芯片贴装焊盘的腔体封装
US20070054484A1 (en) Method for fabricating semiconductor packages
CN104103617B (zh) 多层半导体封装
CN105977216B (zh) 一种小型化气密性无引线陶瓷封装结构
TWI587413B (zh) 引線框架上的焊料阻流塞
US20080150106A1 (en) Inverted lf in substrate
JP2005167129A (ja) 電子素子パッケージおよび電子素子パッケージの製造方法
CN205789921U (zh) 一种小型化气密性无引线陶瓷封装结构
CN204289421U (zh) 气密性双腔封装结构
US9064838B2 (en) Heat spreader for integrated circuit device
CN209497436U (zh) 一种滤波器的堆叠式封装结构
CN109427698A (zh) 组装qfp型半导体器件的方法
CN102543910A (zh) 芯片封装件及其制造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant