CN105914781B - Zero sequence circulation inhibition method, device and gird-connected inverter control method for parallel connection system - Google Patents
Zero sequence circulation inhibition method, device and gird-connected inverter control method for parallel connection system Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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Abstract
The invention discloses a kind of zero sequence circulation inhibition method, the control methods of device and gird-connected inverter parallel system, according in a switch periods each phase bridge arm power device open the moment and shutdown the moment, determine the first phase impulse compensation amount, the second phase impulse compensation amount and third phase impulse compensation amount；Zero sequence compensation amount is determined according to the duty ratio of each phase bridge arm power device in a cycle；Each phase impulse compensation amount of acquisition is corresponded into compensation and arrives each phase bridge arm power device, so that each phase bridge arm power device is opened almost the same with the shutdown moment；The zero sequence compensation amount of acquisition is compensated respectively and arrives each phase bridge arm power device, so that each phase bridge arm power device is opened essentially identical with the retention time of shutdown, to improve the consistency of each power device of inverter action in parallel system, can effectively inhibit zero sequence circulation.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a zero sequence circulating current restraining method and device and a grid-connected inverter parallel system control method.
Background
At present, with the increase of grid-connected power of a power station, the power grade requirement of a grid-connected inverter is improved, and in order to reduce the requirement of the power station on the grade of a power device of the grid-connected inverter, the parallel operation of the inverters becomes a research hotspot.
The grid-connected inverter parallel system sharing the direct current bus is widely applied, but the zero sequence circulating current exists in the topological structure, and the zero sequence circulating current flows among subsystems of the parallel system, so that the inverter is easily damaged, the stability of the system operation is reduced, and measures are needed to be taken to inhibit the zero sequence circulating current. As shown in fig. 1, two identical inverters are connected in parallel in the same system, the dc side is connected to the same dc bus, and the ac side is connected to the grid. The flow path of the zero-sequence circulating current is shown in fig. 1, namely P-S11-a1-a 2-S42-N-P, as can be seen from fig. 1, the zero-sequence circulating current does not pass through a power grid, only flows in each sub-inverter system of the parallel system, and no load is consumed, so that a very small zero-sequence voltage difference can form a very large zero-sequence circulating current, and great damage is caused to the parallel system.
Therefore, how to suppress zero-sequence circulating current in the parallel system of the grid-connected inverter is a technical problem to be solved urgently by the technical staff in the field.
Disclosure of Invention
The embodiment of the invention provides a method for inhibiting zero sequence circulating current in a parallel control system of a common direct current bus grid-connected inverter, which is used for inhibiting the zero sequence circulating current in the parallel system of the common direct current bus grid-connected inverter.
The embodiment of the invention discloses a zero sequence circulating current restraining method applied to a parallel system of a grid-connected inverter, which comprises the following steps:
determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase of bridge arm power devices of a first inverter and a second inverter in a grid-connected inverter parallel system in a switching period; wherein, each phase bridge arm power device includes: the bridge arm power device comprises a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device;
determining zero sequence compensation quantity according to duty ratios of bridge arm power devices of each phase of the first inverter and the second inverter in a switching period;
and correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter respectively.
In a possible implementation manner, the method provided by an embodiment of the present invention determines a first phase pulse compensation amount, a second phase pulse compensation amount, and a third phase pulse compensation amount according to an on time and an off time of each phase bridge arm power device of a first inverter and a second inverter in a grid-connected inverter parallel system in one switching cycle, and specifically includes:
calculating the difference value of the on time and the off time of a first-phase bridge arm power device of the first inverter in a switching period to obtain a first on value; calculating the difference value of the on time and the off time of the second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
calculating the difference value of the on time and the off time of the first-phase bridge arm power device of the second inverter in a switching period to obtain a fourth on value; calculating a difference value between the on time and the off time of the second phase bridge arm power device of the second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
calculating the difference value of the obtained first conduction value and the fourth conduction value to obtain a first difference value; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the sixth conduction value to obtain a third difference value;
and respectively halving the obtained first difference, second difference and third difference to obtain the first-phase pulse compensation quantity, the second-phase pulse compensation quantity and the third-phase pulse compensation quantity.
In a possible implementation manner, the method provided by an embodiment of the present invention further includes:
and the control chip in the parallel system of the grid-connected inverter is used for collecting the turn-on time and the turn-off time of each phase of bridge arm power device and feeding the turn-on time and the turn-off time back to the corresponding register.
In a possible implementation manner, in the method provided by an embodiment of the present invention, determining a zero sequence compensation amount according to duty ratios of bridge arm power devices of each phase in a switching cycle of the first inverter and the second inverter specifically includes:
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the first inverter in a switching period to obtain a first zero-sequence duty ratio;
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the second inverter in a switching period to obtain a second zero-sequence duty ratio;
and calculating a difference value between the obtained first zero-sequence duty ratio and the obtained second zero-sequence duty ratio to obtain a zero-sequence duty ratio difference, and multiplying the zero-sequence duty ratio difference by one sixth to obtain the zero-sequence compensation quantity.
In a possible implementation manner, an embodiment of the present invention provides the above method, wherein the duty ratio is determined by:
determining the high-level duration of the trigger pulse of each phase of bridge arm power device through the numerical value recorded by the counter and the clock period provided by the crystal oscillator clock;
and determining the duty ratio of each phase of bridge arm power device according to the high level duration and the switching period of the trigger pulse of each phase of bridge arm power device.
In a possible implementation manner, in the foregoing method provided by an embodiment of the present invention, the correspondingly compensating the determined first phase pulse compensation amount, second phase pulse compensation amount, third phase pulse compensation amount, and zero sequence compensation amount to the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the first inverter and the second inverter respectively specifically includes:
subtracting the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity from the modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter respectively and correspondingly, and subtracting the zero-sequence compensation quantity from the modulation waves;
and correspondingly adding the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity to the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the second inverter respectively, and adding the zero-sequence compensation quantity to the modulation waves respectively.
In a possible implementation manner, in the method provided by an embodiment of the present invention, the compensating the determined first phase pulse compensation amount, second phase pulse compensation amount, and third phase pulse compensation amount to the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the first inverter and the second inverter respectively in correspondence includes:
and respectively compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter through corresponding registers.
In a possible implementation manner, in the foregoing method provided by an embodiment of the present invention, the respectively compensating the determined zero sequence compensation quantities to the modulation waves output by the first phase leg power device, the second phase leg power device, and the third phase leg power device of the first inverter and the second inverter includes:
and respectively compensating the determined zero sequence compensation quantity to modulation waves output by a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the first inverter and the second inverter through corresponding counters.
The embodiment of the invention provides a zero sequence circulating current suppression device applied to a parallel system of a grid-connected inverter, which comprises the following components: a first determining unit, a second determining unit and a compensating unit; wherein,
the first determining unit is used for determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase bridge arm power device of a first inverter and a second inverter in the grid-connected inverter parallel system in one switching period; wherein, each phase bridge arm power device includes: the bridge arm power device comprises a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device;
the second determining unit is used for determining zero sequence compensation quantity according to the duty ratio of each phase bridge arm power device of the first inverter and the second inverter in a switching period;
the compensation unit is used for correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter respectively.
In a possible implementation manner, in the apparatus provided in an embodiment of the present invention, the first determining unit specifically includes: a first calculating unit, a second calculating unit, a third calculating unit and a fourth calculating unit; wherein,
the first calculating unit is used for calculating a difference value between the on time and the off time of the first-phase bridge arm power device of the first inverter in a switching period to obtain a first on value; calculating the difference value of the on time and the off time of the second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
the second calculating unit is used for calculating a difference value between the on time and the off time of the first-phase bridge arm power device of the second inverter in a switching period to obtain a fourth on value; calculating a difference value between the on time and the off time of the second phase bridge arm power device of the second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
the third calculating unit is configured to perform difference calculation on the obtained first conduction value and the fourth conduction value to obtain a first difference; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the obtained sixth conduction value to obtain a third difference value;
the fourth calculating unit is configured to obtain the first phase pulse compensation amount, the second phase pulse compensation amount, and the third phase pulse compensation amount by respectively halving the obtained first difference value, the obtained second difference value, and the obtained third difference value.
In a possible implementation manner, in the apparatus provided in an embodiment of the present invention, the second determining unit specifically includes: a fifth calculating unit, a sixth calculating unit, and a seventh calculating unit; wherein,
the fifth calculating unit is used for adding the duty ratios of the first phase bridge arm power device, the second phase bridge arm power device and the third phase bridge arm power device of the first inverter in a switching period to obtain a first zero-sequence duty ratio;
the sixth calculating unit is configured to add duty ratios of the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the second inverter in one switching period to obtain a second zero-sequence duty ratio;
the seventh calculating unit is configured to perform difference calculation on the obtained first zero-sequence duty cycle and the obtained second zero-sequence duty cycle to obtain a zero-sequence duty cycle difference, and multiply the zero-sequence duty cycle difference by one sixth to obtain the zero-sequence compensation quantity.
In a possible implementation manner, in the above apparatus provided by an embodiment of the present invention, the compensation unit specifically includes: a first compensation subunit and a second compensation subunit; wherein,
the first compensation subunit is configured to correspondingly subtract the determined first-phase pulse compensation amount, second-phase pulse compensation amount and third-phase pulse compensation amount from the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the first inverter, and subtract the zero-sequence compensation amount from the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device;
the second compensation subunit is configured to add the determined first phase pulse compensation amount, second phase pulse compensation amount, and third phase pulse compensation amount to modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the second inverter, respectively, and add the zero sequence compensation amount to the modulation waves.
The embodiment of the invention provides a control method of a grid-connected inverter parallel system, which comprises the following steps:
collecting three-phase current through a current sensor;
collecting three-phase voltage, and converting to obtain a power grid electrical angle;
converting the three-phase current into active current and reactive current according to a Clark conversion formula;
according to preset controller parameters, enabling the active current to follow a given value of the active current, and enabling the reactive current to follow a given value of the reactive current;
outputting a modulation control waveform suitable for a system through space vector pulse width modulation, circulation suppression and modulation wave output; wherein, the circulation suppression adopts the zero sequence circulation suppression method provided by the embodiment of the invention.
The embodiment of the invention has the beneficial effects that:
the embodiment of the invention provides a zero sequence circulating current suppression method, a zero sequence circulating current suppression device and a control method of a system, wherein the zero sequence circulating current suppression method is applied to a parallel system of a grid-connected inverter and comprises the following steps: determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase of bridge arm power devices of a first inverter and a second inverter in a grid-connected inverter parallel system in a switching period; determining zero sequence compensation quantity according to duty ratios of bridge arm power devices of each phase of the first inverter and the second inverter in a switching period; and correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second device respectively. Therefore, the embodiment of the invention correspondingly compensates the obtained pulse compensation quantity of each phase into the modulation wave output by the bridge arm power device of each phase, so that the switching-on and switching-off time of the bridge arm power device of each phase is basically consistent; the obtained zero sequence compensation quantity is respectively compensated into the modulation wave output by each phase of bridge arm power device, so that the on-off holding time of each phase of bridge arm power device is basically the same, the action consistency of each inverter power device in the parallel system is improved, and zero sequence circulating current is effectively inhibited on the premise of not increasing the cost of the parallel system.
Drawings
Fig. 1 is a schematic structural diagram of a grid-connected inverter parallel system in the prior art;
fig. 2 is a flowchart of a zero-sequence circulating current suppression method according to an embodiment of the present invention;
fig. 3 is a schematic timing diagram of turn-on and turn-off times of each phase of bridge arm power device in one period according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a method for calculating a compensation amount of each phase pulse according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a method for calculating a zero sequence compensation quantity according to an embodiment of the present invention;
fig. 6 is a schematic diagram of compensation of each phase pulse compensation amount and zero sequence compensation amount according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a zero-sequence circulating current suppression apparatus provided in an embodiment of the present invention;
fig. 8 is a flowchart of a control method of a grid-connected inverter parallel system according to an embodiment of the present invention;
fig. 9 is a waveform diagram of current output after the zero-sequence circulating current suppression method is adopted according to the embodiment of the present invention;
fig. 10 is a waveform diagram of current output without using the zero-sequence circulating current suppression method according to the embodiment of the present invention.
Detailed Description
The following describes in detail specific embodiments of a zero sequence circulating current suppression method and apparatus and a control method of a grid-connected inverter parallel system according to an embodiment of the present invention with reference to the accompanying drawings.
The embodiment of the invention discloses a zero sequence circulating current restraining method, and as shown in figure 1, a grid-connected inverter parallel system comprises: a first inverter and a second inverter; the first inverter and the second inverter each include: the device comprises a first phase bridge arm power device A, a second phase bridge arm power device B and a third phase bridge arm power device C (wherein each phase bridge arm power device comprises two devices S); as shown in fig. 2, the suppression method may specifically include:
s101, determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase bridge arm power device of a first inverter and a second inverter in a grid-connected inverter parallel system in one switching period;
s102, determining zero sequence compensation quantity according to duty ratios of bridge arm power devices of each phase of the first inverter and the second inverter in a switching period;
s103, correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter respectively.
In the method provided by the embodiment of the invention, the obtained pulse compensation quantity of each phase is correspondingly compensated into the modulation wave output by the power device of each phase bridge arm, so that the switching-on and switching-off time of the power device of each phase bridge arm is basically consistent; the obtained zero sequence compensation quantity is respectively compensated into the modulation wave output by each phase of bridge arm power device, so that the on-off holding time of each phase of bridge arm power device is basically the same, the action consistency of each inverter power device in the parallel system is improved, and zero sequence circulating current is effectively inhibited on the premise of not increasing the cost of the parallel system.
In a specific implementation, in the method provided in the embodiment of the present invention, step S101 may specifically include:
calculating a difference value between the on time and the off time of a first-phase bridge arm power device of a first inverter in a switching period to obtain a first on value; calculating the difference value of the on time and the off time of a second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
calculating the difference value of the on time and the off time of the first-phase bridge arm power device of the second inverter in one switching period to obtain a fourth on value; calculating the difference value of the on time and the off time of a second phase bridge arm power device of a second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
calculating the difference value of the obtained first conduction value and the fourth conduction value to obtain a first difference value; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the sixth conduction value to obtain a third difference value;
and respectively halving the obtained first difference, second difference and third difference to obtain a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity.
Specifically, on-off times of the first phase bridge arm power device a, the second phase bridge arm power device B and the third phase bridge arm power device C in one cycle are shown in fig. 3, the on-off times of the first phase bridge arm power device a are t1 and t6 respectively, the on-off times of the second phase bridge arm power device B are t2 and t5 respectively, and the on-off times of the third phase bridge arm power device C are t3 and t4 respectively. If the switching time of the two inverter power devices of the parallel system is asynchronous, zero sequence voltage difference can be generated, and therefore zero sequence circulating current is generated, the zero sequence current is the ratio of zero sequence voltage to inductance in the system, and the zero sequence voltage is the product of zero sequence duty ratio and direct current voltage Vdc. The difference of the zero sequence currents, i.e. the zero sequence circulating current, can be expressed as:
iz＝iz1-iz2＝(Dz1-Dz2)Vdc/(L1+L2)
wherein izIs a zero-sequence circulating current iz1、iz2For zero sequence current of each inverter, L1、L2For inductance value of each inverter circuit, Dz1、Dz2Is the zero sequence duty cycle of each inverter. As shown in FIG. 4, the present invention bridges the first phase of the first inverter and the first phase of the second inverterThe switching moments of the arm power device, the second phase bridge arm power device and the third phase bridge arm power device are correspondingly differenced to obtain corresponding difference values, wherein the switching moment of each phase bridge arm power device is a conducting time period from on to off in one period, and the conducting time is obtained by subtracting the on moment from the off moment in one period; one half of each difference value is the pulse compensation quantity of each phase, and further, the pulse compensation quantity of each phase is correspondingly compensated to the bridge arm power device of each phase respectively, so that the switching-on and switching-off time of the bridge arm power device of each phase is basically consistent, and the aim of inhibiting zero-sequence circulating current can be achieved.
In specific implementation, the method provided in the embodiment of the present invention may further include: and the control chip in the parallel system of the grid-connected inverter is used for collecting the turn-on time and the turn-off time of each phase of bridge arm power device and feeding the turn-on time and the turn-off time back to the corresponding register. Specifically, a control chip generally applied to a grid-connected inverter parallel system according to the embodiment of the present invention includes a system clock, where when each phase of bridge arm power device of the inverter is turned on or off, a trigger pulse of the bridge arm power device changes from a low level to a high level or from a high level to a low level, and the control chip may collect a time value corresponding to a change time of the trigger pulse level and feed the time value back to a register corresponding to the control chip, so as to collect an on time and an off time of each phase of bridge arm power device, and feed the on time and the off time of each phase of bridge arm power device back to the corresponding register for calculating each phase of pulse compensation amount.
In a specific implementation, in the method provided in the embodiment of the present invention, step S102 may specifically include:
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of a first inverter in a switching period to obtain a first zero-sequence duty ratio;
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of a second inverter in a switching period to obtain a second zero-sequence duty ratio;
and calculating a difference value between the obtained first zero-sequence duty ratio and the second zero-sequence duty ratio to obtain a zero-sequence duty ratio difference, and multiplying the zero-sequence duty ratio difference by one sixth to obtain a zero-sequence compensation quantity.
Specifically, in the method provided in the embodiment of the present invention, in order to obtain the zero-sequence compensation amount, first, zero-sequence duty ratios of the first inverter and the second inverter are respectively calculated, as shown in fig. 5, a zero-sequence duty ratio difference can be obtained by calculating a difference between the two zero-sequence duty ratios, because effective vector action times of subsystems (i.e., inverters) in one switching period in a parallel system of the grid-connected inverter are the same, where the effective vector action time is an action time except for a state (000) and a state (111) in fig. 2; therefore, the zero sequence duty ratio difference is equally divided into six parts, so that zero sequence compensation quantity can be obtained and is used for compensating each phase of bridge arm power device in each inverter, the turn-on and turn-off keeping time of each phase of bridge arm power device is basically the same, and the action consistency of each inverter power device in the parallel system is improved.
In a specific implementation, in the method provided in the embodiment of the present invention, the duty ratio may be determined through the following steps:
determining the high-level duration of the trigger pulse of each phase of bridge arm power device through the numerical value recorded by the counter and the clock period provided by the crystal oscillator clock;
and determining the duty ratio of each phase of bridge arm power device according to the high level duration and the switching period of the trigger pulse of each phase of bridge arm power device.
Specifically, in the method provided by the embodiment of the present invention, in order to obtain the zero sequence compensation quantity, the duty ratio of each phase bridge arm power device needs to be determined, where the duty ratio is a ratio of a high level duration to a switching period in one switching period. The switching period is a fixed value, and if the duration of the high level is measured, the duty ratio can be obtained. The control chip generally applied to the grid-connected inverter parallel system comprises a counter, and a system crystal oscillator provides a basic clock period for the system. The trigger pulse starts to count when the low level is changed into the high level, the trigger pulse stops counting when the high level is changed into the low level, the product of the value of the counter and the clock period of the crystal oscillator is the duration time of the high level, and the ratio of the duration time of the high level to the switching period is obtained so as to obtain the duty ratio.
In a specific implementation, in the method provided in the embodiment of the present invention, step S103 may specifically include:
respectively and correspondingly subtracting the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity from the modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter, and respectively subtracting the zero-sequence compensation quantity;
and correspondingly adding the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity to the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the second inverter respectively, and adding the zero-sequence compensation quantity to the modulation waves respectively.
Specifically, as shown in fig. 6, the obtained pulse compensation quantity of each phase is correspondingly compensated to the power device of each phase bridge arm, so that the on-time and the off-time of the power device of each phase bridge arm are basically consistent; the obtained zero sequence compensation quantity is respectively compensated to each phase of bridge arm power device, so that the on-off keeping time of each phase of bridge arm power device is basically the same, the action consistency of each inverter power device in the parallel system is improved, and the aim of effectively inhibiting the circulating current is fulfilled.
In specific implementation, in the method provided by the embodiment of the present invention, the correspondingly compensating the determined first phase pulse compensation amount, second phase pulse compensation amount, and third phase pulse compensation amount in the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the first inverter and the second inverter respectively may specifically include: and respectively compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter through corresponding registers. Specifically, the determined first-phase pulse compensation amount, second-phase pulse compensation amount and third-phase pulse compensation amount may be correspondingly compensated to the register corresponding to each phase of bridge arm power device, so as to improve the consistency of the switching time of each power device.
In a specific implementation, in the method provided in the embodiment of the present invention, the respectively compensating the determined zero-sequence compensation amount to the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the first inverter and the second inverter may specifically include: and respectively compensating the determined zero sequence compensation quantity into modulation waves output by a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the first inverter and the second inverter through corresponding counters. Specifically, the determined zero sequence compensation quantity can be respectively compensated into the counter corresponding to each phase of bridge arm power device, so that the value of the counter when the trigger pulse of the control chip is high level is influenced, and the consistency of the duty ratio of each power device in one switching period is further improved.
Based on the same inventive concept, an embodiment of the present invention provides a zero sequence circulating current suppression apparatus applied to a grid-connected inverter parallel system, as shown in fig. 7, the zero sequence circulating current suppression apparatus may include: a first determining unit 01, a second determining unit 02, and a compensating unit 03; wherein,
the first determining unit 01 is used for determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase bridge arm power device of a first inverter and a second inverter in a grid-connected inverter parallel system in one switching period; wherein, each phase bridge arm power device includes: the bridge arm power device comprises a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device;
the second determining unit 02 is configured to determine a zero-sequence compensation quantity according to duty ratios of each phase of bridge arm power device of the first inverter and the second inverter in a switching period;
the compensation unit 03 is configured to correspondingly compensate the determined first-phase pulse compensation amount, second-phase pulse compensation amount, third-phase pulse compensation amount, and zero-sequence compensation amount to modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device, and the third-phase bridge arm power device of the first inverter and the second inverter, respectively.
The zero-sequence circulating current suppression device provided by the embodiment of the invention determines the first-phase pulse compensation quantity, the second-phase pulse compensation quantity and the third-phase pulse compensation quantity through the first determination unit, determines the zero-sequence compensation quantity through the second determination unit, and correspondingly compensates each-phase pulse compensation quantity into the modulation wave output by each-phase bridge arm power device through the compensation unit, so that the switching-on and switching-off time of each-phase bridge arm power device is basically consistent; the obtained zero sequence compensation quantity is respectively compensated into the modulation wave output by each phase of bridge arm power device, so that the on-off holding time of each phase of bridge arm power device is basically the same, the action consistency of each inverter power device in the parallel system is improved, and zero sequence circulating current is effectively inhibited on the premise of not increasing the cost of the parallel system.
In a specific implementation, as shown in fig. 7, the first determining unit 01 may specifically include: a first calculation unit 011, a second calculation unit 012, a third calculation unit 013, and a fourth calculation unit 014; wherein,
the first calculation unit 011 is used for calculating a difference value between the on-time and the off-time of a first-phase bridge arm power device of the first inverter in a switching period to obtain a first on-value; calculating the difference value of the on time and the off time of a second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
the second calculating unit 012 is configured to calculate a difference between an on time and an off time of the first-phase bridge arm power device of the second inverter in one switching cycle to obtain a fourth on value; calculating the difference value of the on time and the off time of a second phase bridge arm power device of a second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
the third calculating unit 013 is configured to perform difference calculation on the obtained first on value and the fourth on value to obtain a first difference; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the sixth conduction value to obtain a third difference value;
the fourth calculating unit 014 is configured to obtain a first phase pulse compensation amount, a second phase pulse compensation amount and a third phase pulse compensation amount by respectively halving the obtained first difference, second difference and third difference.
Specifically, the conduction time of each phase of bridge arm power device in the first inverter and the second inverter can be respectively calculated by the first calculating unit and the second calculating unit, the conduction time difference of the corresponding phase of bridge arm power device in the first inverter and the second inverter can be calculated by the third calculating unit, and then the fourth calculating unit halves each difference value to obtain the corresponding phase pulse compensation amount.
In a specific implementation, as shown in fig. 7, the second determining unit 02 may specifically include: a fifth calculating unit 021, a sixth calculating unit 022, and a seventh calculating unit 023; wherein,
the fifth calculating unit 021 is configured to add duty ratios of the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the first inverter in one switching period to obtain a first zero-sequence duty ratio;
the sixth calculating unit 022 is configured to add duty ratios of the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the second inverter in one switching period to obtain a second zero-sequence duty ratio;
the seventh calculating unit 023 is configured to perform difference calculation on the obtained first zero-sequence duty cycle and the obtained second zero-sequence duty cycle to obtain a zero-sequence duty cycle difference, and multiply the zero-sequence duty cycle difference by one sixth to obtain the zero-sequence compensation quantity.
Specifically, the zero-sequence duty cycles of the first inverter and the second inverter may be calculated by the fifth calculating unit and the sixth calculating unit, respectively, and then the zero-sequence duty cycle difference may be calculated by the seventh calculating unit, and the zero-sequence duty cycle difference may be multiplied by one sixth to obtain the zero-sequence compensation amount. The specific implementation process is as described above and will not be described in detail here.
In a specific implementation, as shown in fig. 7, the compensation unit 03 may specifically include: a first compensation subunit 031 and a second compensation subunit 032; wherein,
the first compensation subunit 031 is configured to respectively subtract the determined first-phase pulse compensation amount, second-phase pulse compensation amount, and third-phase pulse compensation amount from the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device, and the third-phase bridge arm power device of the first inverter, and subtract the zero-sequence compensation amount from the modulation waves;
the second compensation subunit 032 is configured to add the determined first-phase pulse compensation amount, second-phase pulse compensation amount, and third-phase pulse compensation amount to the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device, and the third-phase bridge arm power device of the second inverter, and add the zero-sequence compensation amount to the modulation waves.
Specifically, the first phase pulse compensation quantity, the second phase pulse compensation quantity, the third phase pulse compensation quantity and the zero sequence compensation quantity can be respectively compensated into the modulation waves output by the bridge arm power devices of each phase of the first inverter and the second inverter through the first compensation subunit and the second compensation subunit. The specific implementation process is as described above and will not be described in detail here.
Based on the same inventive concept, an embodiment of the present invention provides a method for controlling a grid-connected inverter parallel system, as shown in fig. 8, the method may specifically include:
s201, collecting three-phase current through a current sensor;
s202, collecting three-phase voltage and converting the three-phase voltage into a power grid electrical angle;
s203, converting the three-phase current into active current and reactive current according to a Clark conversion formula;
s204, according to preset controller parameters, enabling the active current to follow the given value of the active current, and enabling the reactive current to follow the given value of the reactive current;
s205, outputting a modulation control waveform suitable for a system through space vector pulse width modulation, circulation current suppression and modulation wave output; wherein, the circulation suppression adopts the zero sequence circulation suppression method provided by the embodiment of the invention.
The control method of the parallel system of the grid-connected inverter provided by the embodiment of the invention mainly comprises current acquisition and voltage phase locking, active current and reactive current separation, current controller control, space vector pulse width modulation, circulation suppression, modulated wave output and system current output, wherein circulation suppression can achieve the purposes of suppressing the zero-sequence circulation of the system and improving the operation stability of the system by adopting the zero-sequence circulation suppression method provided by the embodiment of the invention, and other steps are the same as those in the prior art, and are not described in detail herein. The current waveform output by the parallel system of the grid-connected inverter by adopting the zero sequence circulating current suppression method provided by the embodiment of the invention is shown in fig. 9, and the current waveform output by the parallel system of the grid-connected inverter by adopting the zero sequence circulating current suppression method not provided by the embodiment of the invention is shown in fig. 10.
The embodiment of the invention provides a zero sequence circulating current suppression method, a zero sequence circulating current suppression device and a control method of a system, wherein the zero sequence circulating current suppression method is applied to a parallel system of a grid-connected inverter and comprises the following steps: determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase of bridge arm power devices of a first inverter and a second inverter in a grid-connected inverter parallel system in a switching period; determining zero sequence compensation quantity according to duty ratios of bridge arm power devices of each phase of the first inverter and the second inverter in a switching period; and correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second device respectively. Therefore, the embodiment of the invention correspondingly compensates the obtained pulse compensation quantity of each phase into the modulation wave output by the bridge arm power device of each phase, so that the switching-on and switching-off time of the bridge arm power device of each phase is basically consistent; the obtained zero sequence compensation quantity is respectively compensated into the modulation wave output by each phase of bridge arm power device, so that the on-off holding time of each phase of bridge arm power device is basically the same, the action consistency of each inverter power device in the parallel system is improved, and zero sequence circulating current is effectively inhibited on the premise of not increasing the cost of the parallel system.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (11)
1. A zero sequence circulating current suppression method applied to a grid-connected inverter parallel system is characterized by comprising the following steps:
determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase of bridge arm power devices of a first inverter and a second inverter in a grid-connected inverter parallel system in a switching period; wherein, each phase bridge arm power device includes: the bridge arm power device comprises a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device;
determining zero sequence compensation quantity according to duty ratios of bridge arm power devices of each phase of the first inverter and the second inverter in a switching period;
respectively and correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter;
determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase bridge arm power device of a first inverter and a second inverter in a grid-connected inverter parallel system in a switching period, and specifically comprises the following steps:
calculating the difference value of the on time and the off time of a first-phase bridge arm power device of the first inverter in a switching period to obtain a first on value; calculating the difference value of the on time and the off time of the second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
calculating the difference value of the on time and the off time of the first-phase bridge arm power device of the second inverter in a switching period to obtain a fourth on value; calculating a difference value between the on time and the off time of the second phase bridge arm power device of the second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
calculating the difference value of the obtained first conduction value and the fourth conduction value to obtain a first difference value; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the sixth conduction value to obtain a third difference value;
and respectively halving the obtained first difference, second difference and third difference to obtain the first-phase pulse compensation quantity, the second-phase pulse compensation quantity and the third-phase pulse compensation quantity.
2. The method of claim 1, further comprising:
and the control chip in the parallel system of the grid-connected inverter is used for collecting the turn-on time and the turn-off time of each phase of bridge arm power device and feeding the turn-on time and the turn-off time back to the corresponding register.
3. The method of claim 1, wherein determining a zero sequence compensation amount according to duty ratios of bridge arm power devices of each phase in a switching cycle by the first inverter and the second inverter specifically comprises:
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the first inverter in a switching period to obtain a first zero-sequence duty ratio;
adding the duty ratios of a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the second inverter in a switching period to obtain a second zero-sequence duty ratio;
and calculating a difference value between the obtained first zero-sequence duty ratio and the obtained second zero-sequence duty ratio to obtain a zero-sequence duty ratio difference, and multiplying the zero-sequence duty ratio difference by one sixth to obtain the zero-sequence compensation quantity.
4. The method of claim 1, wherein the duty cycle is determined by:
determining the high-level duration of the trigger pulse of each phase of bridge arm power device through the numerical value recorded by the counter and the clock period provided by the crystal oscillator clock;
and determining the duty ratio of each phase of bridge arm power device according to the high level duration and the switching period of the trigger pulse of each phase of bridge arm power device.
5. The method according to any one of claims 1 to 4, wherein the step of correspondingly compensating the determined first-phase pulse compensation amount, second-phase pulse compensation amount, third-phase pulse compensation amount and zero-sequence compensation amount into the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the first inverter and the second inverter respectively comprises:
subtracting the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity from the modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter respectively and correspondingly, and subtracting the zero-sequence compensation quantity from the modulation waves;
and correspondingly adding the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity to the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the second inverter respectively, and adding the zero-sequence compensation quantity to the modulation waves respectively.
6. The method according to claim 1, wherein the step of correspondingly compensating the determined first phase pulse compensation amount, second phase pulse compensation amount and third phase pulse compensation amount into the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device and the third phase bridge arm power device of the first inverter and the second inverter respectively comprises:
and respectively compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity and third-phase pulse compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter through corresponding registers.
7. The method according to claim 1, wherein the step of compensating the determined zero sequence compensation quantities to the modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device and the third phase bridge arm power device of the first inverter and the second inverter respectively comprises:
and respectively compensating the determined zero sequence compensation quantity to modulation waves output by a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device of the first inverter and the second inverter through corresponding counters.
8. A zero sequence circulating current suppression device applied to a grid-connected inverter parallel system is characterized by comprising: a first determining unit, a second determining unit and a compensating unit; wherein,
the first determining unit is used for determining a first-phase pulse compensation quantity, a second-phase pulse compensation quantity and a third-phase pulse compensation quantity according to the turn-on time and the turn-off time of each phase bridge arm power device of a first inverter and a second inverter in the grid-connected inverter parallel system in one switching period; wherein, each phase bridge arm power device includes: the bridge arm power device comprises a first phase bridge arm power device, a second phase bridge arm power device and a third phase bridge arm power device;
the second determining unit is used for determining zero sequence compensation quantity according to the duty ratio of each phase bridge arm power device of the first inverter and the second inverter in a switching period;
the compensation unit is used for correspondingly compensating the determined first-phase pulse compensation quantity, second-phase pulse compensation quantity, third-phase pulse compensation quantity and zero-sequence compensation quantity into modulation waves output by a first-phase bridge arm power device, a second-phase bridge arm power device and a third-phase bridge arm power device of the first inverter and the second inverter respectively;
the first determining unit specifically includes: a first calculating unit, a second calculating unit, a third calculating unit and a fourth calculating unit; wherein,
the first calculating unit is used for calculating a difference value between the on time and the off time of the first-phase bridge arm power device of the first inverter in a switching period to obtain a first on value; calculating the difference value of the on time and the off time of the second phase bridge arm power device of the first inverter in a switching period to obtain a second on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the first inverter in a switching period to obtain a third on value;
the second calculating unit is used for calculating a difference value between the on time and the off time of the first-phase bridge arm power device of the second inverter in a switching period to obtain a fourth on value; calculating a difference value between the on time and the off time of the second phase bridge arm power device of the second inverter in a switching period to obtain a fifth on value; calculating a difference value between the on time and the off time of a third phase bridge arm power device of the second inverter in a switching period to obtain a sixth on value;
the third calculating unit is configured to perform difference calculation on the obtained first conduction value and the fourth conduction value to obtain a first difference; calculating a difference value between the obtained second conduction value and the fifth conduction value to obtain a second difference value; calculating a difference value between the obtained third conduction value and the obtained sixth conduction value to obtain a third difference value;
the fourth calculating unit is configured to obtain the first phase pulse compensation amount, the second phase pulse compensation amount, and the third phase pulse compensation amount by respectively halving the obtained first difference value, the obtained second difference value, and the obtained third difference value.
9. The apparatus of claim 8, wherein the second determining unit specifically includes: a fifth calculating unit, a sixth calculating unit, and a seventh calculating unit; wherein,
the fifth calculating unit is used for adding the duty ratios of the first phase bridge arm power device, the second phase bridge arm power device and the third phase bridge arm power device of the first inverter in a switching period to obtain a first zero-sequence duty ratio;
the sixth calculating unit is configured to add duty ratios of the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the second inverter in one switching period to obtain a second zero-sequence duty ratio;
the seventh calculating unit is configured to perform difference calculation on the obtained first zero-sequence duty cycle and the obtained second zero-sequence duty cycle to obtain a zero-sequence duty cycle difference, and multiply the zero-sequence duty cycle difference by one sixth to obtain the zero-sequence compensation quantity.
10. The apparatus according to claim 8 or 9, wherein the compensation unit specifically comprises: a first compensation subunit and a second compensation subunit; wherein,
the first compensation subunit is configured to correspondingly subtract the determined first-phase pulse compensation amount, second-phase pulse compensation amount and third-phase pulse compensation amount from the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device of the first inverter, and subtract the zero-sequence compensation amount from the modulation waves output by the first-phase bridge arm power device, the second-phase bridge arm power device and the third-phase bridge arm power device;
the second compensation subunit is configured to add the determined first phase pulse compensation amount, second phase pulse compensation amount, and third phase pulse compensation amount to modulation waves output by the first phase bridge arm power device, the second phase bridge arm power device, and the third phase bridge arm power device of the second inverter, respectively, and add the zero sequence compensation amount to the modulation waves.
11. A control method of a grid-connected inverter parallel system is characterized by comprising the following steps:
collecting three-phase current through a current sensor;
collecting three-phase voltage, and converting to obtain a power grid electrical angle;
converting the three-phase current into active current and reactive current according to a Clark conversion formula;
according to preset controller parameters, enabling the active current to follow a given value of the active current, and enabling the reactive current to follow a given value of the reactive current;
outputting a modulation control waveform suitable for a system through space vector pulse width modulation, circulation suppression and modulation wave output; wherein the circulation suppression adopts a zero sequence circulation suppression method as claimed in any one of claims 1-7.
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