CN105874605A - 平坦化层 - Google Patents

平坦化层 Download PDF

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CN105874605A
CN105874605A CN201480046822.1A CN201480046822A CN105874605A CN 105874605 A CN105874605 A CN 105874605A CN 201480046822 A CN201480046822 A CN 201480046822A CN 105874605 A CN105874605 A CN 105874605A
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layer
conductor
planarization
conductor layer
substrate
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CN105874605B (zh
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J·哈丁
M·巴拿赫
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Not Rec Yin Ai Greensboro Co Ltd
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Not Rec Yin Ai Greensboro Co Ltd
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Abstract

一种器件，包括非平坦化塑料基板；在非平坦化的基板上形成的电学和/或光学功能层；在功能层上方形成的平坦化层；在平坦化层上方形成的至少第一导体层和半导体层，其中第一导体层限定用于一个或多个晶体管器件的至少源电极和漏电极电路，而半导体层限定用于所述一个或多个晶体管器件的半导体沟道。

Description

平坦化层
平坦化层用在电子器件领域以使非平坦化的表面(诸如，例如塑料基板或者金属箔基板的表面)适合用于形成电子器件的功能层，诸如限定电子器件的电路的图案化的导电层。
非平坦化的塑料和金属箔基板的表面粗糙度被认为使其不适合直接支撑电子器件的任何功能层；而常规方式是在形成电子器件的任何功能层之前使非平坦化的基板的表面平坦化。
本发明的发明人已经确定了形成可以插入在平坦化层和非平坦化的基板之间的功能层的挑战，所述平坦化层用于使所述非平坦化的基板平坦化。
本发明提供了一种器件，包括：基板；用于使基板平坦化的平坦化层；在平坦化层上方形成的至少第一导体层和半导体层，其中第一导体层限定用于一个或多个晶体管器件的至少源电极和漏电极电路，而半导体层限定用于所述一个或多个晶体管器件的半导体沟道；以及在基板和平坦化层之间的额外的功能层。
还提供了一种器件，包括：非平坦化的塑料基板；在非平坦化的基板上形成的电学和/或光学功能层；在功能层上方形成的平坦化层；在平坦化层上方形成的至少第一导体层和半导体层，其中第一导体层限定用于一个或多个晶体管器件的至少源电极和漏电极电路，而半导体层限定用于所述一个或多个晶体管器件的半导体沟道。
根据一个实施例，对于使半导体沟道退化的波长的光，功能层显示出比基板和平坦化层小的透射率(transmittance)。
根据一个实施例，所述使半导体沟道退化的波长的光包括可见光；所述器件还包括在基板的与功能层相对的另一侧的背光部，所述背光部用于将可见光透射到光学介质，所述光学介质位于半导体沟道的与背光部相对的一侧并且由晶体管器件控制；且所述功能层被图案化，使得可见光能从背板透射至除了半导体沟道之外的区域中的所述光学介质。
根据一个实施例，所述光学介质是液晶光学介质。
根据一个实施例，功能层包括第二导体层，所述第二导体层在用于所述一个或多个晶体管中的每一个的漏电极的至少一部分的下面延伸，并且经由平坦化层电容耦接至漏电极电路。
根据一个实施例，所述第二导体层包括导体岛的阵列，每一个导体岛都在第二导体层内连接至所有相邻的导体岛。
根据一个实施例，每个导体岛在位置上基本与用于相应的晶体管的漏电极电路的至少一部分对应。
根据一个实施例，所述第二导体层由互相连接的导电丝的网格形成。
根据一个实施例，额外层包括为每个晶体管器件提供栅电极的第二导体层。
根据一个实施例，所述第二导体层被图案化为独立可寻址栅极线的阵列，每个栅极线都在相应列的晶体管的半导体沟道下方延伸并且包括导电丝的网格。
根据一个实施例，所述第二导体层被图案化为岛的阵列，在所述第二导体层内每一个岛都与其他岛隔离，并且每个岛都可以经由在平坦化层上方延伸的多个寻址线中的一个来寻址。
根据一个实施例，该器件还包括在第一导体层的与第二导体层相对的一侧的平坦化层上方形成的第三导体层，该第三导体层限定所述晶体管器件的阵列的栅电极电路。
本文还提供了一种操作如上所述的器件的方法，包括：控制施加到由第二导体层限定的所述栅电极的电压，以减轻由栅电极电路的操作在半导体沟道中引发的应力。
根据一个实施例，该方法包括：使用由第二导体层限定的所述栅电极调整晶体管器件的阈值电压，并使用所述栅电极电路以开关该晶体管器件。
根据一个实施例，功能层包括在基板和平坦化层之间的第二导体层；所述一个或多个晶体管器件构成显示器件的控制电路；且所述第二导体层形成用于所述显示器件的触摸传感器机制的底部导体。
根据一个实施例，所述额外层包括由互相连接的导电丝的网格形成的图案化的第二导体层。
本文还提供了一种方法，包括：提供非平坦化的基板；在非平坦化的基板上形成电学和/或光学功能层；在功能层上方形成平坦化层；以及在平坦化层上方形成第一导体层和半导体层，其中第一导体层限定用于一个或多个晶体管器件的至少源电极和漏电极电路，而半导体层限定用于所述一个或多个晶体管器件的半导体沟道。
根据该方法的一个实施例，该功能层是图案化的层。
根据上述器件和方法的一个实施例，非平坦化的基板具有大于5nm的表面粗糙度RA。在另一实施例中，非平坦化的基板具有大于10nm的表面粗糙度RA，在又一实施例中，非平坦化的基板具有大于15nm的表面粗糙度RA。表面粗糙度RA是普遍使用的在David Whitehouse的且由Taylor&Francis Books公司出版的“Surfaces and their Measurement”第3.2.1.1节中所具体描述的轮廓粗糙度参数。表面粗糙度RA基于粗糙度轮廓从中线的垂直偏移表征表面，并且是所述垂直偏移的绝对值(大小)的算术平均数。在一个实施例中，非平坦化的塑料基板通过表面划痕和/或其他表面缺陷的存在来表征。
参考附图，在下文仅通过示例的方式详细描述实施例，在附图中：
图1例示了根据本发明的第一实施例的技术；以及
图2例示了用于根据本发明的第二实施例的技术的导电层图案的示例。
图1例示了根据本发明的第一实施例的显示器件的示例。柔性塑料基板2(例如PET或PEN基板)支撑多个顶栅薄膜晶体管(TFT)，每一个顶栅薄膜晶体管都包括由半导体沟道(由图案化的半导体层12提供)连接的源电极8和漏电极10，以及经由栅极电介质14耦接到半导体沟道的栅电极16。限定源电极8和漏电极10的导体层还限定：一组源极寻址线(未示出)，每一个源极寻址线都将TFT相应行的源电极8连接至TFT阵列的边缘处的相应端子；以及延伸的漏极导体，每一个漏极导体都用作连接至栅电极16的覆盖之外的位置的导电连接，用于连接至相应TFT的上覆像素电极22的垂直层间连接20。栅电极16被设置为与上述源极寻址线垂直地延伸的平行栅极线16的阵列，并且每个栅极线16都为相应列的TFT提供栅电极。栅极线16经由绝缘体层18与上覆像素电极22隔离。限定栅极线16的图案化的导体层还可以限定其他元件，诸如与栅极线16平行地延伸的并且与像素电极22一起形成像素电容器的COM线(未示出)。
限定源电极和漏电极8、10、源极寻址线和延伸的漏极导体的图案化的导体层经由平坦化层6形成在塑料基板2上。平坦化层6使塑料基板2的上表面平坦化(即，平坦化层6是提供表面粗糙度比塑料基板的上塑料表面的表面粗糙度低很多的上表面的第一层)，并且在即使塑料基板2的上塑料表面存在表面划痕、表面粗糙和其他表面缺陷的情况下，确保表面质量良好以用于沉积源极寻址线等。在沉积基板平坦化层之后上表面的表面粗糙度RA通常小于2nm，并且优选小于1nm。
根据本发明一个实施例的技术包括在塑料基板上沉积任何平坦化层以平坦化塑料基板2之前在塑料基板2上设置图案化的导体。直接设置在非平坦化的基板2上的图案化的导体层可以限定光遮挡线4的阵列。每个光遮挡线4都与相应的栅极线16平行地延伸，基本上以相应的栅极线为中心，并且宽度大于相应栅极线，使得每个栅极线16都完全在相应的光遮挡线4的覆盖区(footprint)内，还允许在底部导体层4与在制造工艺期间限定栅极线16的上部导体层之间能有一定程度的未对准。例如，光遮挡线4的宽度可以比栅极线的宽度大大约10微米或15微米。可通过在限定光遮挡线4的图案化导体层中限定对准标记(基准)并且使用这些对准标记作为图形化限定源电极/漏电极和栅极线16的上部导体层的参考，来实现光遮挡线4和源电极/漏电极8、10以及栅极线16之间的良好对准。其中，这些上部导体层的形成包括在图案化之前沉积不透光导体材料的覆盖层，而上覆对准标记的区域首先被临时遮蔽以避免不透光导体材料的覆盖层盖住对准标记。
设置光遮挡层4是特别用于依赖自背光部26通过TFT阵列到达由TFT阵列控制的光学介质24(诸如非反射型液晶介质)的光透射的显示器件。光遮挡层的图案化保护了半导体沟道不会受到自背光部发射的退化光的影响同时允许光自背光部26透射到光学介质24。
光遮挡线4可由任何比基板2和平坦化层6对入射的破坏性辐射(例如可见光、UV光)更加不透明的材料制成。合适的材料的一些示例是：金、铝、铜、高性能铜合金(HPC)(商业上可作为溅射靶材料)、先进银合金(AMO)(商业上可作为溅射靶材料)以及银。根据期望保护半导体沟道不受辐射影响的程度选择光遮挡线4的厚度。
用于形成光遮挡线4的技术的一个示例包括在塑料基板上沉积任何平坦化层之前，在塑料基板6上形成光遮挡材料的覆盖层(通过例如溅射或其他气相沉积技术)，并然后例如通过光刻和蚀刻图案化覆盖层。
由塑料基板表面处的缺陷导致的在光遮挡线中的任何可能的不连续对于光遮挡功能都不是致命的，这是因为TFT阵列中的任何TFT的光遮挡功能都不需要与在器件边缘处的端子的电连接。
图案化的光遮挡层不需要由在TFT阵列的相对边缘之间延伸的光遮挡线形成。图案化的光遮挡线可以例如由隔离的光遮挡材料的岛的阵列形成，每个岛都遮挡相应晶体管的半导体沟道。
光遮挡层也不需要由导体材料形成，这是因为跨TFT阵列的导电路径不需要用于遮挡半导体沟道免受破坏性的入射辐射影响的目的。然而，设置直接在非平坦化的塑料基板2上(即在塑料基板上沉积任何平坦化层之前)并且通过平坦化层6与上覆导体层绝缘的导体材料可以提供其他功能，不论其具有或不具有光遮挡功能。
例如，在塑料基板2和平坦化层6之间(即在沉积任何平坦化层之前在非平坦化的塑料基板上形成)的导体元件可以与层级和栅极线16相同的延伸的漏极导体和/或COM线一起形成电容器，因而促使电荷存储在像素电极22上。该功能也可通过在塑料基板2和平坦化层6之间(即在沉积任何平坦化层之前在非平坦化的塑料基板上形成)的未图案化导体层实现。
在塑料基板2和平坦化层6之间(即在沉积任何平坦化层之前在非平坦化的塑料基板上形成)的导体元件4也可在半导体沟道与栅极线16相对的一侧设置第二栅电极。这样的第二栅电极可用于调整TFT的阈值电压(即，源电极需要被偏置到该电压以在漏电极处实现使相关像素的光学介质的输出变化的电势)，或者通过顶栅极的操作减轻在半导体沟道中引发的应力的影响。例如，显示器件的操作通常包括使栅极线顺序地切换到导通状态，同时保持所有其他栅极线处于截止状态。保持栅极线处于截止状态可以包括，将电压施加至栅极线，并且在整个任何栅极线被保持在截止状态的时间段(帧时间)，连续施加截止电压可以引发栅极电介质内部的极化效应并导致可移动离子迁移到半导体沟道中并迁移到半导体沟道内。这样的可移动离子具有不期望的效应，诸如俘获电荷并引起TFT的阈值电压的变化，减弱由施加到栅电极的电压产生的电场，以及化学地改变半导体沟道和/或栅极电介质。在半导体沟道的相对侧上的第二栅电极可用于抵消和/或补偿一些上述的不期望的效应。第二栅电极可以被布置为导体列，每一列都与相应的一个栅极线16对准，并且为相应栅极线16(第二栅电极与之对准)的相同列的TFT设置第二栅电极。
在塑料基板2和平坦化层6之间(即在沉积任何平坦化层之前在非平坦化的塑料基板上形成)的可寻址导体元件的列或行也可以在用于显示器件的触摸传感器机制中设置下导体层。
所有这些其他功能都需要电连接至TFT阵列边缘处的端子以施加电压。通过参考图2，用于更好地避免端子与位于塑料基板2和平坦化层6之间(即在沉积任何平坦化层之前在非平坦化的塑料基板上形成)的任何导体元件之间的电不连续的一项技术包括在塑料基板2上形成导体层4作为导体岛36的阵列，每一个导体岛34都由图案化的导体层4内的链路(links)36连接至所有相邻的导体岛(在x和y两个方向上)。该项技术例如特别用于：(i)形成导体元件以与层级和栅极线16相同的延伸的漏极导体和/或COM线一起形成电容器；和(ii)形成背栅电极，其功能可同时对该阵列中的所有TFT实现。
另一项技术包括将图案化的导体层形成为在图案化的导体层内彼此隔离的导体岛32的阵列，和通过平坦化层6在每一个导体岛和在平坦化层上形成的平行导体线(与源极寻址线平行)的阵列中一个之间设置层间导体连接，每一个导体线都连接至相应行的岛并且连接至TFT阵列的边缘处的相应端子。该技术例如特别用于：(i)形成导体元件以与层级和栅极线相同的延伸的漏极导体和/或COM线一起形成电容器；和(ii)形成用于触摸传感器机制的导体的行或列。
另一项技术包括在塑料基板2和平坦化层6之间将导体层形成为互相连接的导电丝的非交织网格，诸如金属纳米线(例如银纳米线)的非交织网格。由这样的非交织网格制成的导体线的阵列在任何导体线中都不易出现电不连续，因为非交织网格比溅射金属层更柔软，而完成的器件的挠性更加不会导致任何线中的电不连续，即使形成网格的一些丝发生断裂。使用网格的该项技术例如特别用于：(i)形成导体线以与层级和栅极线相同的延伸的漏极导体和/或COM线一起形成电容器；(ii)形成背栅极线，其功能需要同时对TFT的不同列施加不同的电压；和(iii)形成用于触摸传感器机制的导体线。
除了上文明确提及的任何变型之外，对本领域技术人员而言清晰的是，在本发明的范围内可对所述实施例进行各种其他变型。

Claims (20)

1.一种器件，包括非平坦化的塑料基板；在所述非平坦化的基板上形成的电学和/或光学功能层；在所述功能层上方形成的平坦化层；在所述平坦化层上方形成的至少第一导体层和半导体层，其中所述第一导体层限定用于一个或多个晶体管器件的至少源电极电路和漏电极电路，而半导体层限定用于所述一个或多个晶体管器件的半导体沟道。
2.如权利要求1所述的器件，其中对于使所述半导体沟道退化的波长的光，所述功能层显示出比所述基板和所述平坦化层小的透射率。
3.如权利要求2所述的器件，其中使所述半导体沟道退化的波长的所述光包括可见光；所述器件还包括在所述基板的与所述功能层相对的另一侧的背光部，用于将可见光透射至位于所述半导体沟道的与背光部相对的一侧且由所述晶体管器件控制的光学介质；以及所述功能层被图案化以使可见光能从背板透射至除了所述半导体沟道之外的区域中的所述光学介质。
4.如权利要求3所述的器件，其中所述光学介质是液晶光学介质。
5.如权利要求1所述的器件，其中所述功能层包括第二导体层，所述第二导体层在用于所述一个或多个晶体管中每一个的漏电极电路的至少一部分的下面延伸，并且经由平坦化层电容耦接至漏电极电路。
6.如权利要求5所述的器件，其中所述第二导体层包括导体岛的阵列，每一个导体岛都在所述第二导体层内连接至所有相邻的导体岛。
7.如权利要求6所述的器件，其中每个导体岛在位置上基本与用于相应晶体管的漏电极电路的至少一部分对应。
8.如权利要求5所述的器件，其中所述第二导体层由互相连接的导电丝的网格形成。
9.如权利要求1所述的器件，其中额外层包括为每个晶体管器件设置栅极的第二导体层。
10.如权利要求9所述的器件，其中所述第二导体层被图案化为独立可寻址栅极线的阵列，每个栅极线都在相应列的晶体管的半导体沟道下方延伸并且包括导电丝的网格。
11.如权利要求9所述的器件，其中所述第二导体层被图案化为岛的阵列，在所述第二导体层内每个岛都与其他岛隔离，并且每个岛能够经由在所述平坦化层上方延伸的多个寻址线中的一个来寻址。
12.如权利要求9至11中的任何一项所述的器件，还包括在所述第一导体层的与所述第二导体层相对的一侧形成的平坦化层上方的第三导体层，该第三导体层为晶体管器件的所述阵列限定栅电极电路。
13.一种操作如权利要求12所述的器件的方法，包括：控制施加至由所述第二导体层限定的所述栅电极的电压，以减轻由所述栅电极电路的操作在所述半导体沟道中引发的应力。
14.如权利要求12所述的操作器件的方法，包括：使用由所述第二导体层限定的所述栅电极调整所述晶体管器件的阈值电压，并使用所述栅电极电路以开关所述晶体管器件。
15.如权利要求1所述的器件，其中所述额外层包括在所述基板和所述平坦化层之间的第二导体层；所述一个或多个晶体管器件组成用于显示器件的控制电路；以及所述第二导体层形成用于所述显示器件的触摸传感器机制的底部导体。
16.如权利要求15所述的器件，其中所述功能层包括由互相连接的导电丝的网格形成的图案化的第二导体层。
17.如前述权利要求中的任何一项所述的器件，其中所述非平坦化的基板具有大于5nm的表面粗糙度RA。
18.一种方法，包括：提供非平坦化的基板；在所述非平坦化的基板上形成电学和/或光学功能层；在所述功能层上方形成平坦化层；以及在所述平坦化层上方形成第一导体层和半导体层，其中所述第一导体层限定用于一个或多个晶体管器件的至少源电极电路和漏电极电路，而所述半导体层限定用于所述一个或多个晶体管器件的半导体沟道。
19.如权利要求18所述的方法，其中所述非平坦化的基板具有大于5nm的表面粗糙度RA。
20.如权利要求18所述的方法，其中所述功能层是图案化的层。
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US20190088790A1 (en) 2019-03-21
GB2532637A (en) 2016-05-25
RU2016109332A (ru) 2017-09-28
GB201602353D0 (en) 2016-03-23
US20160211383A1 (en) 2016-07-21
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WO2015025006A1 (en) 2015-02-26
GB2517489A (en) 2015-02-25

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