CN105758891B - A kind of method for testing performance of PCB - Google Patents
A kind of method for testing performance of PCB Download PDFInfo
- Publication number
- CN105758891B CN105758891B CN201510424811.9A CN201510424811A CN105758891B CN 105758891 B CN105758891 B CN 105758891B CN 201510424811 A CN201510424811 A CN 201510424811A CN 105758891 B CN105758891 B CN 105758891B
- Authority
- CN
- China
- Prior art keywords
- blind hole
- detected
- pcb
- resistance
- blind
- Prior art date
Links
- 238000000034 methods Methods 0.000 claims abstract description 24
- 238000005476 soldering Methods 0.000 claims abstract description 24
- 238000003466 welding Methods 0.000 claims description 42
- 239000006071 creams Substances 0.000 claims description 4
- 239000011135 tin Substances 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N tin hydride Chemical compound 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[Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
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- 230000017525 heat dissipation Effects 0.000 description 1
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Abstract
Description
Technical field
The present invention relates to printed circuit board and its processing detection technique fields, are related to the method for testing performance of PCB a kind of, especially It is related to a kind of PCB metalized blind vias reliability checking method.
Background technique
With the demand of electronics techniques development and multifunction, multi-layer PCB comes into being, and main function has: mentioning High product overall performance, larger production packing density reduce small product size and weight, increase heat dissipation area, reinforce surface element device The safety of part and meets the needs of communication product high speed high information quantity.
Multi-layer PCB is generally just needing to carry out hole metallization after drilling is completed, plated through-hole quality and multi-layer board quality and Reliability is closely bound up, and plated through-hole plays a part of multilayer printed-wiring electric interconnection.The metal part of plated through-hole plays The effect of electrical connection, due to the influence of processing technology in its metallization processes, metallization quality can not be completely same, therefore The electrical connection performance of some plated through-holes can be poor, in addition often will cause gold during welding to plated through-hole The damage in categoryization hole, also result in plated through-hole electrical connection performance it is bad, influence the quality of PCB product, therefore producing It needs to detect the quality of plated through-hole in the process.
At present the detection mode of monitoring PCB manual welding blind hole reliability be by after related reliability test condition, into Row plain grinding sections observation blind via bottom cracks, this method have following shortcoming:
1) due to copper ductility, it is difficult to see after plain grinding slice for the blind hole micro-crack with security risk Measure micro-crack presence；
2) time-consuming for plain grinding blind hole slice, and requires grinding microtomy high.
Summary of the invention
It is an object of the invention to: the method for testing performance of PCB a kind of is provided, for detecting metalized blind vias manual welding The quality of blind hole afterwards.
To achieve this purpose, the present invention adopts the following technical scheme:
The method for testing performance of PCB a kind of is provided, the change in resistance situation of blind hole to be detected is carried out under soldering conditions Detection, judges the reliability of blind hole to be detected according to testing result.
A kind of optimal technical scheme of method for testing performance as PCB, the blind hole to be detected are to be arranged in PCB whole plate The test sample at edge, the test sample are identical as product unit structure in PCB whole plate.
A kind of optimal technical scheme of method for testing performance as PCB, comprising the following steps:
Step S1, blind hole welding condition is provided, soldering is carried out to the blind hole to be detected；
Step S2, the change in resistance situation of the blind hole to be detected is detected during the soldering；
Step S3, by the testing result of the change in resistance situation, the reliability of the blind hole to be detected is sentenced It is disconnected.
A kind of optimal technical scheme of method for testing performance as PCB provides blind hole welding condition described in step S1 Are as follows: the welding condition for simulating actual product carries out manual welding operation to blind hole to be detected.
A kind of optimal technical scheme of method for testing performance as PCB, the step S1 include:
Step S11, the conducting wire of connecting test instrument is used in the blind hole both ends welding to be detected；
Step S12, soldering is carried out to blind hole to be detected using lead-free tin cream and manual welding instrument.
A kind of optimal technical scheme of method for testing performance as PCB, the step S2 include:
Step S21, change in resistance situation detects, and is carried out using change in resistance detection device to blind hole change in resistance to be detected Detection；
Step S22, testing result exports, and passes through output equipment output test result.
A kind of optimal technical scheme of method for testing performance as PCB passes through the change in resistance feelings described in step S3 The testing result of condition judges the reliability of the blind hole to be detected are as follows:
If in welding process, blind hole resistance value to be detected maintains certain numerical value after increasing, then blind hole good reliability；
If in welding process, blind hole resistance value to be detected is increased considerably, stops welding and restore to room temperature state, phase For resistance varying-ratio < 10% in welding process, then blind via bottom has micro-crack generation；
If in welding process, blind hole resistance value to be detected becomes infinitely great, then blind via bottom cracks, blind hole poor reliability.
A kind of optimal technical scheme of method for testing performance as PCB, the blind hole to be detected are single blind hole.
A kind of optimal technical scheme of method for testing performance as PCB, the blind hole to be detected be two or two with Upper blind hole is connected the blind hole chain to be formed by conducting wire.
A kind of optimal technical scheme of method for testing performance as PCB carries out the blind hole to be detected in step S1 Soldering repeats several times, monitors change in resistance during each soldering, soldering is completed and is down to room temperature The resistance value of the blind hole to be detected is detected afterwards.
The invention has the benefit that the security risk of PCB blind hole can be identified effectively, the quality of PCB product is improved； It is easy to operate, monitor high reliablity；Blind hole reliability can be detected in the case where not destroying product, be reduced to product Consumption, detection process carries out on test sample, avoids impacting actual product.It is blind that a metallization can individually be detected Hole can also detect the blind hole chain being made of several metalized blind vias simultaneously, detection strong flexibility, high-efficient, be become by resistance Change percentage and carry out the judgement of blind hole reliability, is not influenced by metalized blind vias material and structure, it is versatile.
Detailed description of the invention
The present invention will be further described in detail below based on the drawings and embodiments.
Fig. 1 is the method for testing performance flow chart of PCB described in embodiment.
Fig. 2 is blind via bottom flawless structural schematic diagram to be detected described in embodiment.
Fig. 3 has micro-cracked structure schematic diagram for blind via bottom to be detected described in embodiment.
Fig. 4 is blind via bottom instant of complete cracking structural schematic diagram to be detected described in embodiment.
In figure:
100, blind hole to be detected.
Specific embodiment
To further illustrate the technical scheme of the present invention below with reference to the accompanying drawings and specific embodiments.
As shown in figures 1-4, in this present embodiment, the method for testing performance of a kind of PCB of the present invention, is specifically used for The reliability of PCB metalized blind vias of the detection with metalized blind vias.The resistance value of blind hole 100 to be detected is become under soldering conditions Change situation to be detected, judges 100 reliability of blind hole to be detected according to testing result.
Specifically, the method for testing performance of PCB described in the present embodiment, comprising the following steps:
Step S1, blind hole welding condition is provided, soldering is carried out to the blind hole 100 to be detected；
Step S2, the change in resistance situation of the blind hole 100 to be detected is detected during the soldering；
Step S3, by the testing result of the change in resistance situation, 100 reliability of blind hole to be detected is sentenced It is disconnected.
In the method for testing performance of PCB described in the present embodiment, the offer blind hole welding condition are as follows: simulation is practical to be produced The welding condition of product carries out manual welding operation to blind hole 100 to be detected.To be detected blind under the welding condition of actual product Hole 100 is detected, and the result obtained most can accurately react the quality of product in PCB whole plate.
In one embodiment of the invention, in order to more accurately implement technical solution of the present invention, to above-mentioned steps S1 Specific refinement is carried out, so that step S1 includes:
Step S11, the conducting wire of connecting test instrument is used in 100 both ends of the blind hole welding to be detected；
Step S12, soldering is carried out to blind hole to be detected using lead-free tin cream and manual welding instrument.
In another embodiment of the method for testing performance of PCB of the present invention, the step S2 includes:
Step S21, change in resistance situation detects, using change in resistance detection device to 100 change in resistance of blind hole to be detected It is detected；
Step S22, testing result exports, and passes through output equipment output test result.
Further include after step s 11 step S111, by the conducting wire in step S11 at described 100 liang of blind hole to be detected End connection low resistance tester；Using low resistance tester as the change in resistance detection device, blind hole 100 to be detected is hindered Value variation is detected.
In this present embodiment, the low resistance tester uses Estimate of Resistance for DC Low Resistance tester.Due in PCB metalized blind vias Resistance value it is usually smaller, therefore the precision of test can effectively be improved using low resistance tester during the test, kept away Exempt from measuring accuracy problem to impact the reliability judgement of metalized blind vias.
It carries out soldering to the blind hole 100 to be detected in step S1 to repeat several times, each soldering Change in resistance is monitored in journey, soldering is completed and be cooled to room temperature to detect the resistance value of the blind hole 100 to be detected.
In another embodiment of the method for testing performance of PCB of the present invention, by described described in step S3 The testing result of change in resistance situation judges 100 reliability of blind hole to be detected are as follows:
If in welding process, 100 resistance value of blind hole to be detected maintains certain numerical value after increasing, then blind hole 100 to be detected can It is good by property；Its structure is as shown in Figure 2.
If in welding process, 100 resistance value of blind hole to be detected is increased considerably, stops welding and restore to room temperature state Under, relative to resistance varying-ratio < 10% in welding process, then micro-crack generation is arranged at 100 bottom of blind hole to be detected；Its structure is as schemed Shown in 3.
If in welding process, 100 resistance value of blind hole to be detected becomes infinitely great, and resistance value is not sent out during follow-up test Changing, then blind via bottom cracks, blind hole poor reliability；Its structure is as shown in Figure 4.
Technical solution of the present invention is explained below by specific test data:
As shown in table 1, test equipment employed in the present embodiment is TH2512B type intelligent DC low resistance tester, Reflow Soldering twice is carried out using lead-free tin cream first, carries out manual welding in 10 seconds under the conditions of 350 DEG C later, in the welding process Estimate of Resistance for DC Low Resistance tester monitors blind hole change in resistance, after completing primary test, is cooled to room temperature and reads again resistance value.According to resistance Value change rate judges blind hole reliability.
1 blind hole reliability test of table and monitoring method
As shown in table 2, the test case of six samples is described:
Its resistance value after carrying out Reflow Soldering twice of sample 1 is 63.7m Ω, carries out 10 manual weldings to it later, wherein For the first time and second of manual welding process is normal, and during third time to the tenth manual welding, ∞ occurs in blind hole resistance value, This situation shows that 1 blind via bottom of sample is thoroughly broken, poor reliability.
As shown in Table 2,3 testing result of sample is similar to sample 1, is similarly blind via bottom and is thoroughly broken, poor reliability.
Its resistance value after carrying out Reflow Soldering twice of sample 2 is 67.75m Ω, takes over its resistance of center carrying out ten manual weldings Value is normal, and after the tenth manual welding, resistance value is 67.8m Ω, and resistance varying-ratio 0.08%, this is the result shows that sample 2 Blind via bottom does not have crackle, blind hole good reliability.
As shown in Table 2, sample 5,6 testing results are similar to sample 2, and being similarly blind via bottom does not have crackle, and blind hole can It is good by property.
There is resistance value infinity in the detection process in sample 4, and late detection resistance varying-ratio is 7.19% < 10%, this The result shows that 4 bottom of sample has micro-crack, there is security risk.
The variation of 2 blind hole manual welding process low resistance of table
Conclusion:
1) sample of number 2,5,6, blind hole good reliability；Blind via bottom does not have crackle；
2) sample of number 4, blind via bottom have micro-crack, there is security risk；
3) sample of number 1,3, blind via bottom are thoroughly broken, and reliability is worst.
In an embodiment of the present invention, blind hole 100 to be detected is the test sample that PCB whole plate edge is arranged in, the survey Sample of having a try is identical as product unit structure in PCB whole plate.It is detected, is can be avoided to PCB whole plate by the way that test sample is arranged The destruction of middle product.
In this present embodiment, the blind hole 100 to be detected is single blind hole.It is described in other embodiments of the invention Blind hole 100 to be detected can also connect the blind hole chain to be formed for two or more blind holes.
It is to be understood that above-mentioned specific embodiment is only that presently preferred embodiments of the present invention and institute's application technology are former Reason, within the technical scope of the present disclosure, variation that anyone skilled in the art is readily apparent that or Replacement, should be covered by the scope of protection of the present invention.
Claims (7)
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| CN109031092B (en) * | 2018-07-16 | 2020-12-11 | 威太（苏州）智能科技有限公司 | PCB high current testing method |
| CN108981962B (en) * | 2018-08-30 | 2020-01-14 | 上海炜绫测试技术有限公司 | PCB hole chain temperature testing method and device |
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| DE3034175C2 (en) * | 1980-09-11 | 1987-12-23 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt, De | |
| US4477484A (en) * | 1982-12-10 | 1984-10-16 | International Business Machines Corporation | Electroless plating monitor |
| JP2000223840A (en) * | 1999-02-04 | 2000-08-11 | Sharp Corp | Manufacture of buildup multilayer wiring board |
| JP4224056B2 (en) * | 2005-12-22 | 2009-02-12 | 株式会社東芝 | Substrate inspection method, printed wiring board, and electronic circuit device |
| CN201788164U (en) * | 2010-08-25 | 2011-04-06 | 深圳中富电路有限公司 | PCB quality detecting device based on micro-resistance test |
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