CN105634488B - The system and method for operational amplifier power consumption in a kind of reduction assembly line - Google Patents
The system and method for operational amplifier power consumption in a kind of reduction assembly line Download PDFInfo
- Publication number
- CN105634488B CN105634488B CN201511021009.1A CN201511021009A CN105634488B CN 105634488 B CN105634488 B CN 105634488B CN 201511021009 A CN201511021009 A CN 201511021009A CN 105634488 B CN105634488 B CN 105634488B
- Authority
- CN
- China
- Prior art keywords
- tail pipe
- mbn
- power consumption
- dynamic
- current source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
Abstract
System and method the present invention relates to operational amplifier power consumption in a kind of reduction production line analog-digital converter includes: electric current source capsule M1 ... Mn；Two groups of switch units Kb1 ... .Kbn and K1 ... .Kn；Two clock signals CK1 and CK2, wherein CK1 is to keep phase clock, and CK2 is sampling phase clock；Generate the bias voltage supplying module VBIAS of bias voltage Vb1 ... .Vbn and bias voltage V1 ... .Vn；The main body circuit OPAbody of operational amplifier；Electric current source capsule M1 ... Mn, including constant-current source tail pipe Ma1 ... Man and dynamic source capsule Mb1 ... Mbn in parallel, the source of electric current source capsule M1 ... Mn directly connects power supply or ground connection；Present invention is generally applicable to any work in the production line analog-digital converter operational amplification circuit under certain frequency, have many advantages, such as that design is simple, power consumption reduction effect is obvious, versatile.Provide the system and method for reducing operational amplifier power consumption in assembly line that design is simple, reducing power consumption is obvious, versatile.
Description
Technical field
The present invention relates in the system and method more particularly to a kind of reduction assembly line that reduce power consumption in IC design
The system and method for operational amplifier power consumption.
Background technique
Analog-digital converter has extensively as the intermediate bridge circuit for linking up simulated world and digital world in communication field
Application.With becoming increasingly popular for portable device, it is desirable that while analog-digital converter has high-speed, high precision, can get lower
Power consumption.However to obtain higher speed and precision, the power consumption for usually sacrificing analog-digital converter is cost.High-speed, high precision mould
Number converter generallys use pipeline organization, and production line analog-digital converter includes low precision grade converting unit in multiple, is adopting
Under sample phase and the clock control for keeping phase two-phase not overlap, each height grade converting unit alternately analog-to-digital conversion.Operation amplifier
Device as in production line analog-digital converter core cell and main power consumption source, the power consumption for how reducing operational amplifier become
Reduce the key of total system power consumption.
Summary of the invention
Technical problem solved by the present invention is overcome the deficiencies of the prior art and provide design is simple, reducing power consumption is obvious,
The versatile system and method for reducing operational amplifier power consumption in assembly line.
The technical solution of the invention is as follows: a kind of to reduce operational amplifier power consumption in production line analog-digital converter and be
System, characterized by comprising: electric current source capsule M1...Mn；Two groups of switch units Kb1....Kbn and K1....Kn；Two clock letters
Number CK1 and CK2, wherein CK1 is to keep phase clock, and CK2 is sampling phase clock；Generate bias voltage Vb1....Vbn and biased electrical
Press the bias voltage supplying module VBIAS of V1....Vn；The main body circuit OPAbody of operational amplifier；Electric current source capsule
M1...Mn, including constant-current source tail pipe Ma1...Man and dynamic source capsule Mb1...Mbn in parallel, the source of electric current source capsule M1...Mn
End directly connects power supply or ground connection；
Bias voltage V1....Vn is directly accessed the grid end of constant-current source tail pipe Ma1...Man, forms fixed bias；Meanwhile
Bias voltage V1....Vn is kept mutually one end switch K1....Kn to be connected to the grid end of dynamic source tail pipe Mb1...Mbn, is formed
Fixed bias；The sampled one end phase switch Kb1....Kbn bias voltage Vb1...Vbn is connected to dynamic source tail pipe Mb1...Mbn
Grid end, formed dynamic bias；Switch unit Kb1....Kbn by sampling phase clock CK2 controlled, switch unit K1....Kn by
Keep clock CK1 control；The drain terminal of constant-current source tail pipe Ma1...Man and the drain terminal of dynamic source tail pipe Mb1...Mbn directly connect fortune
Calculate the main body circuit OPAbody of amplifier.
By bias voltage V1...VnThe drain terminal and dynamic source tail pipe for making constant-current source tail pipe Ma1...Man are set
The quiescent current maximum of Mb1...Mbn, i.e. tail pipe are in voltage when saturation region；Bias voltage Vb1...Vbn voltage and dynamic
The source voltage terminal difference of source capsule Mb1...Mbn differs 0~100mV with the threshold voltage of dynamic source capsule Mb1...Mbn, at this time dynamic
Source capsule Mb1...Mbn works in sub-threshold region, and inversion layer is weaker, and there are part leakage current, the electric leakages by dynamic source capsule Mb1...Mbn
Stream can help operational amplifier rapidly to establish output signal when entering and keeping phase, while reduce power dissipation overhead.
The clock signal CK1 and CK2 is the clock signal that two phases do not overlap.
A kind of method of operational amplifier power consumption in reduction production line analog-digital converter, its step are as follows:
(1) according to operational amplifier integrated circuit power consumption requirements, power consumption reduction ratio is determined；
(2) according to power consumption reduction ratio, the ratio and number of all controllable current source capsule M1...Mn are distributed, so that constant current
Parallel connection of the sum of the number of parallel of source tail pipe Ma1...Man and dynamic source tail pipe Mb1...Mbn equal to electric current source capsule M1...Mn
Number, wherein dynamic source tail pipe Mb1...Mbn is used to adjust electric current of the operational amplifier when sampling phase CK2 work；
(3) keep the main part OPAbody of operational amplifier motionless；
(4) according to the practical wide long of dynamic source tail pipe Mb1...Mbn, design bias voltage supplying module VBIAS, make its
Keep phase clock CK1 export bias voltage V1......Vn, the bias voltage make constant-current source tail pipe Ma1...Man drain terminal and
The quiescent current of dynamic source tail pipe Mb1...Mbn is maximum, i.e., tail pipe is in saturation region；In sampling phase clock CK2 output biasing
Voltage Vb1...Vbn: the source voltage terminal difference and dynamic source of bias voltage Vb1...Vbn voltage and dynamic source capsule Mb1...Mbn
The threshold voltage of pipe Mb1...Mbn differs 0~100mV, and dynamic source capsule Mb1...Mbn work at this time is in sub-threshold region, inversion layer
Weaker, for dynamic source capsule Mb1...Mbn there are part leakage current, which can help operational amplifier fast when entering holding phase
Output signal is established fastly, while reducing power dissipation overhead.
(5) voltage V1....Vn is directly accessed the grid end of constant-current source tail pipe Ma1...Man, forms fixed bias；Simultaneously partially
Grid end of the voltage V1....Vn through keeping mutually one end switch K1....Kn to be connected to dynamic source tail pipe Mb1...Mbn is set, is formed solid
Fixed biasing；The sampled one end phase switch Kb1....Kbn bias voltage Vb1...Vbn is connected to dynamic source tail pipe Mb1...Mbn's
Grid end forms dynamic bias；Switch unit Kb1....Kbn is controlled by sampling phase clock CK2, and switch unit K1....Kn is protected
Hold clock CK1 control；The drain terminal of constant-current source tail pipe Ma1...Man and the drain terminal of dynamic source tail pipe Mb1...Mbn directly connect operation
The main body circuit OPAbody of amplifier.
(6) average power consumption for keeping mutually and sampling phase is calculated；Assuming that single current pipe saturated mode electric current is I0, a clock
Cycle T is by holding phase cycle T1With sampling phase cycle T2Composition.Constant current source capsule Ma1...Man and dynamic source tail pipe when holding phase
Mb1...Mbn is completely in saturation state, then single constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 is when keeping phase cycle
The sum of operating current is M1*I0, phase operational amplifier is sampled at this time and is not involved in charge transfer, at this time Ma1The saturation current that pipe generates
For Ma1*I0, Mb1Pipe works in weak inversion regime, and electric current is about a single tube electric current I0, I0Much smaller than Mb1It manages in a saturated state
When electric current Mb1*I0, the sum of the operating current of constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 when sampling phase cycle M at this timea1*
I0+I0.Individually the sum of the average power consumption of constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 is
M1It is the width of this electric current source capsule M1, is constant-current source tail pipe Ma1 and dynamic source tail pipe
The sum of Mb1 width；VDDFor supply voltage；
If the number of parallel of n electric current source capsule M1...Mn is consistent, then total power consumption:
The average power consumption of integrated circuit greatly reduces.
(7) average power consumption of simulating, verifying integrated circuit, adjusted repeatedly according to simulation result constant current source capsule Ma1...Man and
The ratio number of dynamic source tail pipe Mb1...Mbn, to meet power consumption requirements.
The advantages of the present invention over the prior art are that:
(1) operation of the present invention is simple.Existing drop low power consumption method is complicated for operation, it usually needs saves pipelined front side
Power consumption can be just effectively reduced to save its internal arithmetic amplifier in sampling hold circuit.Therefore it needs to introduce increasingly complex
Digital calibration techniques, which just can overcome the disadvantages that, lacks loss of significance caused by operational amplifier.The present invention is in electric current source capsule Mb1...Mbn
Grid end introduce bias voltage supplying module VBIAS and clock switch portion be effectively reduced in the sampling phase cycle of operational amplifier
Divide tail current source tube current, to reduce the average power consumption of entire clock cycle, design is simple.
(2) present invention design is comprehensive.Existing drop low power consumption method design is single, usually in sampling mutually by operational amplifier
Electric current source capsule M1...Mn directly turn off, in operational amplifier idle half period, so that electric current source capsule M1...Mn electric current
It minimizes；But the charging rate for also resulting in the lower half duty cycle slows down, and slew rate slows down, and settling time even more than requires
Half period, signal settling time extend, be unable to satisfy the clock request of high frequency.The present invention provides fixed bias voltage
Vb1...Vbn is, it can be achieved that operational amplifier partial dynamic source tail pipe Mb1...Mbn is rapidly entered in idle sampling period
Sub-threshold region while reducing power consumption, retains part leakage current, helps operational amplifier that phase cycle is being kept to quickly recover to just
Normal working condition reduces influence of the electric current reduction to settling time.
(3) flexibility of the present invention is high.The inflexible disadvantage of power consumption is reduced compared with the prior art, and the present invention can be according to entirety
Circuit power consumption requirement primarily determines operational amplifier power consumption reduction ratio, then determines constant-current source tail pipe Ma1...Man and dynamic source
The proportionate relationship of tail pipe Mb1...Mbn, targetedly reduces power consumption, more flexible in design.
(4) present invention is versatile.To high performance operational amplifier of any work under the not overlapping clock phase of two-phase
Method of the invention can be used in system.Tail current source capsule power consumption is reduced in the sampling phase clock period, to reduce the flat of circuit
Equal power consumption has stronger versatility.Especially for the fortune in the A/D converter with high speed and high precision system in engineer application
Calculating amplifier has more practical significance.
Detailed description of the invention
Fig. 1 is more electric current source capsule operational amplifier system construction drawings of the more satisfactory embodiment of the present invention；
Fig. 2 is that the method for reduce power consumption to the multiple nodes of operational amplifier of the more satisfactory embodiment of the present invention is implemented
Circuit system figure；
Fig. 3 is that the two-phase of the more satisfactory embodiment of the present invention does not overlap clock timing diagram.
Specific embodiment
The present invention is explained in the following with reference to the drawings and specific embodiments.
As shown in Figure 1, for more electric current source capsule operational amplifier system construction drawings of the more satisfactory embodiment of the present invention.The fortune
Calculate amplifier system include multiple electric current source capsule M1, M2 ... ..Mn, generate bias voltage V1....Vn bias voltage supply
The source of the main body circuit OPAbody of unit VBIAS0 and operational amplifier, electric current source capsule M1...Mn directly connect power ground；Partially
The grid end that voltage V1....Vn is directly accessed the source of electric current source capsule M1...Mn is set, fixed bias is formed, which makes
The electric current operating point source capsule M1...Mn is in saturation region, and electric current is maximum at this time；The drain terminal of electric current source capsule M1...Mn directly connects operation and puts
The main body circuit OPAbody of big device.
Assuming that single current pipe saturated mode electric current is I0, a clock cycle is T.By taking electric current source capsule M1 as an example, at one
The average operating current of operation amplifier circuit is I in the clock period1=M1*I0, the electric current of electric current source capsule M2...Mn is respectively
I2...In.Assuming that the number of parallel of n electric current source capsule M1...Mn is consistent, then operational amplifier is averaged total power consumption are as follows:
Usual n and number of parallel M is larger, and total power consumption is also corresponding larger.The power consumption for reducing operation amplifier circuit, can reduce
The size of current that electric current source capsule generates in clock cycle T.
The system for being illustrated in figure 2 operational amplifier power consumption in a kind of reduction production line analog-digital converter of the invention, packet
It includes: electric current source capsule M1...Mn；Two groups of switch units Kb1....Kbn and K1....Kn；Two clock signals CK1 and CK2, wherein
CK1 is to keep phase clock, and CK2 samples phase clock；Generate the bias voltage supply of bias voltage Vb1....Vbn and V1....Vn
Module VBIAS；The main body circuit OPAbody of operational amplifier；Electric current source capsule M1...Mn, including constant-current source tail pipe in parallel
Ma1...Man and dynamic source capsule Mb1...Mbn, the source of electric current source capsule M1...Mn directly connect power ground；
Bias voltage V1....Vn is directly accessed the grid end of constant-current source tail pipe Ma1...Man, forms fixed bias；Meanwhile
Bias voltage V1....Vn is kept mutually one end switch K1....Kn to be connected to the grid end of dynamic source tail pipe Mb1...Mbn, is formed
Fixed bias；The sampled one end phase switch Kb1....Kbn bias voltage Vb1...Vbn is connected to dynamic source tail pipe Mb1...Mbn
Grid end, formed dynamic bias；Switch unit Kb1....Kbn by sampling phase clock CK2 controlled, switch unit K1....Kn by
Keep clock CK1 control；The drain terminal of constant-current source tail pipe Ma1...Man and the drain terminal of dynamic source tail pipe Mb1...Mbn directly connect fortune
Calculate the main body circuit OPAbody of amplifier.
By bias voltage V1...VnThe drain terminal and dynamic source tail pipe for making constant-current source tail pipe Ma1...Man are set
Saturation region when the quiescent current maximum of Mb1...Mbn；The source voltage terminal and bias voltage of dynamic source capsule Mb1...Mbn
Vb1...Vbn difference in voltage differs 0~100mV with threshold voltage, and the quiescent point of dynamic source capsule Mb1...Mbn is Asia at this time
Threshold zone, inversion layer is weaker, and there are part leakage currents for tail current source capsule, and quick foundation when for keeping mutually working has simultaneously
Effect reduces larger power dissipation overhead caused by the high current generated as saturation state.
As described in Figure 3, clock signal CK1 and CK2 is the clock signal that two phases do not overlap, and the clock cycle is T,
Middle holding phase cycle is T1, sampling phase cycle is T2, T1=T2=1/2*T；
Assuming that system requirements integral operation amplifying circuit power consumption1/4 is reduced, that is, is reduced to total power consumption3/4, in conjunction with
A kind of method reducing operational amplifier power consumption in production line analog-digital converter in the present invention, steps are as follows:
(1) according to operational amplifier integrated circuit power consumption requirements, power consumption reduction ratio is determined；
(2) according to power consumption reduction ratio, the ratio and number of all controllable current source capsule M1...Mn are distributed, so that constant current
Parallel connection of the sum of the number of parallel of source tail pipe Ma1...Man and dynamic source tail pipe Mb1...Mbn equal to electric current source capsule M1...Mn
Number, wherein dynamic source tail pipe is used to reduce electric current of the operational amplifier when sampling phase CK2 work, according to the reduction of step (1)
Ratio, design is so that Ma1+Mb1=M1, Ma1:Mb1=1/7, similarly Ma2+Mb2=M2, Ma2:Mb2=1/7 ..., Ma3+
Mb3=M3, Man:Mbn=1/7；
(3) keep the main part OPAbody of operational amplifier motionless；
(4) according to the practical breadth length ratio of dynamic source tail pipe Mb1...Mbn, bias voltage supplying module VBIAS is designed, it is made
Phase clock CK1 is being kept to export bias voltage V1......Vn, which makes the quiescent point of tail pipe be saturation region,
Electric current is maximum at this time；Bias voltage Vb1...Vbn is exported in sampling phase clock CK2: when design, the grid end bias voltage
The difference of Vb1...Vbn and source voltage terminal differs 0~100mV with threshold voltage, at this time the static work of dynamic source tail pipe Mb1...Mbn
Making point just is sub-threshold region, and inversion layer is weaker, and there are still part leakage currents in tail current source capsule, when for keeping mutually working
It quickly establishes, effectively reduces larger power dissipation overhead caused by the high current generated as saturation state；
(5) bias voltage V1....Vn is directly accessed the grid end of constant-current source tail pipe Ma1...Man, forms fixed bias；Together
When, bias voltage V1....Vn is through keeping mutually one end switch K1....Kn to be connected to the grid end of dynamic source tail pipe Mb1...Mbn, shape
At fixed bias；The sampled one end phase switch Kb1....Kbn bias voltage Vb1...Vbn is connected to dynamic source tail pipe
The grid end of Mb1...Mbn forms dynamic bias；Switch unit Kb1....Kbn is controlled by sampling phase clock CK2, switch unit
K1....Kn is controlled by clock CK1 is kept；The leakage of the drain terminal and dynamic source tail pipe Mb1...Mbn of constant-current source tail pipe Ma1...Man
End directly meets the main body circuit OPAbody of operational amplifier；
(6) average power consumption for keeping mutually and sampling phase is calculated；Constant current source capsule Ma1...Man and dynamic source tail pipe when holding phase
Mb1...Mbn is completely in saturation state, then single constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 is when keeping phase cycle
The sum of operating current is I1=M1*I0, phase operational amplifier is sampled at this time and is not involved in charge transfer, at this time Ma1The saturation that pipe generates
Electric current is Ma1*I0, Mb1Pipe works in weak inversion regime, and electric current is about a single tube electric current I0, I0Much smaller than Mb1Pipe is in saturation
Electric current M when stateb1*I0, at this time operating current of the constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 when sampling phase cycle it
And I2=Ma1*I0+I0.Individually the average current of constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 isConstant current source capsule Ma2...Man and dynamic source tail pipe Mb2...Mbn
Average current be respectively to assume that the number of parallel of n electric current source capsule M1...Mn is consistent, then total power consumption:
From the foregoing, it will be observed that the average power consumption of integrated circuit greatly reduces, meet the requirement of system power dissipation reduction 1/4.
(7) average power consumption of simulating, verifying integrated circuit adjusts ratio number according to simulation result repeatedly, to meet power consumption
It is required that.
Non-elaborated part of the present invention belongs to techniques well known, and above embodiment is only used to illustrate this hair
It is bright, rather than limiting the invention, as long as appropriate change to the above embodiments all belongs in spiritual claimed range of the invention
Within the scope of protection of present invention.
Claims (3)
1. a kind of system for reducing operational amplifier power consumption in production line analog-digital converter, characterized by comprising: electric current source capsule
M1…Mn；Two groups of switch units Kb1 ... .Kbn and K1 ... .Kn；Two clock signals CK1 and CK2, wherein CK1 is when keeping phase
Clock, CK2 are sampling phase clock；Generate the bias voltage supplying module of bias voltage Vb1 ... .Vbn and bias voltage V1 ... .Vn
VBIAS；The main body circuit OPAbody of operational amplifier；Electric current source capsule M1 ... Mn, including constant-current source tail pipe Ma1 ... Man in parallel
Power supply or ground connection are directly connect with the source of dynamic source capsule Mb1 ... Mbn, electric current source capsule M1 ... Mn；
Bias voltage V1 ... .Vn is directly accessed the grid end of constant-current source tail pipe Ma1 ... Man, forms fixed bias；Meanwhile biased electrical
Pressure V1 ... .Vn is kept mutually one end switch K1 ... .Kn to be connected to the grid end of dynamic source tail pipe Mb1 ... Mbn, forms fixed bias；
The sampled one end phase switch Kb1 ... .Kbn bias voltage Vb1 ... Vbn is connected to the grid end of dynamic source tail pipe Mb1 ... Mbn, is formed
Dynamic bias；Switch unit Kb1 ... .Kbn is controlled by sampling phase clock CK2, and switch unit K1 ... .Kn is controlled by clock CK1 is kept
System；The drain terminal of constant-current source tail pipe Ma1 ... Man and the drain terminal of dynamic source tail pipe Mb1 ... Mbn directly connect the main body electricity of operational amplifier
Road OPAbody；
Bias voltage V1 ... Vn is arranged in the drain terminal and dynamic source tail pipe Mb1 ... Mbn for making constant-current source tail pipe Ma1 ... Man
Quiescent current maximum, i.e. tail pipe are in voltage when saturation region；Bias voltage Vb1 ... Vbn voltage and dynamic source capsule Mb1 ... Mbn
Source voltage terminal difference differ 0~100mV with the threshold voltage of dynamic source capsule Mb1 ... Mbn, dynamic source capsule Mb1 ... Mbn work at this time
Make in sub-threshold region, inversion layer is weaker, and there are part leakage current, the leakage currents can help operation amplifier by dynamic source capsule Mb1 ... Mbn
Device rapidly establishes output signal when entering and keeping phase, while reducing power dissipation overhead.
2. a kind of system for reducing operational amplifier power consumption in production line analog-digital converter according to claim 1, special
Sign is: the clock signal CK1 and CK2 is the clock signal that two phases do not overlap.
3. a kind of method for reducing operational amplifier power consumption in production line analog-digital converter, its step are as follows:
(1) according to operational amplifier integrated circuit power consumption requirements, power consumption reduction ratio is determined；
(2) according to power consumption reduction ratio, the ratio and number of all controllable current source capsule M1 ... Mn are distributed, so that constant-current source tail pipe
The sum of number of parallel of Ma1 ... Man and dynamic source tail pipe Mb1 ... Mbn is equal to the number of parallel of electric current source capsule M1 ... Mn, wherein moving
State source tail pipe Mb1 ... Mbn is used to adjust electric current of the operational amplifier when sampling phase CK2 work；
(3) keep the main part OPAbody of operational amplifier motionless；
(4) according to the practical wide long of dynamic source tail pipe Mb1 ... Mbn, bias voltage supplying module VBIAS is designed, it is being kept
Phase clock CK1 exports bias voltage V1 ... Vn, which makes the drain terminal and dynamic source of constant-current source tail pipe Ma1 ... Man
The quiescent current of tail pipe Mb1 ... Mbn is maximum, i.e., tail pipe is in saturation region；Bias voltage is exported in sampling phase clock CK2
Vb1 ... Vbn: the source voltage terminal difference and dynamic source capsule Mb1 ... of bias voltage Vb1 ... Vbn voltage and dynamic source capsule Mb1 ... Mbn
The threshold voltage of Mbn differs 0~100mV, and in sub-threshold region, inversion layer is weaker for dynamic source capsule Mb1 ... Mbn work at this time, dynamic
For source capsule Mb1 ... Mbn there are part leakage current, it is defeated which can help operational amplifier rapidly to establish when entering and keeping phase
Signal out, while reducing power dissipation overhead；
(5) voltage V1 ... .Vn is directly accessed the grid end of constant-current source tail pipe Ma1 ... Man, forms fixed bias；Meanwhile bias voltage
V1 ... .Vn is kept mutually one end switch K1 ... .Kn to be connected to the grid end of dynamic source tail pipe Mb1 ... Mbn, forms fixed bias；Partially
The grid end that the sampled one end phase switch Kb1 ... .Kbn voltage Vb1 ... Vbn is connected to dynamic source tail pipe Mb1 ... Mbn is set, is formed dynamic
State biasing；Switch unit Kb1 ... .Kbn is controlled by sampling phase clock CK2, and switch unit K1 ... .Kn is controlled by clock CK1 is kept；
The drain terminal of constant-current source tail pipe a1 ... Man and the drain terminal of dynamic source tail pipe Mb1 ... Mbn directly connect the main body circuit of operational amplifier
OPAbody；
(6) average power consumption for keeping mutually and sampling phase is calculated；Assuming that single current pipe saturated mode electric current is I0, a clock cycle T
By holding phase cycle T1With sampling phase cycle T2Composition, keep phase when constant current source capsule Ma1 ... Man and dynamic source tail pipe Mb1 ... Mbn
Be completely in saturation state, then operating current of the single constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 when keeping phase cycle it
With for M1*I0, phase operational amplifier is sampled at this time and is not involved in charge transfer, and the saturation current that Ma1 pipe generates at this time is Ma1*I0,
Mb1 pipe works in weak inversion regime, and electric current is about a single tube electric current I0, I0Electric current when managing in a saturated state much smaller than Mb1
Mb1*I0, the sum of the operating current of constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 when sampling phase cycle M at this timea1*I0+I0, single
The sum of the average power consumption of a constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 is,
M1It is the width of this electric current source capsule M1, is the sum of constant-current source tail pipe Ma1 and dynamic source tail pipe Mb1 width；VDDFor power supply electricity
Pressure；
Assuming that the number of parallel of n electric current source capsule M1 ... Mn is consistent, then total power consumption:
The average power consumption of integrated circuit greatly reduces；
(7) average power consumption of simulating, verifying integrated circuit adjusts constant current source capsule Ma1 ... Man and dynamic according to simulation result repeatedly
The ratio number of source tail pipe Mb1 ... Mbn, to meet power consumption requirements.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511021009.1A CN105634488B (en) | 2015-12-30 | 2015-12-30 | The system and method for operational amplifier power consumption in a kind of reduction assembly line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511021009.1A CN105634488B (en) | 2015-12-30 | 2015-12-30 | The system and method for operational amplifier power consumption in a kind of reduction assembly line |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105634488A CN105634488A (en) | 2016-06-01 |
| CN105634488B true CN105634488B (en) | 2019-03-01 |
Family
ID=56049100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511021009.1A Active CN105634488B (en) | 2015-12-30 | 2015-12-30 | The system and method for operational amplifier power consumption in a kind of reduction assembly line |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105634488B (en) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4879773B2 (en) * | 2007-02-19 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | Analog to digital converter |
| CN101814920B (en) * | 2010-05-05 | 2014-05-07 | 余浩 | Analog-digital converter with sample hold and MDAC (Multiplying Digital-to-Analog Conversion) sharing capacitance and operational amplifier in time sharing way |
| CN102158180B (en) * | 2011-03-28 | 2013-04-24 | 浙江大学 | Switch-type operation amplifier with low power consumption |
| US8471749B2 (en) * | 2011-07-18 | 2013-06-25 | Freescale Semiconductor, Inc. | Comparator |
| CN102594352A (en) * | 2012-03-02 | 2012-07-18 | 西北工业大学 | Sample hold circuit and method for expanding dynamic range of streamline analog to digital converter using sample hold circuit |
-
2015
- 2015-12-30 CN CN201511021009.1A patent/CN105634488B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN105634488A (en) | 2016-06-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203798886U (en) | Current sampling circuit | |
| CN204089754U (en) | A kind of small size low-power consumption high speed current comparator | |
| CN205176136U (en) | Resistance test device | |
| CN104333358A (en) | High-speed clock-controlled comparator | |
| CN206470379U (en) | A kind of integrated circuit monitored for battery voltage | |
| WO2014138693A3 (en) | Low threshold voltage comparator | |
| CN104333384A (en) | Folding and interpolating analog-digital converter employing offset averaging and interpolation shared resistance network | |
| CN105634488B (en) | The system and method for operational amplifier power consumption in a kind of reduction assembly line | |
| CN103354444A (en) | Low-power-consumption variable gain amplifier | |
| CN203941540U (en) | A kind of CLF chip interface circuit | |
| CN103441736B (en) | The preamplifier circuit of CMOS comparator | |
| CN102435818A (en) | Test method of high-precision dynamic comparator and test circuit thereof | |
| CN201839193U (en) | Voltage and current conversion circuit | |
| CN106209067A (en) | A kind of reception circuit of interface duplex | |
| CN105162466B (en) | Increase the ADC structures of production line analog-digital converter surplus amplifier settling time | |
| CN206711075U (en) | A kind of four-quadrant analog divider | |
| CN204131502U (en) | At a high speed, high precision image signal analog to digital conversion circuit | |
| Milovanović et al. | A 40 nm LP CMOS self-biased continuous-time comparator with sub-100ps delay at 1.1 V & 1.2 mW | |
| CN107229008B (en) | A kind of measurement method of CMOS inverter MOS threshold voltage | |
| CN202068388U (en) | Current comparator | |
| CN102706473B (en) | Temperature detecting circuit applied to radio frequency receiver | |
| CN202330526U (en) | Input offset voltage test circuit of high-precision dynamic comparator | |
| CN204906365U (en) | Increase assembly line adc surplus amplifier setting -up time's ADC structure | |
| CN202948046U (en) | Weak current detecting circuit for power supply | |
| CN201985841U (en) | Comparator linearity compensation system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |