CN105529255A - Gate structure forming method and gate structure - Google Patents
Gate structure forming method and gate structure Download PDFInfo
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- CN105529255A CN105529255A CN201410522016.9A CN201410522016A CN105529255A CN 105529255 A CN105529255 A CN 105529255A CN 201410522016 A CN201410522016 A CN 201410522016A CN 105529255 A CN105529255 A CN 105529255A
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Abstract
The invention provides a gate structure forming method and a gate structure. The gate structure forming method comprises the steps of: providing a substrate; forming a first oxidation layer; forming a nitride layer; forming a first gate, so that the first oxidation layer and the nitride layer positioned in a first region form a gate dielectric layer of an input/output MOS device; and forming a second gate on a substrate in a second region. The gate structure comprises a substrate, a first oxidation layer positioned on the substrate in the first region, the nitride layer positioned on the surface of the first oxidation layer, the first gate positioned on the nitride layer in the first region, and the second gate positioned on the substrate in the second region, wherein the nitride layer is formed by carrying out nitrogen treatment on the first oxidation layer. The gate structure forming method and the gate structure have the beneficial effects of reducing probability of electric leakage of the gate dielectric layer, increasing electrical stability of the gate dielectric layer, and reducing thickness of the equivalent oxidation layer under the condition that the physical thickness of the gate dielectric layer of the input/output MOS device is unchanged.
Description
Technical field
The present invention relates to field of semiconductor manufacture, be specifically related to a kind of formation method and grid structure of grid structure.
Background technology
Market now requires more and more higher to the integration density of integrated circuit, dimensions of semiconductor devices needs to become more and more less, accordingly, equivalent oxide thickness (EffectiveOxideThickness, EOT) as the gate dielectric layer of a semiconductor device part also needs equal proportion ground thinning.But gate dielectric layer is reduced to a certain degree at thickness, the electric leakage probability of gate dielectric layer can obviously increase, and the electrical reliability of gate dielectric layer also can reduce.
For complementary mos device (MOS), when the gate dielectric layer in MOS device is being thinned to a certain degree, the electrical reliability of grid structure can decline, and then can affect the reliability of MOS device.
Therefore, how at the reliable grid structure of forming property, the technical problem that those skilled in the art are urgently to be resolved hurrily is become.
Summary of the invention
The problem that the present invention solves is to provide a kind of formation method and grid structure of grid structure, to improve the reliability of the grid structure of formation, and then improves the service behaviour of MOS device.
For solving the problem, the invention provides a kind of formation method of grid structure, comprising:
There is provided substrate, described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device;
The substrate of first area and second area forms the first oxide layer respectively;
Nitrogen treatment is carried out to form nitride layer to the surface of described first oxide layer;
The nitride layer of first area forms first grid, makes to be positioned at the first oxide layer of first area and the gate dielectric layer of nitride layer formation I/O MOS device;
The substrate of second area forms second grid.
Optionally, described substrate is silicon substrate, and described first oxide layer is silicon dioxide.
Optionally, the step forming described first oxide layer comprises: adopt the mode of means of wet thermal oxidation or dry method thermal oxidation to form described first oxide layer.
Optionally, the step of carrying out nitrogen treatment comprises:
Adopt the surface of described first oxide layer of Nitrogen ion bombardment, to form nitride layer on described first oxide layer surface.
Optionally, adopt radio frequency plasma equipment or microwave plasma apparatus to form Nitrogen ion, form described nitride layer with the surface bombarding the first oxide layer.
Optionally, adopt radio frequency plasma equipment to form Nitrogen ion to comprise with the step of bombarding the first oxide layer surface: make the power of radio frequency plasma equipment in the scope of 1000 ~ 2500 watts, duty ratio is in the scope of 10% ~ 40%; The flow of nitrogen is in the scope of 5 ~ 30 Standard Liters per Minute, and the flow of oxygen is in the scope of 0.05 ~ 10 Standard Liters per Minute, and Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 150 seconds, and environmental stress is in the scope of 5 ~ 500 millitorrs.
Optionally, form Nitrogen ion at employing radio frequency plasma equipment also to comprise with the step forming described nitride layer to bombard the first oxide layer surface:
After the described nitride layer of formation, nitrogenize after-baking is carried out to the first oxide layer and described nitride layer.
Optionally, the step of nitrogenize after-baking comprises: make the temperature of nitrogenize after-baking in the scope of 1000 ~ 110 degrees Celsius, and the processing time, environmental stress was in the scope of 1 ~ 20 holder in the scope of 2 ~ 90 seconds.
Optionally, adopt microwave plasma apparatus to form Nitrogen ion to comprise with the step of bombarding the first oxide layer surface: make the power of microwave plasma apparatus in the scope of 1000 ~ 5000 watts, the flow of nitrogen 50 ~ 500 standard milliliters/minute, the flow of argon gas 100 ~ 2000 standard milliliters/minute, Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 50 seconds, environmental stress is in the scope of 0.05 ~ 1 holder, and ambient temperature is in the scope of 300 ~ 500 holders.
Optionally, after the step forming nitride layer, before forming the step of first grid, described formation method also comprises:
Remove the first oxide layer and the nitride layer that are positioned at second area;
The substrate of described second area forms the second oxide layer, as the gate dielectric layer of described core MOS device.
Optionally, after forming the step of nitride layer, remove before being positioned at the first oxide layer of second area and the step of nitride layer, described formation method also comprises:
The first oxide layer being positioned at first area forms protective layer.
Optionally, the material of described protective layer is silicon dioxide.
Optionally, the step forming protective layer comprises:
The mode of chemical vapour deposition (CVD) is adopted to form described protective layer; and using disilicone hexachloride or dual-tert-butyl amino silane as the silicon source of silica material protective layer in described chemical vapour deposition (CVD), the oxygen source using water vapour, oxygen or ozone as silica material protective layer.
Optionally, remove be positioned at the first oxide layer of second area and nitride layer with the gate dielectric layer step forming I/O MOS device after, described formation method also comprises: remove described protective layer.
Optionally, the step forming nitride layer also comprises: make to be positioned at the first oxide layer of second area and the gate dielectric layer of nitride layer formation core MOS device.
Optionally, described first grid and second grid are pseudo-grid, and described formation method also comprises:
Remove pseudo-grid;
Form the first metal gate in first grid situ, form the second metal gate in described second grid situ.
In addition, the present invention also provides a kind of grid structure, and described grid structure is formed on a substrate, comprising:
Substrate, described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device;
Be positioned at the first oxide layer on the substrate of first area;
Be positioned at the nitride layer on the surface of described first oxide layer, described nitride layer is carry out nitrogen treatment to described first oxide layer to be formed;
Be positioned at the first grid on the nitride layer of first area;
Be positioned at the second grid on second area substrate.
Optionally, the material of described first oxide layer is silicon dioxide, and the material of described nitride layer is silicon oxynitride.
Optionally, the thickness of described nitride layer is not more than 10 dusts.
Compared with prior art, technical scheme of the present invention has the following advantages:
The present invention is by forming the dielectric constant of the gate dielectric layer of the I/O MOS device of nitride layer and then raising formation on the surface of the first oxide layer, because the dielectric constant of nitride is higher than the dielectric constant of oxide, like this can when the physical thickness of the gate dielectric layer of I/O MOS device be constant, reduce the electric leakage probability of gate dielectric layer, and increase the electrical stability of gate dielectric layer, that is, the reliability of grid structure is improved; Meanwhile, according to equivalent oxide formula, the dielectric constant increasing gate dielectric layer can reduce equivalent oxide thickness, is so also conducive to reducing MOS device size.
Further; before removal part first oxide layer; the first oxide layer being positioned at first area forms protective layer; be conducive to like this, removing part first oxide layer to be formed in the process of the gate dielectric layer of I/O MOS device, protecting the nitride layer on remaining first oxide layer surface unaffected.
Accompanying drawing explanation
Fig. 1 to Fig. 8 is the structural representation of each step in formation method one embodiment of grid structure of the present invention.
Embodiment
To comprise the semiconductor device of I/O MOS device and core MOS device, the required magnitude of voltage used of I/O MOS device is general higher, that is, it is larger that the gate dielectric layer thickness of I/O MOS device needs to do, but be unfavorable for the EOT size reducing I/O MOS device like this, because reducing the common mode of EOT size is the physical thickness reducing gate dielectric layer, but do like this and can cause gate dielectric layer electric leakage, electrical reliability reduction, and then cause the electric property of I/O MOS device to reduce.
Therefore, the invention provides a kind of formation method of grid structure, comprise the following steps:
There is provided substrate, described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device; The substrate of first area and second area forms the first oxide layer respectively; Nitrogen treatment is carried out to form nitride layer to the surface of described first oxide layer; The nitride layer of first area forms first grid, makes to be positioned at the first oxide layer of first area and the gate dielectric layer of nitride layer formation I/O MOS device; The substrate of second area forms second grid.
The dielectric constant of the gate dielectric layer of the I/O MOS device of nitride layer and then raising formation is formed on the surface of the first oxide layer, because the dielectric constant of nitride is higher than the dielectric constant of oxide, like this can when the physical thickness of the gate dielectric layer of I/O MOS device be constant, reduce the electric leakage probability of gate dielectric layer, and increase the electrical stability of gate dielectric layer, that is, the reliability of grid structure is improved; Meanwhile, according to equivalent oxide formula, the dielectric constant increasing gate dielectric layer can reduce equivalent oxide thickness, is so also conducive to reducing MOS device size.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
It is the structural representation of each step in formation method one embodiment of grid structure of the present invention referring to figs. 1 to Fig. 8.
The present embodiment comprises the semiconductor device of I/O (I/O) MOS device and core (Core) MOS device to be formed.Because I/O (I/O) MOS device needs the voltage that bears relatively high, need the dielectric constant of the gate dielectric layer of I/O (I/O) MOS device larger relative to the dielectric constant of the gate dielectric layer of core (Core) MOS device.
First with reference to figure 1, provide substrate 100, described substrate 100 comprises the first area 10 and second area 20 that are respectively used to form I/O MOS device and core MOS device.
Concrete, in the present embodiment, in the present embodiment following step, described first area 10 and second area 20 are respectively used to form I/O MOS device and core MOS device.
In the present embodiment, described substrate 100 can be silicon substrate, but the present invention is not construed as limiting this, in other embodiments of the invention, described substrate 100 can also be germanium silicon substrate or silicon-on-insulator (SOI) substrate etc.
Isolation structure 70 is also provided with between described first area 10 and second area 20.In the present embodiment, described isolation structure 70 can be shallow trench isolation from (STI), but the present invention is not construed as limiting this.
Continue with reference to figure 1, the part being positioned at first area 10 and second area 20 at described substrate 100 forms the first oxide layer 110, and described first oxide layer 110 is for forming the gate dielectric layer of described I/O MOS device in subsequent steps.
In the present embodiment, the mode of thermal oxidation can be adopted to form described first oxide layer 110.Because substrate 100 described in the present embodiment is silicon substrate, the first oxide layer 110 that described thermal oxidation is formed is earth silicon material.
In the present embodiment, form first oxide layer 110 of thickness range at 25 ~ 80 dusts, but this is only an example of the present embodiment, when practical operation, the thickness of described first oxide layer 110 is should adjust according to actual conditions, and the present invention is not construed as limiting this.
Concrete, the mode of means of wet thermal oxidation can be adopted to form described first oxide layer 110, and this Method compare easily controls the first oxide layer 110 formed.Concrete, can pass into hydrogen and oxygen in the chamber carrying out thermal oxidation, hydrogen and oxygen form steam in chamber, and then adopt the surface of steam to described substrate 100 to carry out thermal oxidation, to form described first oxide layer 110.
In the present embodiment, can make oxidate temperature in the scope of 650 ~ 950 degrees Celsius, the flow of oxygen is in the scope of 0.2 ~ 20 Standard Liters per Minute, the flow of hydrogen is in the scope of 0.2 ~ 20 Standard Liters per Minute, pressure is in the scope of 1 ~ 760 holder, be conducive to forming first oxide layer 110 of described thickness range at 25 ~ 80 dusts in this parameter area, and the impact on other parts of device can be reduced.
But it should be noted that, the present invention forms described first oxide layer 110 to concrete what mode of employing and is not construed as limiting, in other embodiments of the invention, described first oxide layer 110 can also by dry oxidation substrate 100 surface, or the mode of deposited oxide layer material is on the substrate 100 formed.
With reference to figure 2, nitride layer 120 is formed on the surface of described first oxide layer 110, be positioned at the gate dielectric layer that the first oxide layer 110 of first area 10 and nitride layer 120 form I/O MOS device, described nitride layer 120 can promote the dielectric constant of gate dielectric layer, because the dielectric constant of nitride is usually above the dielectric constant of oxide, like this can when the physical thickness of the gate dielectric layer of I/O MOS device be constant, reduce the electric leakage probability of gate dielectric layer, and increase the electrical stability of gate dielectric layer, that is, improve the electric property of grid structure, meanwhile, according to equivalent oxide formula, the dielectric constant increasing gate dielectric layer can reduce equivalent oxide thickness, is so also conducive to reducing I/O MOS device size.
In the present embodiment, the nitride layer 120 of silicon oxy-nitride material can be formed.
In the present embodiment, Nitrogen ion can be adopted to bombard the surface of described first oxide layer 110, to form described nitride layer 120 on described first oxide layer surface.This Method compare easily controls the thickness of the nitride layer 120 formed, and is not easy to impact other structures of I/O MOS device.
The present embodiment can adopt radio frequency plasma equipment to form Nitrogen ion to bombard the surface of the first oxide layer 110, to form described nitride layer 120.
In the present embodiment, affecting device size to make nitride layer 120 be unlikely to blocked up, the nitride layer 120 that thickness range is not more than 10 dusts can be formed.
Concrete, in order to make described nitride layer 120 enough thick in the object reaching the dielectric constant increasing I/O MOS device gate dielectric layer, be unlikely to again blocked up and cause interfacial state between the first oxide layer 110 of earth silicon material and the substrate of silicon materials to uprise and then affect mobility simultaneously, the nitride layer 120 of thickness within the scope of 2 ~ 6 dusts in the present embodiment, can be formed.
But thickness range is herein only an example of the present embodiment, in actual mechanical process, should adjust the described thickness to nitride layer 120 according to actual conditions, so the present invention should do not limited with this.
Concrete, can make the power of radio frequency plasma equipment in the scope of 1000 ~ 2500 watts, duty ratio is in the scope of 10% ~ 40%; The flow of nitrogen is in the scope of 5 ~ 30 Standard Liters per Minute, the flow of oxygen is in the scope of 0.05 ~ 10 Standard Liters per Minute, Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 150 seconds, environmental stress, in the scope of 5 ~ 500 millitorrs, is conducive to forming the above-mentioned nitride layer 120 of thickness within the scope of 2 ~ 6 dusts like this.
Show curve 33 with reference to figure 3 and represent the CONCENTRATION DISTRIBUTION situation of nitrogen in substrate 100, abscissa represents Substrate depth, and ordinate represents nitrogen concentration.As can be seen from the figure, nitrogen mainly concentrates on the position of the substrate surface degree of depth about 5 dust, and that is, the described nitride layer 120 of formation is positioned at the position of the substrate surface degree of depth about 5 dust.
But it should be noted that, Fig. 3 is only an example of the present embodiment, the degree of depth of nitrogen can adjust by adjusting process parameter the degree of depth that nitrogen squeezes into substrate 100.Therefore the present invention is not limited in any way this.
In the present embodiment, adopt radio frequency plasma equipment formed Nitrogen ion with the step of bombarding the first oxide layer 110 after, also further comprising the steps of:
Nitrogenize after-baking is carried out to the first oxide layer 110 and described nitride layer 120, be conducive to like this making the Nitrogen ion of the free state squeezing into the first oxide layer 110 surface form stable silicon-nitrogen key, simultaneously due to the bombardment of Nitrogen ion, may form some lattice defects in the first oxide layer 110 and nitride layer 120, described nitrogenize after-baking is conducive to repairing these lattice defects.
Concrete, in order to repair described lattice defect and form stable silicon-nitrogen key, be unlikely to again undue nitrogenize after-baking causes device performance to be affected simultaneously, can make the temperature of nitrogenize after-baking in the present embodiment in the scope of 1000 ~ 110 degrees Celsius, processing time, environmental stress was in the scope of 1 ~ 20 holder in the scope of 2 ~ 90 seconds.
But above nitrogenize after-baking parameter is only an example of the present embodiment, in actual mechanical process, should adjust accordingly these parameters according to actual conditions, the present invention is not construed as limiting this.
In the present embodiment, to be formed after nitride layer 120 on described first oxide layer 110 surface in formation first oxide layer 110, will the first oxide layer 110 and the nitride layer 120 that are positioned at second area 20 be removed.Because second area 20 is for the formation of core MOS device, and the voltage of core MOS device carrying is lower relative to I/O MOS device, do not need the gate dielectric layer forming high dielectric constant, and the dielectric constant increasing core MOS device gate dielectric layer also may affect the stability of core MOS device, therefore the first oxide layer 110 and the nitride layer 120 that are positioned at second area 20 is removed in the present embodiment, to form the second oxide layer (such as silicon dioxide) that dielectric constant is relatively low in subsequent step, using the gate dielectric layer as described core MOS device.
Etch the nitride layer 120 of the first oxide layer 110 and surface thereof that are positioned at second area 20, the nitride layer 120 of remaining the first oxide layer 110 and surface thereof that are positioned at first area 10 forms the gate dielectric layer of I/O MOS device.
Before the nitride layer 120 removing part first oxide layer 110 and surface thereof, the present embodiment is further comprising the steps of:
The first oxide layer 110 being positioned at first area 10 forms protective layer.Described protective layer used in being positioned at the nitride layer 120 of first area 10 follow-up removing the step protection being arranged in the first oxide layer 110 of second area 20 and the nitride layer 120 on surface thereof, thus the nitride layer 120 being arranged in first area 10 described in avoiding as best one can is affected in etching process and causes the situation that the dielectric constant of the gate dielectric layer of the I/O MOS device formed changes.
Simultaneously; process due to the first oxide layer 110 and nitride layer 120 that are arranged in second area 20 in follow-up removal needs to form photoresist and covers first area 10; need after this to remove photoresist; nitride layer 120 in first area 10 may be impacted in this process, therefore form described protective layer and can also protect described nitride layer 120 in the process removing photoresist.
In the present embodiment; because the material of the nitride layer 120 formed is silicon oxynitride; the present embodiment can form the protective layer of earth silicon material; like this can while protection nitride layer 120; protective layer and nitride layer 120 are distinguished by material and comes, while being conducive to removing described protective layer like this in subsequent step, reduce the impact on nitride layer 120.
With reference to figure 4, described nitride layer 120 forms described protective layer 130 by the mode of chemical vapour deposition (CVD).Described protective layer 130 can the first oxide layer 110 in follow-up removal second area 20 and surface thereof nitride layer 120 step in, the nitride layer 120 of protection first area does not affect by etching.
Concrete; can using disilicone hexachloride or dual-tert-butyl amino silane (BTBAS) as the silicon source of silica material protective layer; oxygen source using water vapour, oxygen or ozone as silica material protective layer, to form the protective layer 130 of described earth silicon material.
In the present embodiment, make ambient temperature in the scope of 50 ~ 250 degrees Celsius, the flow of disilicone hexachloride or dual-tert-butyl amino silane is in the scope of 0.2 ~ 5 Standard Liters per Minute, and the flow of water vapour, oxygen or ozone is in the scope of 0.2 ~ 5 Standard Liters per Minute.
Then with reference to figure 5 and Fig. 6; the position being positioned at first area 10 at described protective layer 130 forms photoresist 50; then etch being positioned at the protective layer 130 of second area 20, nitride layer 120 and the first oxide layer 110, and then expose the substrate 100 (with reference to figure 6) being positioned at second area 20.
Concrete; (main component is deionized water can to adopt SC1 solution; hydrogen peroxide; ammoniacal liquor), (main component is deionized water to SC2; hydrogen peroxide, hydrochloric acid) solution, hydrogen fluoride solution or SPM solution (mainly comprising sulfuric acid and peroxide) etches described protective layer 130, nitride layer 120 and the first oxide layer 110 being positioned at second area 20.
As mentioned before; described protective layer 130 can the first oxide layer 110 in follow-up removal second area 20 and surface thereof nitride layer 120 step in; the nitride layer 120 of protection first area does not affect by etching; its reason is; because described nitride layer 120 is by being formed to the first oxide layer 110 surface bombardment Nitrogen ion; nitrogen generally concentrates on the surface of described first oxide layer 110, is therefore easy to be subject to etching impact:
On the one hand; although when etching the protective layer 130, nitride layer 120 and the first oxide layer 110 that are positioned at second area 20; the nitride layer 120 of first area is formed with photoresist 50; but still may have influence on the nitride layer 120 of first area 10; such as when etching draws to an end, part photoresist 50 may be worn by carving and expose the nitride layer 120 of below.The protective layer 130 that the present embodiment is formed can protect the nitride layer 120 of described first area 10;
On the other hand, with reference to figure 7, after etching, need to remove remaining photoresist 50, remove in the process of photoresist 50 and also easily to impact nitride layer 120, described protective layer 130 also can protect the nitride layer 120 of first area 10.
With reference to figure 8; remove the first oxide layer 110 of being positioned at second area 20 with the step forming the gate dielectric layer of described I/O MOS device after; remove described protective layer 130, so as the follow-up surface in first area 10 be formed with nitride layer 120 the first oxide layer 110 on form the grid of I/O MOS device.
In the present embodiment, because described protective layer 130 is silicon dioxide, SC1 solution or hydrogen fluoride solution can be adopted to remove described protective layer 130, the etch rate of this etching agent to silicon dioxide is larger, and it is less to nitride layer 120 etch rate of the silicon oxy-nitride material of below, that is SC1 solution or hydrogen fluoride solution larger relative to the etching selection of nitride layer 120 to protective layer 130, specifically, the described etching selection ratio of SC1 solution can reach 64 times, and the described etching selection ratio of hydrogen fluoride solution can reach 31 times; Described protective layer 130 can be removed like this while reducing the impact on nitride layer 120.
After the described protective layer 130 of removal, further comprising the steps of:
The substrate 100 of described second area 20 is formed the second oxide layer 150, and described second oxide layer 150 is the gate dielectric layer of described core MOS device;
The nitride layer 120 of first area 10 forms first grid (not shown), makes to be positioned at the gate dielectric layer that the first oxide layer 110 of first area and nitride layer 120 form I/O MOS device;
Second oxide layer 150 of described core MOS device forms second grid (not shown) respectively;
In the present embodiment, described first grid and second grid are pseudo-grid.
After this, remove described first pseudo-grid and the second pseudo-grid, and form the first metal gate in first grid situ, form the second metal gate in described second grid situ.
In addition, the present invention also provides another embodiment of described formation method, the difference of the present embodiment and a upper embodiment is, in the step forming described nitride layer, adopt microwave plasma apparatus formed Nitrogen ion with bombard first oxide layer surface, same like this can described first oxide layer 110 surface formed described nitride layer 120.
In the present embodiment, can make the power of microwave plasma apparatus in the scope of 1000 ~ 5000 watts, the flow of nitrogen 50 ~ 500 standard milliliters/minute, the flow of argon gas 100 ~ 2000 standard milliliters/minute, Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 50 seconds, environmental stress is in the scope of 0.05 ~ 1 holder, and ambient temperature is in the scope of 300 ~ 500 holders.
But these parameters are only examples of the present embodiment, when practical operation, the thickness of described first oxide layer 110 is should adjust according to actual conditions, and the present invention is not construed as limiting this.
After this, another of the present embodiment and a upper embodiment is distinguished and is, the present embodiment does not remove the first oxide layer 110 and nitride layer 120 that are arranged in second area 20, that is, be positioned at the gate dielectric layer that the first oxide layer 110 of second area 20 and nitride layer 120 form core MOS device, this does not affect enforcement of the present invention, because relative to prior art, the gate dielectric layer of I/O MOS device is still and is made up of the first oxide layer 110 and nitride layer 120, dielectric constant is still higher, thus can when the physical thickness of the gate dielectric layer of I/O MOS device be constant, reduce the electric leakage probability of gate dielectric layer, and increase the electrical stability of gate dielectric layer, that is, improve the electric property of grid structure.
Accordingly, owing to not needing the first oxide layer 110 and the nitride layer 120 that are arranged in second area 20 described in removal, the present embodiment does not need to form described protective layer 130 on described nitride layer 120 yet, can save processing step to a certain extent like this.
After this, on described first area 10 and second area 20, grid can be formed respectively.
In addition, the present invention also provides a kind of grid structure, and described grid structure is formed on a substrate, and described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device
The first area of described substrate is formed with the first oxide layer;
In the present embodiment, the material of described first oxide layer is silicon dioxide.
Be positioned at the nitride layer on the surface of described first oxide layer, described nitride layer is carry out nitrogen treatment to described first oxide layer to be formed; Be positioned at the gate dielectric layer that the first oxide layer of first area and nitride layer form described I/O MOS device.
Described nitride layer can promote the dielectric constant of gate dielectric layer, because the dielectric constant of nitride is usually above the dielectric constant of oxide, like this can when the physical thickness of the gate dielectric layer of I/O MOS device be constant, reduce the electric leakage probability of gate dielectric layer, and increase the electrical stability of gate dielectric layer, that is, the electric property of grid structure is improved; Meanwhile, according to equivalent oxide formula, the dielectric constant increasing gate dielectric layer can reduce equivalent oxide thickness, is so also conducive to reducing I/O MOS device size.
In the present embodiment, the material of described nitride layer is silicon oxynitride.
In the present embodiment, affecting device size to make nitride layer 120 be unlikely to blocked up, the thickness range of described nitride layer can be made to be not more than 10 dusts.
Concrete, in order to make described nitride layer enough thick in the object reaching the dielectric constant increasing I/O MOS device gate dielectric layer, be unlikely to again blocked up and cause interfacial state between the first oxide layer 110 of earth silicon material and the substrate of silicon materials to uprise and then affect mobility simultaneously, the nitride layer 120 of thickness within the scope of 2 ~ 6 dusts in the present embodiment, can be formed.
Meanwhile, in the present embodiment, described nitride layer is also positioned at described core MOS device, and that is, the nitride layer being positioned at second area and the first oxide layer being positioned at second area form the gate dielectric layer of described core MOS device jointly.
But whether the present invention must be positioned at described second area to described nitride layer is not construed as limiting, in other embodiments of the invention, described nitride layer also only can be positioned at first area, that is, the gate dielectric layer of the core MOS device in second area can not contain nitride layer, and this does not affect enforcement of the present invention.
In the present embodiment, the substrate of described second area also can be formed with described first oxide layer, the gate dielectric layer of described core MOS device can be formed by described the first oxide layer being positioned at second area;
But the present invention is not limited thereto, in other embodiments of the invention, the substrate of described second area can not have described first oxide layer yet, the gate dielectric layer of described core MOS device can be formed in other oxide layers on second area substrate.
Described grid structure also comprises: be positioned at the first grid on the nitride layer of first area, and the second grid be positioned on second area substrate, described first grid is the grid of described I/O MOS device, and described second grid is the grid of described core MOS device.
In the present embodiment, described first grid and second grid can be metal gates.But the present invention is not limited in any way this.
In addition, grid structure of the present invention can be, but not limited to adopt above-mentioned formation method to obtain.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (19)
1. a formation method for grid structure, is characterized in that, comprising:
There is provided substrate, described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device;
The substrate of first area and second area forms the first oxide layer respectively;
Nitrogen treatment is carried out to form nitride layer to the surface of described first oxide layer;
The nitride layer of first area forms first grid, makes to be positioned at the first oxide layer of first area and the gate dielectric layer of nitride layer formation I/O MOS device;
The substrate of second area forms second grid.
2. form method as claimed in claim 1, it is characterized in that,
Described substrate is silicon substrate, and described first oxide layer is silicon dioxide.
3. form method as claimed in claim 1 or 2, it is characterized in that, the step forming described first oxide layer comprises: adopt the mode of means of wet thermal oxidation or dry method thermal oxidation to form described first oxide layer.
4. form method as claimed in claim 1, it is characterized in that, the step of carrying out nitrogen treatment comprises: the surface adopting described first oxide layer of Nitrogen ion bombardment, to form nitride layer on described first oxide layer surface.
5. form method as claimed in claim 4, it is characterized in that, adopt radio frequency plasma equipment or microwave plasma apparatus to form Nitrogen ion, form described nitride layer with the surface bombarding the first oxide layer.
6. form method as claimed in claim 5, it is characterized in that, adopt radio frequency plasma equipment to form Nitrogen ion to comprise with the step of bombarding the first oxide layer surface: make the power of radio frequency plasma equipment in the scope of 1000 ~ 2500 watts, duty ratio is in the scope of 10% ~ 40%; The flow of nitrogen is in the scope of 5 ~ 30 Standard Liters per Minute, and the flow of oxygen is in the scope of 0.05 ~ 10 Standard Liters per Minute, and Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 150 seconds, and environmental stress is in the scope of 5 ~ 500 millitorrs.
7. form method as claimed in claim 6, it is characterized in that, form Nitrogen ion at employing radio frequency plasma equipment and also comprise with the step forming described nitride layer to bombard the first oxide layer surface:
After the described nitride layer of formation, nitrogenize after-baking is carried out to the first oxide layer and described nitride layer.
8. form method as claimed in claim 7, it is characterized in that, the step of nitrogenize after-baking comprises: make the temperature of nitrogenize after-baking in the scope of 1000 ~ 110 degrees Celsius, and the processing time, environmental stress was in the scope of 1 ~ 20 holder in the scope of 2 ~ 90 seconds.
9. form method as claimed in claim 5, it is characterized in that, adopt microwave plasma apparatus to form Nitrogen ion to comprise with the step of bombarding the first oxide layer surface: make the power of microwave plasma apparatus in the scope of 1000 ~ 5000 watts, the flow of nitrogen 50 ~ 500 standard milliliters/minute, the flow of argon gas 100 ~ 2000 standard milliliters/minute, Nitrogen ion bombards the time on the first oxide layer surface in the scope of 5 ~ 50 seconds, environmental stress is in the scope of 0.05 ~ 1 holder, and ambient temperature is in the scope of 300 ~ 500 holders.
10. form method as claimed in claim 1, it is characterized in that, after the step forming nitride layer, before forming the step of first grid, described formation method also comprises:
Remove the first oxide layer and the nitride layer that are positioned at second area;
The substrate of described second area forms the second oxide layer, as the gate dielectric layer of described core MOS device.
11. form method as claimed in claim 10, it is characterized in that, after forming the step of nitride layer, remove before being positioned at the first oxide layer of second area and the step of nitride layer, described formation method also comprises:
The first oxide layer being positioned at first area forms protective layer.
12. form method as claimed in claim 11, it is characterized in that, the material of described protective layer is silicon dioxide.
13. form method as claimed in claim 12; it is characterized in that; the step forming protective layer comprises: adopt the mode of chemical vapour deposition (CVD) to form described protective layer; and using disilicone hexachloride or dual-tert-butyl amino silane as the silicon source of silica material protective layer in described chemical vapour deposition (CVD), the oxygen source using water vapour, oxygen or ozone as silica material protective layer.
14. form method as claimed in claim 11; it is characterized in that; remove be positioned at the first oxide layer of second area and nitride layer with the gate dielectric layer step forming I/O MOS device after, described formation method also comprises: remove described protective layer.
15. form method as claimed in claim 1, it is characterized in that, the step forming nitride layer also comprises: make to be positioned at the first oxide layer of second area and the gate dielectric layer of nitride layer formation core MOS device.
16. form method as claimed in claim 1, it is characterized in that, described first grid and second grid are pseudo-grid, and described formation method also comprises:
Remove pseudo-grid;
Form the first metal gate in first grid situ, form the second metal gate in described second grid situ.
17. 1 kinds of grid structures, described grid structure is formed on a substrate, it is characterized in that, comprising:
Substrate, described substrate comprises for the formation of the first area of I/O MOS device and the second area for the formation of core MOS device;
Be positioned at the first oxide layer on the substrate of first area;
Be positioned at the nitride layer on the surface of described first oxide layer, described nitride layer is carry out nitrogen treatment to described first oxide layer to be formed;
Be positioned at the first grid on the nitride layer of first area;
Be positioned at the second grid on second area substrate.
18. grid structures as claimed in claim 17, it is characterized in that, the material of described first oxide layer is silicon dioxide, the material of described nitride layer is silicon oxynitride.
19. grid structures as claimed in claim 17, it is characterized in that, the thickness of described nitride layer is not more than 10 dusts.
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