CN105515868A - Configuration and storage method of AFDX data acquisition recorder - Google Patents
Configuration and storage method of AFDX data acquisition recorder Download PDFInfo
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- CN105515868A CN105515868A CN201510932500.3A CN201510932500A CN105515868A CN 105515868 A CN105515868 A CN 105515868A CN 201510932500 A CN201510932500 A CN 201510932500A CN 105515868 A CN105515868 A CN 105515868A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0893—Assignment of logical groups to network elements
Abstract
The invention relates to a configuration and storage method of an AFDX data acquisition recorder. The method comprises a step of dividing a configuration area into three parts, wherein the first configuration area is used for saving VLID information, the second configuration area is used for saving corresponding network data frame information , and the third configuration area is used for saving a minor cycle of each frame, network packet cache area offset and output cache area offset information. Through the adoption of the method disclosed by the invention, the acquired data is correspondingly saved by category and partition, the operation of accurately and efficiently reading and writing the data through the logic cooperation of a processor and a FPGA is facilitated, and the use of the user is convenient.
Description
Technical field
The invention belongs to integrated circuit (IC) design technical field, particularly relate to a kind of collocation method of AFDX data acquisition instrument.
Background technology
Avionic full-duplex switched-type Ethernet AFDX adds the mechanism of virtual link and redundant via on the basis of Ethernet, provide the network that has certainty and reliability, AFDX feature at a high speed makes the data acquisition logging system being necessary for an AFDX bus development high speed high reliability.
The AFDX data that AFDX data acquisition unit realizes AFDX data monitoring port exports gather, be stored in the recording equipment of collector to each AFDX Frame gathered, the real system application demand according to user is needed when storing, data and buffer zone address etc. are preserved, so that processor and fpga logic coordinate, data correctly, are are efficiently read and write, be user-friendly to.
Summary of the invention
The object of the invention is to provide a kind of configuration and data access method of AFDX data acquisition instrument, in order to realize the Data classification collected, correspondence to deposit, data correctly, is is efficiently read and write, be user-friendly to so that processor and fpga logic coordinate.
Technical solution of the present invention is:
The configuration of AFDX data acquisition instrument and a storage means, comprise the following steps:
Step 1, sets up 3 configuring area, wherein: configure 1st district and preserve VLID information, configures 2nd district and preserves corresponding network data frame information, configures 3rd district and preserves minor cycle of each network data frame, network packet buffer offset, output buffer offset information;
Step 2, the first order of the AFDX data of collection module after filtration filters out the VLID information in the frame data of needs after filtering, and with the content information of the network data frame in VLID information one to one frame data; By VLID information stored in configuration 1 district, by the content information of network data frame stored in configuration 2 district;
Step 3, by the minor cycle of each network data frame, network packet buffer offset, output buffer offset information stored in configuration 3 district;
The deviation post of step 4, processor choose parameters sends to fpga logic, fpga logic is according to offseting the data screening in network data frame, and according to the skew of the output buffer in configuration 3 district, garbled data is stored into the position of specifying together with the information of time and requirement, and upgrade pointer mark.
The large I in above-mentioned configuration 1 district stores 4096 VLID information.
The advantage that the present invention has:
The invention provides a kind of collocation method of AFDX data acquisition instrument, configuring area is divided into 3 parts: configure 1st district and preserve VLID information, configure 2nd district and preserve corresponding network data frame information, configure 3rd district and preserve minor cycle of each frame, network packet buffer offset, output buffer offset information, thus achieve the Data classification collected, correspondence, subregion are deposited, so that processor and fpga logic coordinate, data correctly, are are efficiently read and write, be user-friendly to.
Accompanying drawing explanation
Fig. 1 is AFDX data acquisition unit configuring area schematic diagram.
Embodiment
The collocation method of AFDX data acquisition instrument of the present invention, configuring area is divided into 3 parts: configure 1st district and preserve VLID information, configure 2nd district and preserve corresponding network data frame information, configure 3rd district and preserve minor cycle of each frame, network packet buffer offset, output buffer offset information;
The VLID information configuring the preservation of 1st district filters out the VLID information in the frame data of needs, can store 4096 VLID information after being through the first order filtration of AFDX acquisition and recording device filtering module (i.e. VLID filtration);
After the VLID information configuring the preservation of 2nd district is through the first order filtration of AFDX acquisition and recording device filtering module (i.e. VLID filtration), filter out the content information of the network data frame in the frame data of needs, the whole content frame of 4096 frames can be stored, and be one_to_one corresponding with configuring the VLID stored in 1st district;
Configure 3rd district and preserve minor cycle of each frame, network packet buffer offset, output buffer offset information.Wherein:
The minor cycle of preserving each frame is due in systems in practice, critical data may be transmitted as height, speed, temperature or other data are placed in an AFDX frame by application simultaneously, but each Xiao Zhou's issue is only chosen 1 parameter and is screened, likely need to continue the information of screening other at this frame relay in other minor cycle, so need frame to keep in, but the time can not exceed large period (must complete a poll of 4096 configurations under a large period, a large period is divided into multiple minor cycle).
Network packet buffer offset filters out the network data frame in the frame data of needs, preserves the address information of Frame after being through the first order filtration (namely VLID filters) of AFDX acquisition and recording device filtering module;
After output buffer offset information is through the second level filtration (namely choosing parameter to filter) of AFDX acquisition and recording device filtering module, filtering module is chosen according to the parameter information of allocation list by needs, and require data splitting according to allocation list, increase timestamp information, data are saved according to the offset storage of specifying in allocation list in output BUF.
When practical application, processor can tell fpga logic by needing the deviation post of choose parameters, data in Frame are picked out according to skew by fpga logic again, and according to the skew of the output buffer in configuration 3 district, the data selected are stored into the position of specifying together with the information of time and requirement, and upgrade pointer mark, read for user.
Claims (2)
1. the collocation method of AFDX data acquisition instrument and a storage means, is characterized in that: comprise the following steps:
Step 1, sets up 3 configuring area, wherein: configure 1st district and preserve VLID information, configures 2nd district and preserves corresponding network data frame information, configures 3rd district and preserves minor cycle of each network data frame, network packet buffer offset, output buffer offset information;
Step 2, the first order of the AFDX data of collection module after filtration filters out the VLID information in the frame data of needs after filtering, and with the content information of the network data frame in VLID information one to one frame data; By VLID information stored in configuration 1 district, by the content information of network data frame stored in configuration 2 district;
Step 3, by the minor cycle of each network data frame, network packet buffer offset, output buffer offset information stored in configuration 3 district;
The deviation post of step 4, processor choose parameters sends to fpga logic, fpga logic is according to offseting the data screening in network data frame, and according to the skew of the output buffer in configuration 3 district, garbled data is stored into the position of specifying together with the information of time and requirement, and upgrade pointer mark.
2. the configuration of AFDX data acquisition instrument according to claim 1 and storage means, is characterized in that: the large I in described configuration 1 district stores 4096 VLID information.
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| CN201510932500.3A CN105515868B (en) | 2015-12-12 | 2015-12-12 | A kind of configuration and storage method of AFDX data acquisition instrument |
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| CN105515868A true CN105515868A (en) | 2016-04-20 |
| CN105515868B CN105515868B (en) | 2019-05-28 |
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Citations (4)
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| CN101315628A (en) * | 2007-06-01 | 2008-12-03 | 华为技术有限公司 | Internal memory database system and method and device for implementing internal memory data base |
| CN102457441A (en) * | 2012-01-16 | 2012-05-16 | 瑞斯康达科技发展股份有限公司 | PSN (Packet Switched Network) data packet processing method and device |
| CN103034649A (en) * | 2011-09-30 | 2013-04-10 | 阿里巴巴集团控股有限公司 | Method and system for realizing data storage and search |
| CN203327033U (en) * | 2013-04-17 | 2013-12-04 | 西安中飞航空测试技术发展有限公司 | EtherCAT-based data acquisition device for flight test |
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2015
- 2015-12-12 CN CN201510932500.3A patent/CN105515868B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101315628A (en) * | 2007-06-01 | 2008-12-03 | 华为技术有限公司 | Internal memory database system and method and device for implementing internal memory data base |
| CN103034649A (en) * | 2011-09-30 | 2013-04-10 | 阿里巴巴集团控股有限公司 | Method and system for realizing data storage and search |
| CN102457441A (en) * | 2012-01-16 | 2012-05-16 | 瑞斯康达科技发展股份有限公司 | PSN (Packet Switched Network) data packet processing method and device |
| CN203327033U (en) * | 2013-04-17 | 2013-12-04 | 西安中飞航空测试技术发展有限公司 | EtherCAT-based data acquisition device for flight test |
Non-Patent Citations (1)
| Title |
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| 王宝亮，张静，邱智亮，明旿，滕斌: ""机载 AFDX 和 Ethernet 总线数据的采集与监测"", 《2011 INTERNATIONAL CONFERENCE ON AEROSPACE ENGINEERING AND INFORMATION TECHNOLOGY(AEIT 2011)》 * |
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Effective date of registration: 20221021 Address after: Room S303, Innovation Building, No. 25, Gaoxin 1st Road, Xi'an, Shaanxi 710075 Patentee after: XI'AN XIANGTENG MICROELECTRONICS TECHNOLOGY Co.,Ltd. Address before: No. 15, Jinye Second Road, Xi'an, Shaanxi 710065 Patentee before: AVIC XI''AN AERONAUTICS COMPUTING TECHNIQUE RESEARCH INSTITUTE |