CN105405889B - A kind of groove MOSFET with comprehensive current expansion path - Google Patents

A kind of groove MOSFET with comprehensive current expansion path Download PDF

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Publication number
CN105405889B
CN105405889B CN201510742176.9A CN201510742176A CN105405889B CN 105405889 B CN105405889 B CN 105405889B CN 201510742176 A CN201510742176 A CN 201510742176A CN 105405889 B CN105405889 B CN 105405889B
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China
Prior art keywords
structure
structure sheaf
layer
current expansion
expansion path
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CN201510742176.9A
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Chinese (zh)
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CN105405889A (en
Inventor
丁艳
王立新
张彦飞
孙博韬
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中国科学院微电子研究所
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Abstract

The invention discloses a kind of groove MOSFETs with comprehensive current expansion path, comprising: substrate 101;The first structure layer 102 being covered in substrate 101;The second structure sheaf 103 being covered in first structure layer 102;The third structure sheaf 104 being covered in the second structure sheaf 103;Source contact hole 108 positioned at 104 top of third structure sheaf;Across the groove 109 above third structure sheaf 104, the second structure sheaf 103, first structure layer 102;Across the polysilicon gate 106 above third structure sheaf 104, the second structure sheaf 103, first structure layer 102, in groove 109;Positioned at the gate dielectric layer 105 of 106 outside side wall of polysilicon gate and bottom;Grid contact hole 107 positioned at 106 top of polysilicon gate;The upper surface layer 110 formed by substrate 101, first structure layer 102, the second structure sheaf 103, third structure sheaf 104;Wherein, the substrate 101, first structure layer 102, third structure sheaf 104 are the first conduction type, and second structure sheaf 103 is the second conduction type.

Description

A kind of groove MOSFET with comprehensive current expansion path

Technical field

The present invention relates to technical field of semiconductors more particularly to a kind of grooves with comprehensive current expansion path MOSFET。

Background technique

It is known as VDMOSFET, abbreviation VDMOS with the vertical nMOSFET that vertical double diffusion technique is formed.VDMOS (vertical double expansions End of a performance effect transistor) it is used as switching device, it is widely applied in the power supply system.In order to improve cellular integration density, reduction is led Be powered resistance, and a kind of MOSFET structure of groove (Trench) technique production is suggested.Trench process MOSFET replaces traditional put down Face technique is widely used in the field low pressure MOSFET.Traditional groove MOSFET by channel region by being laterally changed to longitudinal direction, So that the cellular of identical chips area more crypto set, increases channel region, to reduce conducting resistance.However, either plane The longitudinal channel of the lateral channel of technique either groove grid technique, guiding path is than relatively limited.

It drains as shown in Figure 1, traditional groove MOSFET is used as using silicon chip back side, grown above silicon epitaxial layer, outside Prolong digging groove in layer, grow grid oxygen, depositing polysilicon, while ion implanting well region and source region in the trench, preparation source electrode and Gate electrode.Traditional slot grid reduce channel resistance and the area JEFT resistance, take advantage in the field low pressure MOSFET.Simultaneously because increasing The integration density of Canadian dollar born of the same parents makes in effective chip area, and conducting channel number increases.However, this method is in a longitudinal direction There are conducting channel, current flow paths are fairly limited.

Summary of the invention

The present invention provides a kind of groove MOSFET with comprehensive current expansion path, by conductive in comprehensive increase Channel realizes the purpose for further decreasing conducting resistance to increase current expansion path.

In order to achieve the above objectives, the present invention adopts the following technical solutions:

A kind of groove MOSFET with comprehensive current expansion path, comprising:

Substrate 101;

The first structure layer 102 being covered in substrate 101;

The second structure sheaf 103 being covered in first structure layer 102;

The third structure sheaf 104 being covered in the second structure sheaf 103;

Source contact hole 108 positioned at 104 top of third structure sheaf;

Across the groove 109 above third structure sheaf 104, the second structure sheaf 103, first structure layer 102;

It is more in groove 109 across above third structure sheaf 104, the second structure sheaf 103, first structure layer 102 Polysilicon gate 106;

Positioned at the gate dielectric layer 105 of 106 outside side wall of polysilicon gate and bottom;

Grid contact hole 107 positioned at 106 top of polysilicon gate;

The upper surface layer 110 formed by substrate 101, first structure layer 102, the second structure sheaf 103, third structure sheaf 104;

Wherein, the substrate 101, first structure layer 102, third structure sheaf 104 are the first conduction type, second knot Structure layer 103 is the second conduction type.

Optionally, the substrate 101 is formed after being etched by extension, first structure layer 102, the second structure sheaf 103, third Structure sheaf 104 is by being epitaxially formed.

Optionally, the thickness of the substrate 101 is not less than 20um, and the thickness of cutting back substrate 101 is no more than 5um, and first The epitaxial thickness of structure sheaf 102 is no more than 10um.

Optionally, outer layer doping concentration is identical as basic groove MOSFET, is 1 × 1014/cm3~1 × 1019/cm3, with Just breakdown voltage within 100V is formed.

Optionally, it is needed after the completion of the first structure layer 102, the second structure sheaf 103,104 epitaxial growth of third structure sheaf By a step CMP (Chemical Mechanical Polishing, chemically mechanical polishing) technique.

Optionally, 105 thickness of gate dielectric layer is identical with convention trench MOSFET, is 30nm~50nm.

Optionally, the structure before gate dielectric layer 105 is formed need to can only be formed by mask lithography twice.

Optionally, grid contact hole 107, source contact hole 108 are conventional groove MOSFET structure, can be had diversified Doping, size, production method, comprehensive current-dispersing structure of the invention can collectively constitute entirely with any of them structure Azimuthal current extension groove MOSFET.

Optionally, the groove MOSFET with comprehensive current expansion path has the transverse direction of channel region and drift region Current path and comprehensive current expansion path.

Optionally, first conduction type is N-type, and the second conduction type is p-type;Alternatively, the first conduction type is P Type, the second conduction type are N-type.

Groove MOSFET provided in an embodiment of the present invention with comprehensive current expansion path, electric current is in the upper of MOSFET Top surface and surrounding side all have circulation path, all have conducting channel in all directions, increase current conducting path, from And increase current expansion path, reduce conducting resistance.

Detailed description of the invention

To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.

Fig. 1 is trench MOSFET structure schematic diagram traditional in the prior art;

Fig. 2 is the structural representation of the groove MOSFET provided in an embodiment of the present invention with comprehensive current expansion path Figure;

Fig. 3 a is the production groove shown in Fig. 2 with comprehensive current expansion path provided in an embodiment of the present invention The process flow chart of MOSFET;

Fig. 3 b is the structural schematic diagram of multiple etching mask plate in process flow chart shown in Fig. 3 a;

Fig. 4 a is the comprehensive current expansion path of groove MOSFET provided in an embodiment of the present invention;

Fig. 4 b is groove MOSFET upper surface current expansion path provided in an embodiment of the present invention;

Fig. 4 c is that extensions path is flowed in groove MOSFET side provided in an embodiment of the present invention.

Specific embodiment

Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts all other Embodiment shall fall within the protection scope of the present invention.

As shown in Fig. 2, the embodiment of the present invention provides a kind of groove MOSFET with comprehensive current expansion path, it is described Groove MOSFET includes:

Substrate 101;

The first structure layer 102 being covered in substrate 101;

The second structure sheaf 103 being covered in first structure layer 102;

The third structure sheaf 104 being covered in the second structure sheaf 103;

Source contact hole 108 positioned at 104 top of third structure sheaf;

Across the groove 109 above third structure sheaf 104, the second structure sheaf 103, first structure layer 102;

It is more in groove 109 across above third structure sheaf 104, the second structure sheaf 103, first structure layer 102 Polysilicon gate 106;

Positioned at the gate dielectric layer 105 of 106 outside side wall of polysilicon gate and bottom;

Grid contact hole 107 positioned at 106 top of polysilicon gate;

The upper surface layer 110 formed by substrate 101, first structure layer 102, the second structure sheaf 103, third structure sheaf 104;

Wherein, the substrate 101, first structure layer 102, third structure sheaf 104 are the first conduction type, second knot Structure layer 103 is the second conduction type.

Optionally, the substrate 101 is formed after being etched by extension, first structure layer 102, the second structure sheaf 103, third Structure sheaf 104 is by being epitaxially formed.

Optionally, the thickness of the substrate 101 is not less than 20um, and the thickness of cutting back substrate 101 is no more than 5um, and first The epitaxial thickness of structure sheaf 102 is no more than 10um.

Optionally, outer layer doping concentration is identical as basic groove MOSFET, is 1 × 1014/cm3~1 × 1019/cm3, with Just breakdown voltage within 100V is formed.

Optionally, it is needed after the completion of the first structure layer 102, the second structure sheaf 103,104 epitaxial growth of third structure sheaf By a step CMP (Chemical Mechanical Polishing, chemically mechanical polishing) technique.

Optionally, 105 thickness of gate dielectric layer is identical with convention trench MOSFET, is 30nm~50nm.

Optionally, the structure before gate dielectric layer 105 is formed need to can only be formed by mask lithography twice.

Optionally, grid contact hole 107, source contact hole 108 are conventional groove MOSFET structure, can be had diversified Doping, size, production method, comprehensive current-dispersing structure of the invention can collectively constitute entirely with any of them structure Azimuthal current extension groove MOSFET.

Optionally, the groove MOSFET with comprehensive current expansion path has the transverse direction of channel region and drift region Current path and comprehensive current expansion path.

Optionally, first conduction type is N-type, and the second conduction type is p-type;Alternatively, the first conduction type is P Type, the second conduction type are N-type.

After 101 epitaxial growth of substrate, first time exposure mask is carried out, masking layer SiO2 is etched from upper surface toward bottom, is retained SiO2 layers, one structure sheaf 102 of growth regulation, the second structure sheaf 103, third structure sheaf 104 remove the bottom SiO2 using CMP process More than facial planes first structure layer 102, the second structure sheaf 103, third structure sheaf 104.It is etched in 110 upper surface of upper surface layer Groove 109, groove are vertically intersected on 103 upper top of the second structure sheaf on one side, and the another side of groove is located at first structure layer 102 Interior, in the thermally grown gate dielectric layer 105 of the inner sidewall of groove, depositing polysilicon grid 106 is simultaneously anti-carved.

In an embodiment of the present invention, the metals interconnection process such as polysilicon, grid contact hole, source contact hole is equal to commonly Slot grid structure, size, production method are varied, and the present embodiment does not illustrate, in production process with metal interconnection and Passivation technology replaces.

This example can be realized by embodiments such as extension, cutting, CMP, deposit, thermal oxides common in groove grid technique. As shown in Figure 3a, it is a kind of feasible process flow, as shown in Figure 3b, while gives the mask plate of each injection, white portion It is divided into etch areas, the later processing step of polysilicon gate 106 is consistent with common MOSFET, repeats no more.

In embodiments of the present invention, the comprehensive current expansion path of groove MOSFET is as shown in fig. 4 a.From Fig. 4 a, Fig. 4 b, It can be seen that, for electric current by third structure sheaf 104, horizontal direction flows through the second structure sheaf 103, first structure layer in Fig. 4 c 102, vertical direction flows through substrate 101, is finally pooled to 120 at drain electrode.And traditional structure such as Fig. 1 conventional trench MOSFET, electric current are usually from source electrode, and vertical direction flows through the injection region source electrode N+, p, the epi region N-, N+ substrate.And In the present invention, electric current all has circulation path namely comprehensive current expansion path in the upper top surface of MOSFET and surrounding side Such as Fig. 4 a, upper surface current expansion path such as Fig. 4 b, lateral current extensions path is as illustrated in fig. 4 c.In addition, due to using this hair Bright structure, all has conducting channel in all directions, increases current conducting path, to increase current expansion path, subtracts Small conducting resistance.

Meanwhile in addition to metal interconnect and be passivated layer process other than main technique part, only need to pass through Twi-lithography, first The secondary mask etching for substrate 101, second is the etching of groove 109.Remaining semiconductor layer, first structure layer 102, the second structure Layer 103, third structure sheaf 104 are to be epitaxially-formed, and are not necessarily to photoetching and injection.

It should be noted that, although the embodiment of the present invention is to be directed to N-type MOSFET, but be applied equally to p-type MOSFET.Although the embodiment of the present invention is the groove MOSFET for strip grate, the ditch of structure cell can equally be well applied to Groove MOSFET.In addition, the achievable implementation method of the present invention can also be by forming after delaying multiple method for implanting compensation outside, this Text does not provide one by one.

The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by those familiar with the art, all answers It is included within the scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.

Claims (9)

1. a kind of groove MOSFET with comprehensive current expansion path characterized by comprising
Substrate (101);
The first structure layer (102) being covered in substrate (101);
The second structure sheaf (103) being covered in first structure layer (102);
The third structure sheaf (104) being covered in the second structure sheaf (103);
Source contact hole (108) at the top of third structure sheaf (104);
Across the groove (109) above third structure sheaf (104), the second structure sheaf (103), first structure layer (102);
Across above third structure sheaf (104), the second structure sheaf (103), first structure layer (102), it is located in groove (109) Polysilicon gate (106);
Gate dielectric layer (105) positioned at polysilicon gate (106) outside side wall and bottom;
Grid contact hole (107) at the top of polysilicon gate (106);
The upper surface layer formed by substrate (101), first structure layer (102), the second structure sheaf (103), third structure sheaf (104) (110), the upper surface layer (110) has horizontal conducting channel, by electric current from third structure sheaf (104) horizontal conductive To the substrate (101);
Wherein, the substrate (101), first structure layer (102), third structure sheaf (104) be the first conduction type, described second Structure sheaf (103) is the second conduction type, and the substrate (101) is formed after being etched by extension, the first structure layer (102), the second structure sheaf (103), third structure sheaf (104) are by being epitaxially formed.
2. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that the lining The thickness at bottom (101) is not less than 20um, and the thickness of cutting back substrate (101) is no more than 5um, the extension of first structure layer (102) Thickness is no more than 10um.
3. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that epitaxial layer Doping concentration is identical as basic groove MOSFET, is 1 × 1014/cm3~1 × 1019/cm3
4. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that described Pass through a step CMP process after the completion of one structure sheaf (102), the second structure sheaf (103), third structure sheaf (104) epitaxial growth.
5. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that the grid Dielectric layer (105) thickness is identical with convention trench MOSFET, is 30nm~50nm.
6. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that the grid Structure before dielectric layer (105) is formed is formed by mask lithography twice.
7. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that described One conduction type is N-type, and the second conduction type is p-type;Alternatively, the first conduction type is p-type, the second conduction type is N-type.
8. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that the grid Contact hole (107), source contact hole (108) are conventional groove MOSFET structure.
9. the groove MOSFET according to claim 1 with comprehensive current expansion path, which is characterized in that the tool There is the groove MOSFET in comprehensive current expansion path that there is the transverse current path of channel region and drift region and comprehensive Current expansion path.
CN201510742176.9A 2015-11-04 2015-11-04 A kind of groove MOSFET with comprehensive current expansion path CN105405889B (en)

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CN108054215A (en) * 2017-12-21 2018-05-18 深圳市晶特智造科技有限公司 Junction field effect transistor and preparation method thereof

Citations (2)

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Publication number Priority date Publication date Assignee Title
CN101794780A (en) * 2008-12-31 2010-08-04 万国半导体有限公司 nano-tube mosfet technology and devices
CN102194880A (en) * 2010-03-05 2011-09-21 万国半导体股份有限公司 Device structure with channel-oxide-nanotube super junction and preparation method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8299494B2 (en) * 2009-06-12 2012-10-30 Alpha & Omega Semiconductor, Inc. Nanotube semiconductor devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794780A (en) * 2008-12-31 2010-08-04 万国半导体有限公司 nano-tube mosfet technology and devices
CN102194880A (en) * 2010-03-05 2011-09-21 万国半导体股份有限公司 Device structure with channel-oxide-nanotube super junction and preparation method thereof

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