CN105404198B - On-off signal loop self-checking circuit based on impulses injection method - Google Patents

On-off signal loop self-checking circuit based on impulses injection method Download PDF

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Publication number
CN105404198B
CN105404198B CN201510731627.9A CN201510731627A CN105404198B CN 105404198 B CN105404198 B CN 105404198B CN 201510731627 A CN201510731627 A CN 201510731627A CN 105404198 B CN105404198 B CN 105404198B
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self
signal
optocoupler
resistance
test
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CN105404198A (en
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朱启晨
乔志
陈秋荣
徐万方
胡炯
徐刚
刘志超
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Beijing Sifang Automation Co Ltd
Beijing Sifang Engineering Co Ltd
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Beijing Sifang Automation Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • G05B19/0425Safety, monitoring
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/26Pc applications
    • G05B2219/2612Data acquisition interface

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

On-off signal loop self-checking circuit based on impulses injection method, spike self-test pulse is produced by CPU I/O pin control, On-off signal loop is injected into, is gathered and judged by CPU ADC analog-to-digital conversion pins again after optocoupler;The input of CPU I/O pin connection optocoupler, the input of the output end connection light metal-oxide-semiconductor of optocoupler, the public positive pole of the source electrode connection power supply of light metal-oxide-semiconductor, one end of the drain electrode connection safety electric capacity of light metal-oxide-semiconductor, the other end access On-off signal loop of safety electric capacity;Spike self-test pulse signal is produced by CPU I/O pin driving to inject after On-off signal loop, the waveform of optical coupling secondary edges is gathered by CPU ADC analog-to-digital conversions pin, and handled, analyzed and compared, so as to realize that the self-test of switch amount input circuit integrity judges;This self test mode can be applied in the case where opening signal and being in any state, and the self-test loop has high isolating power and reliability.

Description

On-off signal loop self-checking circuit based on impulses injection method
Technical field
The invention belongs to technical field of power systems, is related to the On-off signal loop self-checking circuit based on impulses injection method And the device using this method, be particularly suitable for use in needs in power system transformer substation automation and industrial control automation field On-off signal gathers and the protection control of input circuit self-test and automation equipment.
Background technology
In power system transformer substation automation and industrial control automation device, generally On-off signal is set to gather back Road obtains the state of some important numbers semaphores, and necessary foundation is provided for follow-up protection control operation.For open entry loop Realization, typically using the primary side for opening the electrical energy drive input circuit optocoupler into signal, pass through pull-up resistor in optical coupling secondary edges The state change opened into signal is converted into voltage signal, then the differentiation of voltage signal is carried out by CPU relevant interface, so as to distinguish Do not go out outside digital quantity signal state.It is split enter signal condition accurate recognition be realize protection system control function a weight Want premise, meanwhile, it is split enter state mistake differentiate and occur one of major reason of protection misoperation, want to guarantee Correct decision is opened into signal condition, and it is a primary premise that whether normal open entry loop is in itself, is also necessary to its continuous progress Self-test judges.
It is conventional open into acquisition circuit self checking method as shown in Figure 1, by D1 and R2 formed self-test input circuit to R1, The On-off signal loop of R3, R4, C1, D2 and O1 composition carries out self-test, and conventional method is all directly with electricity in input circuit Gas type of attachment one self-test input circuit of parallel connection, a self-test square-wave pulse signal is provided to control by CPU I/O port, then The self-test signal is identified via the cpu data collection port of open entry loop again.
Two typical problems be present using the above-mentioned device opened into acquisition circuit self checking method:
● self-test input circuit does not have effective electrical isolation with opening into acquisition circuit, and the interference introduced by open entry loop is believed The damage of self-test loop number is easily lead to, and then leads to not normally realize self-checking function.
● the self-test signal exported by CPU I/O ports is a kind of square-wave signal, is easily caused with normally opening into blurring Self-test is judged by accident or opened into malfunction.
The content of the invention
The purpose of the present invention is:Do not influence On-off signal signal normally collection and judge on the premise of, it is split enter Loop carries out online real-time self-test, and also to ensure the high isolation and high reliability in self-test loop.
The technical solution adopted by the present invention is:
A kind of On-off signal loop self-checking circuit based on impulses injection method, including self-test signal infusion circuit and switch Measure input circuit;It is characterized in that:
CPU I/O pin exports a spike self-test pulse signal, and by the self-test signal infusion circuit by described in The input of spike self-test pulse signal insertion switch amount input circuit, the spike self-test pulse signal return by On-off signal After the optocoupler output on road, gathered and to this by the same CPU of generation spike self-test pulse signal ADC analog-to-digital conversions pin Spike self-test pulse signal is identified so as to judge whether On-off signal loop is normal.
Wherein, the self-test signal infusion circuit includes the first optocoupler O1, light metal-oxide-semiconductor T1, safety electric capacity C1;CPU IO Pin connects the first optocoupler O1 input, the first optocoupler O1 output end connection light metal-oxide-semiconductor T1 input, light metal-oxide-semiconductor T1 The public positive pole of source electrode connection power supply open into power supply, the drain electrode connection high-voltage safety electric capacity C1 of light metal-oxide-semiconductor one end, safety electricity Hold C1 other end access On-off signal loop.
Self-test signal injection circuit also includes resistance R1, R2, R3, wherein, resistance R1 is being connected to the first optocoupler O1 inputs just Between end and power supply 3.3V, spike self-test pulse signal caused by the I/O pin of the CPU accesses the first optocoupler O1 inputs Negative terminal;Resistance R2 is connected between light metal-oxide-semiconductor T1 input negative terminal and -24V, the O1 of first optocoupler output end and light MOS Pipe T1 input positive terminal connection;Between resistance R3 is connected to the output negative terminal of light metal-oxide-semiconductor and opens power supply ground, light metal-oxide-semiconductor T1's Output plus terminal is connected into power supply with opening.
On-off signal loop includes the second optocoupler O2, resistance R4, resistance R5, resistance R6, resistance R7;Open into signal through string Resistance R4, R5 of connection connection are connected with the second optocoupler O2 input positive terminal, the spike self-test arteries and veins from self-test signal infusion circuit Rush between signal access resistance R4 and resistance R5, one end connects after resistance R6 and resistance R7 series connection opens into power supply, the other end Connect the second optocoupler O2 input negative terminal;Second optocoupler O2 output plus terminal connection power supply 3.3V, the second optocoupler O2 output are born End connection CPU ADC analog-to-digital conversion pins.
The On-off signal loop also includes resistance R8, electric capacity C2, electric capacity C4, diode D1;Electric capacity C2, diode D1 And it is connected between the second optocoupler O2 input positive and negative terminal;It is in parallel between second optocoupler O2 output end and acquisition system power supply ground Resistance R8 and electric capacity C4.
The injection of self-test pulse signal is realized by high-voltage safety electric capacity, for normal switch acquisition loop, a phase When in a pulse burr, it is easy to distinguished with normal on-off model;Even if self-checking circuit breaks down, can also be most The reduction CPU of limits is to normal switch amount signal acquisition and the influence judged.
The self-test waveform of On-off signal loop optical coupling secondary edges output to collecting every time is stored and contrasted judgement, So as to judge the integrity in On-off signal loop.
Beneficial effects of the present invention:The present invention can be realized in the case where not influenceing the collection of normal on-off model, Online real-time self-test is carried out to open entry loop;The high isolation between self-test loop and open entry loop is can also ensure that simultaneously, is made Obtain to produce therebetween and interfere, especially also ensure does not influence open entry loop when self-test loop is damaged Normal use.
Brief description of the drawings
Fig. 1 is self-test and the schematic diagram of open entry loop of usual manner;
Fig. 2 is the self-test signal infusion circuit in the self-checking circuit of On-off signal loop of the present invention;
Fig. 3 is the On-off signal loop of the On-off signal loop self-checking circuit of the present invention.
Embodiment
Below in conjunction with the accompanying drawings 2,3 and embodiment technical scheme is described in further detail.
The self-test signal into self-test loop is opened in a manner of being electrically connected and be directly accessed open entry loop different from conventional, this hair Self-test signal infusion circuit in the On-off signal loop self-checking circuit of bright method by CPU I/O pin as shown in Fig. 2 connected Optocoupler O1 input, optocoupler O1 output end connection light metal-oxide-semiconductor T1 input, light metal-oxide-semiconductor T1 source electrode connection power supply Public positive pole is opened to be opened into power supply, light metal-oxide-semiconductor T1 drain electrode connection safety electric capacity C1 one end, safety electric capacity C1 other end access Self-test signal infusion circuit is formed between the resistance R4 and resistance R5 of pass amount input circuit, and by optocoupler O1 and light metal-oxide-semiconductor T1 groups Into drive circuit, the control that is turned on and off that a square wave control light metal-oxide-semiconductor is produced by CPU I/O port is opened into power supply so as to produce One conducting square wave wave mode, the rising edge of waveform starting and the trailing edge of termination the connecing in open entry loop by safety electric capacity C1 Entering end generation one has certain time width spike self-test signal, then is finally turned via open entry loop by CPU ADC moduluses Change pin collection and identification.Self-test signal injection circuit also includes resistance R1, R2, R3, wherein, resistance R1 is connected to the first optocoupler Between O1 input positive terminals and power supply 3.3V, spike self-test pulse signal caused by the I/O pin of the CPU accesses first light Coupling O1 input negative terminals;Resistance R2 is connected between light metal-oxide-semiconductor T1 input negative terminal and -24V, the O1 of first optocoupler output end Connected with light metal-oxide-semiconductor T1 input positive terminal;Between resistance R3 is connected to the output negative terminal of light metal-oxide-semiconductor and opens power supply ground, light MOS Pipe T1 output plus terminal is connected into power supply with opening.
The On-off signal loop of the On-off signal loop self-checking circuit of the present invention is as shown in figure 3, On-off signal returns Road is to open one end into signal connection resistance R4, resistance R4 other end connection resistance R5 one end, the resistance R5 other end and Optocoupler O2 input positive terminals connect, and optocoupler O2 input negative terminal connects with resistance R7 one end, resistance the R7 other end and resistance R6 One end connection, resistance R6 other end connection opens into power supply, optocoupler O2 output plus terminal connection acquisition system power supply 3.3V, Optocoupler O2 output negative terminal connection CPU analog acquisition passage, in order to ensure that there is certain anti-interference energy in On-off signal loop Power adds optocoupler O2 inputs electric capacity C2 and diode D1 in parallel, while in order to ensure the stabilization of optical coupling secondary edges output signal Electric capacity C3 in parallel between acquisition system power supply 3.3V and system power supply is added, CPU analog acquisition passages are connected in optocoupler Annexation on add anti-interference capacitor C4 and pull down resistor R8.
Spike is noted by safety electric capacity C1 between resistance R4 and resistance R5 as caused by self-test signal infusion circuit Enter On-off signal loop, the signal that safety electric capacity C1 serves isolation lower frequency can only be by the work of higher frequency signals With so can effectively reducing influencing each other between impulses injection loop and on-off model input circuit, be advantageous to protect Respective circuit makes it be not easy to be damaged.
The pulse of injection passes through optocoupler O2 linear transforms to secondary output end.The optical coupling secondary edges output of open entry loop terminates to CPU ADC analog-to-digital conversion pins, spike self-test waveform enters via the output waveform after optocoupler when CPU can be to each self-test Row collection, the spike self-test waveform collected, lasting level signal waveform has very big difference with normal switching value, It is easy to distinguish with normal on-off model, CPU can accurately judge to have received spike self-test waveform, by right The spike self-test waveform received is compared with the waveform stored before, and periphery electricity is represented if similarity is in the range of Device loop there is not device function abnormal, so as to realize the self-test arbitration functions of the integrality of switch amount input circuit and correctness. On-line self-diagnosis periodically can be carried out to the on-off model input circuit on device veneer by this kind of method in real time, on the one hand not The normal operation of device in itself can be influenceed, is on the other hand also avoided that self-test loop because being caused to damage by open entry loop interference signal And make it that self-test can not be normally carried out.
Described above is only a kind of embodiment of invention, it should be pointed out that:To those of ordinary skill in the art, Under the premise without departing from the principles of the invention, some modifications and adaptations can also be made, these modifications and adaptations are regarded as this The protection domain of invention.

Claims (5)

1. a kind of On-off signal loop self-checking circuit based on impulses injection method, including self-test signal infusion circuit and switching value Input circuit;It is characterized in that:
CPU I/O pin exports a spike self-test pulse signal, and by the self-test signal infusion circuit by the spike The input of self-test pulse signal insertion switch amount input circuit, the spike self-test pulse signal is by On-off signal loop After optocoupler output, by generation spike self-test pulse signal the CPU ADC analog-to-digital conversions pin collection and to the spike from Inspection pulse signal is identified so as to judge whether On-off signal loop is normal.
2. On-off signal loop according to claim 1 self-checking circuit, it is characterised in that:
The self-test signal infusion circuit includes the first optocoupler O1, light metal-oxide-semiconductor T1, safety electric capacity C1;CPU I/O pin connection the One optocoupler O1 input, the first optocoupler O1 output end connection light metal-oxide-semiconductor T1 input, light metal-oxide-semiconductor T1 source electrode connection The public positive pole of power supply is opened into power supply, the drain electrode connection safety electric capacity C1 of light metal-oxide-semiconductor one end, safety electric capacity C1 another termination Enter On-off signal loop.
3. On-off signal loop according to claim 2 self-checking circuit, it is characterised in that:
Self-test signal injection circuit also includes resistance R1, resistance R2, resistance R3, wherein, it is defeated that resistance R1 is connected to the first optocoupler O1 Enter between anode and power supply 3.3V, spike self-test pulse signal caused by the I/O pin of the CPU accesses the first optocoupler O1 Input negative terminal;Resistance R2 is connected between light metal-oxide-semiconductor T1 input negative terminal and -24V, first optocoupler O1 output end and light Metal-oxide-semiconductor T1 input positive terminal connection;Between resistance R3 is connected to the output negative terminal of light metal-oxide-semiconductor and opens power supply ground, light metal-oxide-semiconductor T1 Output plus terminal connected into power supply with opening.
4. the On-off signal loop self-checking circuit according to claim 1-3 any claims, it is characterised in that:
On-off signal loop includes the second optocoupler O2, resistance R4, resistance R5, resistance R6, resistance R7;Open and be concatenated connecting into signal Resistance R4, the R5 connect is connected with the second optocoupler O2 input positive terminal, the spike self-test pulse letter from self-test signal infusion circuit Number access resistance R4 and resistance R5 between, one end connect after resistance R6 and resistance R7 series connection opens into power supply, the other end connect Second optocoupler O2 input negative terminal;Second optocoupler O2 output plus terminal connection power supply 3.3V, the second optocoupler O2 output negative terminal connect Connect CPU ADC analog-to-digital conversion pins.
5. the On-off signal loop self-checking circuit according to claim 4 any claim, it is characterised in that:
The On-off signal loop also includes resistance R8, electric capacity C2, electric capacity C4, diode D1;Electric capacity C2, diode D1 are in parallel It is connected between the second optocoupler O2 input positive and negative terminal;Parallel resistance between second optocoupler O2 output end and acquisition system power supply ground R8 and electric capacity C4.
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CN105404199A (en) * 2015-11-12 2016-03-16 中国南方电网有限责任公司 Self-detection circuit for implementing digital input circuit based on pulse injection method
CN109541343B (en) * 2018-11-16 2021-02-09 陕西千山航空电子有限责任公司 Self-detection method of discrete magnitude output interface
CN113742124B (en) * 2021-08-25 2024-02-13 河南源网荷储电气研究院有限公司 Intelligent IO (input/output) self-checking method and system based on CAN (controller area network) bus
CN114257185A (en) * 2021-12-23 2022-03-29 四川灵通电讯有限公司 Radio frequency channel real-time protection and distortion-free transmission circuit suitable for ultrashort wave frequency band and configuration method thereof
CN116754931A (en) * 2023-08-16 2023-09-15 新誉集团有限公司 Self-checking method and self-checking circuit for digital input loop

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101964653A (en) * 2009-07-24 2011-02-02 南京南瑞继保电气有限公司 Switching value input circuit
CN101963951A (en) * 2009-07-24 2011-02-02 南京南瑞继保电气有限公司 Switching value signal processing method
CN202002968U (en) * 2010-11-25 2011-10-05 湖州电力局 Electronic lightning stroke times collecting system of lightning arrester
JP4848096B2 (en) * 2001-05-29 2011-12-28 日本高圧電気株式会社 Fault location method and apparatus for high voltage distribution lines
WO2014146680A1 (en) * 2013-03-18 2014-09-25 Aktiebolaget Skf Sensor self-test

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4848096B2 (en) * 2001-05-29 2011-12-28 日本高圧電気株式会社 Fault location method and apparatus for high voltage distribution lines
CN101964653A (en) * 2009-07-24 2011-02-02 南京南瑞继保电气有限公司 Switching value input circuit
CN101963951A (en) * 2009-07-24 2011-02-02 南京南瑞继保电气有限公司 Switching value signal processing method
CN202002968U (en) * 2010-11-25 2011-10-05 湖州电力局 Electronic lightning stroke times collecting system of lightning arrester
WO2014146680A1 (en) * 2013-03-18 2014-09-25 Aktiebolaget Skf Sensor self-test

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
直流系统接地对保护控制及开关量输入回路的影响分析;聊方伦;《浙江电力》;20121231(第8期);第21-24页 *
继电保护相关二次回路的在线状态检测技术;叶远波 等;《电力系统自动化》;20141210;第38卷(第23期);第108-113页 *

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