CN105336703B - A kind of production method of semiconductor devices - Google Patents
A kind of production method of semiconductor devices Download PDFInfo
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- CN105336703B CN105336703B CN201410387764.0A CN201410387764A CN105336703B CN 105336703 B CN105336703 B CN 105336703B CN 201410387764 A CN201410387764 A CN 201410387764A CN 105336703 B CN105336703 B CN 105336703B
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Abstract
The present invention provides a kind of production method of semiconductor devices, including：Semiconductor substrate is provided, grid oxic horizon is formed in the semiconductor substrate surface, is formed with grid on the grid oxic horizon, hard mask layer is formed in the top surface of the grid, wherein being formed with natural oxidizing layer on the surface of the hard mask layer；The natural oxidizing layer is completely removed using hydrofluoric acid solution pickling；The hard mask layer is removed using the old liquid of phosphoric acid, while silicon oxide layer is formed on the grid oxic horizon.According to the method for the present invention, the natural oxidizing layer in hard mask surface can be effectively removed, while carrying out the removal of silicon oxynitride hard mask film layer using the old acid of phosphoric acid simultaneously, silicon oxide layer is formd on the grid oxic horizon of grid both sides again, thickness of grid oxide layer is set not change, be conducive to control the depth of ion implanting, and then improve the yield and electric property of device.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of production method of semiconductor devices.
Background technology
In chip manufacturing flow, the forming process of grid is mostly important link, the existing technique step for forming grid
Suddenly include：Etching polysilicon, SiON hard mask layers surface natural oxidizing layer (SiO2) and SION removal, source-drain electrode LDD ions
Injection.
Wherein using the method for HF solution pickling, the time is 3 seconds, be can remove for the removal of SiON surface oxide layersThickness
Silica.By the step, the thick grid oxygen of grid both sides and the thickness of thin grid oxygen can also loseAnd for later stage ion
Injection processing procedure is smoothed out, and needs to retain depth of the certain thickness silica for source-drain electrode LDD ion implantings after controlling
Degree.The thickness must accurately control, and otherwise can influence the electric property for injecting depth and chip.Wherein the removal of SiON is to use
The method of phosphoric acid pickling, due to phosphoric acid have SiON silica is up to 40 to 1 etching selectivity, removal SiON it
Before, it is necessary to the natural oxidizing layer on the surfaces SiON is first removed with HF, otherwise remaining natural oxidizing layer will hinder SiON to be connect with phosphoric acid
It touches, SiON will be unable to be removed completely.However natural oxidizing layer can not be completely removed using existing process conditions, cause
The appearance of SiON residue problems.
Therefore, in order to solve the above-mentioned technical problem, it is necessary to propose a kind of production method of new semiconductor devices.
Invention content
A series of concept of reduced forms is introduced in Summary, this will in the detailed description section into
One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection domain for attempting to determine technical solution claimed more.
In order to overcome the problems, such as presently, there are, the present invention provides a kind of production method of semiconductor devices, including：
Semiconductor substrate is provided, grid oxic horizon is formed in the semiconductor substrate surface, on the grid oxic horizon
It is formed with grid, hard mask layer is formed in the top surface of the grid, wherein being formed with nature on the surface of the hard mask layer
Oxide layer；
The natural oxidizing layer is completely removed using hydrofluoric acid solution pickling；
The hard mask layer is removed using the old liquid of phosphoric acid, while being exposed using the silicon oxygen bond contained in the old liquid of the phosphoric acid
The grid oxic horizon on form silicon oxide layer.
Optionally, the time of the hydrofluoric acid solution pickling is 6~10 seconds.
Optionally, while completely removing the natural oxidizing layer using hydrofluoric acid solution pickling, the grid two is caused
The grid oxic horizon loss amount that side exposes reaches
Optionally, a concentration of HF of the hydrofluoric acid solution:H2O=1:100, wherein the HF that HF is 49%.
Optionally, the old acid of the phosphoric acid is the phosphoric acid that service life reaches 1000 or more.
Optionally, the thickness of the silicon oxide layer is 5 angstroms.
Optionally, the grid oxic horizon is silica, and the grid is polysilicon gate, the material of the hard mask layer
For SiON.
Optionally, further include carrying out source-drain electrode LDD ions after the step of removing the hard mask layer using the old liquid of phosphoric acid
The step of injection.
Optionally, the semiconductor devices is dual gate oxide device.
Optionally, the grid oxic horizon includes thick grating oxide layer and thin gate oxide, and the grid includes being formed in institute
The thin grid oxygen grid stated the thick grid oxygen grid on thick grating oxide layer and be formed on the thin gate oxide.
In conclusion according to the method for the present invention, the natural oxidizing layer in hard mask surface can be effectively removed, used simultaneously
While the old acid of phosphoric acid carries out the removal of silicon oxynitride hard mask film layer, oxidation is formd again on the grid oxic horizon of grid both sides
Silicon layer makes thickness of grid oxide layer not change, is conducive to the depth for controlling ion implanting, and then improve the yield of device
And electric property.
Description of the drawings
The following drawings of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing：
Figure 1A -1C is implement the diagrammatic cross-section of obtained device according to the method for the prior art successively；
Fig. 2A -2C illustrate to implement the section of obtained device successively according to the method for exemplary embodiment of the present
Figure；
Fig. 3 is according to the process flow chart of the method for exemplary embodiment of the present successively implementation steps.
Specific implementation mode
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
It should be understood that the present invention can be implemented in different forms, and should not be construed as being limited to propose here
Embodiment.Disclosure will be made thoroughly and complete on the contrary, providing these embodiments, and will fully convey the scope of the invention to
Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in the areas Ceng He may be exaggerated.From beginning to end
Same reference numerals indicate identical element.
It should be understood that when element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " it is other
When element or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or
There may be elements or layer between two parties by person.On the contrary, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " directly
It is connected to " or " being directly coupled to " other elements or when layer, then element or layer between two parties is not present.It should be understood that although can make
Various component, assembly units, area, floor and/or part are described with term first, second, third, etc., these component, assembly units, area, floor and/
Or part should not be limited by these terms.These terms be used merely to distinguish a component, assembly unit, area, floor or part with it is another
One component, assembly unit, area, floor or part.Therefore, do not depart from present invention teach that under, first element discussed below, portion
Part, area, floor or part are represented by second element, component, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... it
On ", " above " etc., herein can for convenience description and being used describe an elements or features shown in figure with
The relationship of other elements or features.It should be understood that other than orientation shown in figure, spatial relationship term intention further includes making
With the different orientation with the device in operation.For example, if the device in attached drawing is overturn, then, it is described as " under other elements
Face " or " under it " or " under it " elements or features will be oriented in other elements or features "upper".Therefore, exemplary art
Language " ... below " and " ... under " it may include upper and lower two orientations.Device can additionally be orientated (be rotated by 90 ° or its
It is orientated) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limitation of the present invention.Make herein
Used time, " one " of singulative, "one" and " described/should " be also intended to include plural form, unless context is expressly noted that separately
Outer mode.It is also to be understood that term " composition " and/or " comprising ", when being used in this specification, determines the feature, whole
The presence of number, step, operations, elements, and/or components, but be not excluded for one or more other features, integer, step, operation,
The presence or addition of component, assembly unit and/or group.Herein in use, term "and/or" includes any of related Listed Items and institute
There is combination.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to illustrate proposition of the present invention
Technical solution.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention can be with
With other embodiment.
The grid manufacturing process of existing dual gate oxide device is described below with reference to Figure 1A -1C.
First, with reference to figure 1A, semiconductor substrate 100 is provided, is formed in the semiconductor substrate 100 for thickness to be isolated
The fleet plough groove isolation structure 101 of grid oxygen metal-oxide-semiconductor active area and thin grid oxygen metal-oxide-semiconductor active area.In the table of the semiconductor substrate 100
Face forms thick grid oxygen 102a and thin grid oxygen 102b, and deposition forms polysilicon layer in thick grid oxygen and thin grid oxygen, sinks on polysilicon layer
Product forms SiON hard mask layers 104, patterning SiON hard mask layers 104.It is mask with patterned SiON hard mask layers 104,
Polysilicon layer is etched, to form the thick grid oxygen grid 103a being located above thick grid oxygen 102a and the thin grid on thin grid oxygen 102b
Oxygen grid 103b.In addition, since SiON hard mask layers 104 are contacted with air, inevitably in 104 upper table of SiON hard mask layers
Face forms one layer of natural oxidizing layer 105.
With reference to figure 1B, removing natural oxidizing layer 105 is washed away using hydroflouric acid.Wherein, the time of HF solution pickling is 3 seconds,
It can removeThe silica of thickness.Natural oxidizing layer can not be completely removed using existing process conditions, it still can be
Remain natural oxidizing layer on hard mask layer.
With reference to figure 1C, using the method removal SiON hard mask layers 104 of phosphoric acid pickling, since phosphoric acid has SiON to oxidation
Silicon is up to 40 to 1 etching selectivity, therefore before removing SiON hard mask layers 104, it is necessary to first with the surfaces HF removal SiON
Natural oxidizing layer 105, however natural oxidizing layer 105 cannot be completely removed due to prior art condition, remaining nature oxygen
Changing layer will hinder SiON to be contacted with phosphoric acid, and SiON hard mask layers 104 is caused to will be unable to be removed completely.
Presence in view of the above problems, the present invention propose a kind of new production method.
Exemplary embodiment
In the following, with reference to figure 2A-2C by taking the grid manufacturing process of dual gate oxide device as an example, to the production method of the present invention make into
The detailed description of one step.
Dual gate oxide device includes thick grid oxygen metal-oxide-semiconductor and thin grid oxygen metal-oxide-semiconductor.First, as shown in Figure 2 A, semiconductor substrate is provided
200, undoped monocrystalline silicon may be used, doped on the monocrystalline silicon of impurity, insulator in the constituent material of semiconductor substrate 200
Silicon (SSOI), stacking SiGe (S-SiGeOI), germanium on insulator SiClx on insulator are laminated on silicon (SOI), insulator
(SiGeOI) and germanium on insulator (GeOI) etc..As an example, in the present embodiment, the constituent material of semiconductor substrate 200
Select monocrystalline silicon.In the present embodiment, isolation structure 201 is formed in semiconductor substrate 200, for thick grid oxygen metal-oxide-semiconductor to be isolated
Active area and thin grid oxygen metal-oxide-semiconductor active area.In one example, isolation structure 201 be shallow trench isolation (STI) structure or
Person's selective oxidation silicon (LOCOS) isolation structure.In the present embodiment, isolation structure 201 is fleet plough groove isolation structure, semiconductor lining
Various traps (well) structure is also formed in bottom 200, to put it more simply, being omitted in diagram.
Specifically, for the gate structure forming step of dual gate oxide device, with reference to figure 2A, shape on the semiconductor substrate
At thick grating oxide layer 202a and thin gate oxide 202b, any suitable method can be used and form thick grating oxide layer 202a and thin grid
Oxide layer 202b, such as：By thermal oxidation technology thick grating oxide layer is formed in semiconductor substrate surface；In thick grating oxide layer 202a
Coating photoresist is passed sequentially through in region surface, exposure, development step form the photoetching offset plate figure in thick grating oxide layer region；With thickness
The photoetching offset plate figure in the regions gate oxide 202a is mask, removes the thick grid oxygen in the regions thin gate oxide 202b by etching technics
Change layer；Thin gate oxide 202b is formed by thermal oxidation technology again.In one example, the thickness of the thick grating oxide layer 202a
It it is 40~150 angstroms, the thickness of thin gate oxide 202b is 15~50 angstroms.
Thick grid oxygen grid 203a is formed on thick grating oxide layer 202a, and thin grid oxygen is formed on thin gate oxide 202b
Grid 203b.
Specifically, gate material layers are formed on thick grating oxide layer 202a and thin gate oxide 202b, in the grid material
Hard mask layer 204 is formed on the bed of material.Using patterned hard mask layer as mask, etching grid material layer, to form thick grid oxygen grid
Pole 203a and thin grid oxygen grid 203b.Optionally, the material of thick grid oxygen grid 203a and thin grid oxygen grid 203b are polysilicon.
In one example, the material of the hard mask layer 204 is SiN or SiON.Preferably, the material of the hard mask layer 204 is
SiON.In one example, the thickness of the hard mask layer is 300~600 angstroms.
By above-mentioned steps, thick grid oxygen grid 203a is formd on the thick grating oxide layer 202a, and described thin
Thin grid oxygen grid 203b is formd on gate oxide 202b, in the top surface overlying of thick grid oxygen grid 203a and thin grid oxygen grid 203b
It is stamped hard mask layer 204.
Since hard mask layer 204 is contacted with air, inevitably one layer of natural oxygen is formed in 204 upper surface of hard mask layer
Change layer 205.
With reference to figure 2B, natural oxidizing layer 205 is completely removed using hydrofluoric acid solution pickling.
Using the natural oxidizing layer 205 of 204 upper surface of hydrofluoric acid solution pickling removal hard mask layer, in one example,
A concentration of HF of the hydrofluoric acid solution:H2O=1:100, wherein the HF that HF is 49%.Optionally, hydrofluoric acid solution pickling is total
Time is 6~10 seconds, preferably 8 seconds, is increased compared with prior art, the removal ability of silica is increased to
Even if technique fluctuates, removing natural oxidizing layer 205 also can be thoroughly removed.But due to extending pickling time, cause grid two
The thick grating oxide layer 202a and thin gate oxide 202b loss amounts that side exposes reachMore losses compared with prior art
And being smoothed out for later stage ion implantation process, need to retain certain thickness silica for control after
The depth of source-drain electrode LDD ion implantings.The thickness must accurately control, and otherwise can influence the electrical property for injecting depth and chip
Energy.Therefore, thick grating oxide layer 202a and thin gate oxide 202b loss amounts need to be controlled on the 10 Izods right side.
With reference to figure 2C, using the old acid removal hard mask layer 204 of phosphoric acid.
Phosphoric acid has high etching selectivity to silicon oxynitride or silicon nitride, therefore the old acid of phosphoric acid is used to remove the hard mask
Layer 204.Preferably, the old acid of phosphoric acid is the phosphoric acid that service life (lift time) reaches 1000 or more.Optionally,
Phosphoric acid (H3PO4) concentration range be 85%~92%.Preferably, the old acid of phosphoric acid is hot phosphoric acid, its technological temperature is 150
~180 DEG C.It, can be in substrate surface growing silicon oxide, service life due to containing more silicon oxygen bond in the old acid solution of phosphoric acid>
1000 old acid solutions of phosphoric acid can substrate surface (the thick grid oxygen grid 203a that exposes and thin grid oxygen grid 203b's
Surface) form silica.The thickness of the silica wherein formed is aboutThe old sour acid pickling step of phosphoric acid in this way is going to denitrogenate oxygen
While SiClx hard mask layer 204, and it can be formed on the thick grating oxide layer 202a and thin gate oxide 202b of grid both sides
Silicon oxide layer compensates for the excessive loss of silica caused by due to extending the time of hydrofluoric acid pickling, makes the grid of grid both sides
Pole oxidated layer thickness does not change, ensure that its total loss amount existsLeft and right.
Later, further include the steps that carry out source-drain electrode LDD ion implantings, due in step before use phosphoric acid it is old acid into
While the removal of row silicon oxynitride hard mask film layer, silicon oxide layer is formd again on the gate oxide of grid both sides, makes grid
Oxidated layer thickness does not change, therefore is conducive to control the depth of ion implanting.
It is noted that although the present invention is by taking the grid manufacturing process of dual gate oxide device as an example, to the side of the present invention
Method is illustrated, but the method for the present invention is applicable not only to dual gate oxide device, applies also for the grid of any semiconductor devices
Manufacturing process, for example, NMOS or PMOS transistor grid manufacturing process etc..
In conclusion according to the method for the present invention, the natural oxidizing layer in hard mask surface can be effectively removed, used simultaneously
While the old acid of phosphoric acid carries out the removal of silicon oxynitride hard mask film layer, oxidation is formd again on the grid oxic horizon of grid both sides
Silicon layer makes thickness of grid oxide layer not change, is conducive to the depth for controlling ion implanting, and then improve the yield of device
And electric property.
With reference to Fig. 3, the flow chart for the step of method according to an exemplary embodiment of the present invention is implemented successively is shown,
Flow for schematically illustrating entire manufacturing process.
In step 301, semiconductor substrate is provided, grid oxic horizon is formed in the semiconductor substrate surface, described
It is formed with grid on grid oxic horizon, hard mask layer is formed in the top surface of the grid, wherein the surface of the hard mask layer
On be formed with natural oxidizing layer；
In step 302, the natural oxidizing layer is completely removed using hydrofluoric acid solution pickling；
In step 303, the hard mask layer is removed using the old liquid of phosphoric acid, while oxygen is formed on the grid oxic horizon
SiClx layer.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
The purpose of citing and explanation, and be not intended to limit the invention within the scope of described embodiment.In addition people in the art
It is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of member
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (10)
1. a kind of production method of semiconductor devices, including：
Semiconductor substrate is provided, grid oxic horizon is formed in the semiconductor substrate surface, is formed on the grid oxic horizon
There is grid, hard mask layer is formed in the top surface of the grid, wherein being formed with autoxidation on the surface of the hard mask layer
Layer；
The natural oxidizing layer is completely removed using hydrofluoric acid solution pickling；
The hard mask layer is removed using the old liquid of phosphoric acid, at the same using the silicon oxygen bond contained in the old liquid of the phosphoric acid exposing institute
It states and forms silicon oxide layer on grid oxic horizon.
2. according to the method described in claim 1, it is characterized in that, the time of the hydrofluoric acid solution pickling is 6~10 seconds.
3. according to the method described in claim 1, it is characterized in that, completely removing the natural oxygen using hydrofluoric acid solution pickling
While changing layer, the grid oxic horizon loss amount that the grid exposed at both sides goes out is caused to reach
4. according to the method described in claim 1, it is characterized in that, a concentration of HF of the hydrofluoric acid solution:H2O=1:100,
Wherein, the HF that HF is 49%.
5. according to the method described in claim 1, it is characterized in that, the old acid of the phosphoric acid is that service life reaches 1000 or more
Phosphoric acid.
6. according to the method described in claim 1, it is characterized in that, the thickness of the silicon oxide layer is 5 angstroms.
7. according to the method described in claim 1, it is characterized in that, the grid oxic horizon is silica, the grid is more
The material of polysilicon gate, the hard mask layer is SiON.
8. according to the method described in claim 1, it is characterized in that, the step of removing the hard mask layer using the old liquid of phosphoric acid
Afterwards, further include the steps that carrying out source-drain electrode LDD ion implantings.
9. according to the method described in claim 1, it is characterized in that, the semiconductor devices is dual gate oxide device.
10. according to the method described in claim 1, it is characterized in that, the grid oxic horizon includes thick grating oxide layer and thin grid
Oxide layer, the grid include the thick grid oxygen grid being formed on the thick grating oxide layer and are formed on the thin gate oxide
Thin grid oxygen grid.
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Families Citing this family (3)
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| CN110660780A (en) * | 2019-09-19 | 2020-01-07 | 大同新成新材料股份有限公司 | Process for forming nitride semiconductor device |
| CN113643969B (en) * | 2021-07-27 | 2024-01-19 | 上海华力集成电路制造有限公司 | Method for improving corrosion of high-K dielectric gate by optimizing polysilicon etching |
| CN115132570B (en) * | 2022-09-01 | 2022-11-25 | 睿力集成电路有限公司 | Processing method and device for semiconductor structure |
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| US3674551A (en) * | 1970-10-12 | 1972-07-04 | Rca Corp | Formation of openings in insulating layers in mos semiconductor devices |
| CN1933113A (en) * | 2005-09-15 | 2007-03-21 | 中芯国际集成电路制造(上海)有限公司 | Integrated technology process for forming silicon germanium source-drain structure |
| CN101202250A (en) * | 2006-12-15 | 2008-06-18 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor memory and method for forming same |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US8017027B2 (en) * | 2008-09-02 | 2011-09-13 | Hejian Technology (Suzhou) Co., Ltd. | Semiconductor fabricating process |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3674551A (en) * | 1970-10-12 | 1972-07-04 | Rca Corp | Formation of openings in insulating layers in mos semiconductor devices |
| CN1933113A (en) * | 2005-09-15 | 2007-03-21 | 中芯国际集成电路制造(上海)有限公司 | Integrated technology process for forming silicon germanium source-drain structure |
| CN101202250A (en) * | 2006-12-15 | 2008-06-18 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor memory and method for forming same |
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