CN105319997B - The circuit of adaptive operation control frequency - Google Patents

The circuit of adaptive operation control frequency Download PDF

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Publication number
CN105319997B
CN105319997B CN201410239688.9A CN201410239688A CN105319997B CN 105319997 B CN105319997 B CN 105319997B CN 201410239688 A CN201410239688 A CN 201410239688A CN 105319997 B CN105319997 B CN 105319997B
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CN
China
Prior art keywords
frequency
circuit
logic circuit
decision logic
primary function
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CN201410239688.9A
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Chinese (zh)
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CN105319997A (en
Inventor
王吉健
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上海华虹集成电路有限责任公司
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Priority to CN201410239688.9A priority Critical patent/CN105319997B/en
Publication of CN105319997A publication Critical patent/CN105319997A/en
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Abstract

The invention discloses a kind of circuit of adaptive operation control frequency, including:One frequency reducing decision logic circuit, according to the voltage instruction signal of input, judges whether frequency reducing condition meets, exports frequency reducing condition judgment result;One keep frequency decision logic circuit, according to the voltage instruction signal of input, judges whether keep frequency condition meets, exports keep frequency condition judgment result;One raising frequency decision logic circuit, according to the voltage instruction signal of input, judges whether raising frequency condition meets, exports raising frequency condition judgment result;One judged result selection circuit, with the frequency reducing decision logic circuit, keep frequency decision logic circuit, raising frequency decision logic circuit is connected, and according to above-mentioned judged result, frequency control signal is produced, for controlling the clock frequency of the primary function circuit.The present invention can be according to power supply capacity and the power consumption situation of primary function circuit, the adaptive operation clock frequency for adjusting primary function circuit.

Description

The circuit of adaptive operation control frequency

Technical field

The present invention relates to a kind of circuit of adaptive operation control frequency.

Background technology

When circuit is run, its power consumption is directly proportional to the scale and working frequency of working portion in circuit.Due to different behaviour Operating circuit scale corresponding to work is different with frequency, and the power consumption of circuit is just different.In addition, when circuit is non-active operation, i.e., it is electric Energy needed for the work of road is not the power supply carried by it, but when obtained from the electromagnetic field received, because electromagnetism Field intensity is very big with distance change, so when distance changes over time, the power supply of circuit will change over time.

Typically there is storage capacitor on the power supply of circuit, when the power supply of circuit is more than power consumption, storage capacitor can store necessarily The electric energy of amount;When the power supply of circuit is less than power consumption, inadequate electric energy just obtains from storage capacitor.With the energy storage on power supply The discharge and recharge of electric capacity, the voltage of power supply can be varied from, and when charging, voltage can raise, and during electric discharge, voltage can reduce.If In a period of time, power supply is not enough to bear all the time the power consumption of circuit consumption, causes storage capacitor discharging always, then power supply electricity Pressure will reduce always, when voltage it is low to a certain extent when, circuit will power down, it is impossible to normal work.

The value of supply voltage can be detected with the circuit of a detection voltage, so as to provide voltage instruction signal, due to The circuit of detection voltage has certain delay, so the relatively current supply voltage of voltage instruction signal has certain hysteresis, and And this hysteresis is according to the different and different of the factors such as technique, temperature, magnitude of voltage to be detected.

Digital circuits section in circuit, particularly circuit, power consumption when it runs are generally concentrated at the list of work clock Near, and in the other time section of this work period, power consumption can be very low.In the circuit of actual design, generally, Along within the neighbouring period, power supply is not enough to bear power consumption work clock list.At this moment, week will be presented in the voltage on power supply The change of phase property.Its periodicity is shown as, and near, supply voltage can reduce the list of clock at work, and in the work period In other time section, supply voltage can raise because of the reduction of circuit power consumption.

The content of the invention

, can be according to power supply the technical problem to be solved in the present invention is to provide a kind of circuit of adaptive operation control frequency The power consumption situation of ability and primary function circuit, the adaptive operation clock frequency for adjusting primary function circuit.

In order to solve the above technical problems, the circuit of the adaptive operation control frequency of the present invention, including:

One frequency reducing decision logic circuit, according to the voltage instruction signal of the reflection primary function circuit operating voltage of input, sentence Whether disconnected frequency reducing condition meets, exports frequency reducing condition judgment result;

One keep frequency decision logic circuit, indicate to believe according to the voltage of the reflection primary function circuit operating voltage of input Number, judge whether keep frequency condition meets, export keep frequency condition judgment result;

One raising frequency decision logic circuit, according to the voltage instruction signal of the reflection primary function circuit operating voltage of input, sentence Whether disconnected raising frequency condition meets, exports raising frequency condition judgment result;

One judged result selection circuit, with the frequency reducing decision logic circuit, keep frequency decision logic circuit, raising frequency is sentenced Disconnected logic circuit is connected, and according to above-mentioned judged result, produces frequency control signal, for control the primary function circuit when Clock frequency;

The raising frequency decision logic circuit is made up of short-term condition judgment logic circuit and long-term conditions decision logic circuit; The short-term condition judgment logic circuit judges whether the short-term condition of raising frequency meets, the long-term conditions decision logic circuit is sentenced Whether the long-term conditions of disconnected raising frequency meet that, when the two raising frequency conditions meet simultaneously, raising frequency decision logic circuit is just thought to rise Frequency condition meets;

It is short for judging to sample N number of voltage instruction signal using Ts as the sampling period for the short-term condition judgment logic circuit Whether phase condition meets that short-term condition refers to, in N number of voltage instruction signal, has more than or equal to M sampled value for top grade, and And in no one of N number of sampled value be low grade, wherein Ts be positive number, and N is the integer more than 0, and Ts be multiplied by N result it is small In the current operating cycle equal to primary function circuit, M is the integer more than 0 and less than or equal to N;

The long-term conditions refer to that for the judged result of continuous L short-term conditions all to meet, wherein L is whole more than 0 Number.

The present invention can be attached in primary function circuit, and by the voltage instruction signal in primary function circuit, (i.e. voltage refers to Indicating will) reflect the contrast situation of power supply capacity and primary function circuit power consumption, the value of voltage instruction signal forms raising frequency condition, Keep frequency condition and frequency reducing condition;The judged result whether judged result selection circuit meets according to these three conditions in real time To adjust the running frequency of primary function circuit.

The present invention can be according to power supply capacity and the power consumption situation of primary function circuit, the adaptive fortune for adjusting primary function circuit Row clock frequency;In the case that power supply capacity is not enough to bear primary function circuit power consumption, reduces it and run clock frequency, so as to Reduce its power consumption, prevent primary function circuit due to electricity shortage lower electricity;After power supply capacity is enough, then recover function of tonic chord electricity The operation clock frequency on road.

The present invention is especially suitable for the power consumption of the power supply of circuit or consumption with time or the occasion of operation change.

Brief description of the drawings

The present invention is further detailed explanation with embodiment below in conjunction with the accompanying drawings:

Fig. 1 is the example structure figure of circuit one of the adaptive operation control frequency;

Fig. 2 is the connection diagram of circuit in systems shown in Fig. 1.

Embodiment

Referring to Fig. 1, and with reference to shown in Fig. 2, the circuit of the adaptive operation control frequency, including:One frequency reducing judges to patrol Collect circuit, a keep frequency decision logic circuit, a raising frequency decision logic circuit, with the frequency reducing decision logic circuit, holding The judged result selection circuit that frequency decision logic circuit is connected with raising frequency decision logic circuit.Voltage instruction in Fig. 1 Mark (i.e. voltage instruction signal) comes from the voltage detecting circuit in Fig. 2, reflects the size of primary function circuit operating voltage; Voltage instruction signal can be divided into height during specific implementation, in, low 3 grades;Each grade of concrete numerical value scope, can be according to specific Application be configured.

The circuit of the adaptive operation control frequency is according to the voltage instruction signal of primary function circuit, its work of adjust automatically Working frequency, when voltage instruction signal is low, the operation clock frequency of primary function circuit is reduced, so as to reduce its power consumption, makes electricity Storage capacitor on source can charge, and supply voltage can raise;When voltage instruction signal is high, then lift primary function circuit Working frequency.Primary function circuit can thus be operated in most fast working frequency on the premise of not power down.

When voltage instruction signal for it is low-grade when, now already close to primary function circuit energy normal work needed for minimum voltage , in order that circuit not power down, it is necessary to reduce working frequency at once.This function by the frequency reducing decision logic circuit realiration, Corresponding frequency reducing condition is exactly that voltage instruction signal is low grade.

Voltage instruction signal sets middle-grade, and this is to prevent such a case:It is low if only high without middle-grade If two grades, when voltage is near height, low two grades of border, voltage instruction signal is frequently in height, and low grade change, this can be caused The frequent lifting of working frequency.In order to avoid such case, there is provided middle-grade, when voltage instruction signal is in middle-grade, keeps work Working frequency is constant, plays hysteresis.This function is by the keep frequency decision logic circuit realiration, and corresponding holding condition is just It is that voltage instruction signal is middle-grade.

When voltage instruction signal is high-grade, raising frequency can be attempted.But after raising frequency, the power consumption increase of circuit is possible to The acceleration of voltage, which can be caused, to be reduced, along with voltage instruction signal relative to current power voltage has certain hysteresis, it is possible to make Also have little time to produce low-grade mark into voltage detecting circuit, voltage just has already decreased to circuit cisco unity malfunction.So not Working frequency can be raised rashly, and rise frequency needs to pass through stricter condition inspection.The adaptive operation control frequency Circuit employ long-term and short-term two conditions.

When it is implemented, the raising frequency decision logic circuit is judged using short-term condition judgment logic circuit and long-term conditions Logic circuit is formed;The short-term condition judgment logic circuit judges whether the short-term condition of raising frequency meets, the long-term bar Whether the long-term conditions of part decision logic circuit judges raising frequency meet that, when the two raising frequency conditions meet simultaneously, raising frequency judges Logic circuit just thinks that raising frequency condition meets;

It is short for judging to sample N number of voltage instruction signal using Ts as the sampling period for the short-term condition judgment logic circuit Whether phase condition meets that short-term condition refers to, in N number of voltage instruction signal, has more than or equal to M sampled value for top grade, and And in no one of N number of sampled value be low grade, wherein Ts be positive number, and N is the integer more than 0, and Ts be multiplied by N result it is small In the current operating cycle equal to primary function circuit, M is the integer more than 0 and less than or equal to N;

The long-term conditions refer to that for the judged result of continuous L short-term conditions all to meet, wherein L is whole more than 0 Number.

Because generally, the power consumption of circuit concentrates on single edge of work clock, so supply voltage value is with work frequency Rate periodically changes.The short-term condition just checks in such a period of change whether voltage can recover.Due to voltage Indication signal has certain hysteresis, and this is lagged according to the different and different of the factors such as technique, temperature, magnitude of voltage, can not be true The time point for knowing that the cycle starts is cut, so can detection voltage recover this function in design just with one change week of detection In period contained by phase, if there is enough voltage to be designated as logic as top grade to realize.Specific implementation can be by rising Short-term condition judgment logic circuit in frequency decision logic circuit is realized.

The power consumption of power supply and its consumption due to circuit can change with time and concrete operations, so the raising frequency is sentenced Disconnected logic circuit has also checked for long-term conditions, come wrong raising frequency caused by preventing low power consumption operation in the short time or high power supply. The long-term conditions that the raising frequency decision logic circuit uses are exactly all short-term condition judgment results in requirement certain period of time All it is to meet condition.

Finally, according to frequency reducing, the judged result of keep frequency and raising frequency condition, the FREQUENCY CONTROL for selecting to export to the end Signal.When being met due to frequency reducing condition, it is corresponding may at once will power down situation, so it is most urgent, priority comes most It is high;Because raising frequency is risky, so raising frequency should most with caution, then its priority just comes minimum.The judged result choosing Select circuit realiration is exactly this logic.

If frequency reducing condition meets, the judged result selection circuit, which produces, reduces primary function circuit operation clock frequency Frequency control signal;If keep frequency condition meets, the judged result selection circuit, which produces, runs primary function circuit Clock frequency keeps constant frequency control signal;If meeting raising frequency condition, the judged result selection circuit, which then produces, to be made Primary function circuit runs the elevated frequency control signal of clock frequency.

The present invention is described in detail above by embodiment, is not departing from the situation of the principle of the invention Under, those skilled in the art can also make many modification and improvement, and these also should be regarded as protection scope of the present invention.

Claims (5)

  1. A kind of 1. circuit of adaptive operation control frequency, it is characterised in that including:
    One frequency reducing decision logic circuit, according to the voltage instruction signal of the reflection primary function circuit operating voltage of input, judge to drop Whether frequency condition meets, exports frequency reducing condition judgment result;
    One keep frequency decision logic circuit, according to the voltage instruction signal of the reflection primary function circuit operating voltage of input, sentence Whether disconnected keep frequency condition meets, exports keep frequency condition judgment result;
    One raising frequency decision logic circuit, according to the voltage instruction signal of the reflection primary function circuit operating voltage of input, judge to rise Whether frequency condition meets, exports raising frequency condition judgment result;
    One judged result selection circuit, with the frequency reducing decision logic circuit, keep frequency decision logic circuit, raising frequency judges to patrol Collect circuit to be connected, according to above-mentioned judged result, produce frequency control signal, for controlling the clock frequency of the primary function circuit Rate;
    The raising frequency decision logic circuit is made up of short-term condition judgment logic circuit and long-term conditions decision logic circuit;It is described Short-term condition judgment logic circuit judges whether the short-term condition of raising frequency meets, the long-term conditions decision logic circuit judges liter Whether the long-term conditions of frequency meet that, when the two raising frequency conditions meet simultaneously, raising frequency decision logic circuit just thinks raising frequency bar Part meets;
    The short-term condition judgment logic circuit samples N number of voltage instruction signal and is used to judge short-term bar using Ts as the sampling period Whether part meets that short-term condition refers to, in N number of voltage instruction signal, has more than or equal to M sampled value for top grade, and in N No one of individual sampled value is low grade, and wherein Ts be positive number, and N is the integer more than 0, and Ts be multiplied by N result less than etc. In the current operating cycle of primary function circuit, M is the integer more than 0 and less than or equal to N;
    The long-term conditions refer to that for the judged result of continuous L short-term conditions all to meet, wherein L is the integer more than 0.
  2. 2. the circuit of adaptive operation control frequency as claimed in claim 1, it is characterised in that:The voltage instruction signal point For height, in, low 3 grades;Each grade of concrete numerical value scope, it is configured according to specific application.
  3. 3. the circuit of adaptive operation control frequency as claimed in claim 2, it is characterised in that:The keep frequency judges to patrol Circuit is collected, when voltage instruction signal is middle-grade, then it is assumed that keep frequency condition meets.
  4. 4. the circuit of adaptive operation control frequency as claimed in claim 2, it is characterised in that:The frequency reducing decision logic electricity Road, when voltage instruction signal is low-grade, then it is assumed that frequency reducing condition meets.
  5. 5. the circuit of adaptive operation control frequency as claimed in claim 1, it is characterised in that:The judged result selection electricity Road, first determines whether frequency reducing condition meets, if it is satisfied, then producing the frequency for reducing primary function circuit operation clock frequency Control signal;Then judge whether keep frequency condition meets, if it is satisfied, then producing makes primary function circuit run clock frequency Keep constant frequency control signal;Finally judge whether raising frequency condition meets, if it is satisfied, then producing transports primary function circuit The elevated frequency control signal of row clock frequency.
CN201410239688.9A 2014-05-30 2014-05-30 The circuit of adaptive operation control frequency CN105319997B (en)

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CN201410239688.9A CN105319997B (en) 2014-05-30 2014-05-30 The circuit of adaptive operation control frequency

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Application Number Priority Date Filing Date Title
CN201410239688.9A CN105319997B (en) 2014-05-30 2014-05-30 The circuit of adaptive operation control frequency

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CN105319997B true CN105319997B (en) 2018-02-13

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101098104A (en) * 2006-06-27 2008-01-02 中兴通讯股份有限公司 Device for optimizing charge pump of integrated circuit and method therefor
CN102082570A (en) * 2010-12-03 2011-06-01 华为技术有限公司 Clock circuit and method for providing clock signal
CN102082506A (en) * 2010-12-22 2011-06-01 复旦大学 Clock frequency selection circuit suitable for switching power converter
CN102968655A (en) * 2011-08-31 2013-03-13 北京中电华大电子设计有限责任公司 Operating frequency adjusting method and circuit for contactless card chip

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100471181B1 (en) * 2002-08-20 2005-03-10 삼성전자주식회사 Integrated circuit device capable of optimizing operating performance according to consumed power
KR100510535B1 (en) * 2003-07-10 2005-08-26 삼성전자주식회사 Oscillator for changing frequency of output signal in inversely proportional to power source voltage
GB201003030D0 (en) * 2010-02-23 2010-04-07 Icera Inc Digital frequency locked loop

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101098104A (en) * 2006-06-27 2008-01-02 中兴通讯股份有限公司 Device for optimizing charge pump of integrated circuit and method therefor
CN102082570A (en) * 2010-12-03 2011-06-01 华为技术有限公司 Clock circuit and method for providing clock signal
CN102082506A (en) * 2010-12-22 2011-06-01 复旦大学 Clock frequency selection circuit suitable for switching power converter
CN102968655A (en) * 2011-08-31 2013-03-13 北京中电华大电子设计有限责任公司 Operating frequency adjusting method and circuit for contactless card chip

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