CN105316767B - Super large-scale integration silicon wafer and its manufacturing method, application - Google Patents
Super large-scale integration silicon wafer and its manufacturing method, application Download PDFInfo
- Publication number
- CN105316767B CN105316767B CN201510307181.7A CN201510307181A CN105316767B CN 105316767 B CN105316767 B CN 105316767B CN 201510307181 A CN201510307181 A CN 201510307181A CN 105316767 B CN105316767 B CN 105316767B
- Authority
- CN
- China
- Prior art keywords
- silicon wafer
- atoms
- silicon
- single crystal
- crystal rod
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
The present invention provides one kind by Czochralski method (Czochralski method, CZ method) super large-scale integration (the Very Large Scale Integrated circuits that is cut into of the silicon single crystal rod that is grown, VLSI silicon wafer and its manufacturing method, application) are used, ensuring that surface layer is flawless simultaneously by adulterating nitrogen, is realizing the innoxious of oxygen precipitate.Silicon wafer preparation method includes: that silicon single crystal rod is made to be cooled to 1100 DEG C ~ 1150 DEG C in crystal pulling furnace, and control cooling velocity is 0.1 DEG C/min ~ 1 DEG C/min, makes the oxygen concentration 5x10 of silicon single crystal rod17atoms/cm3~7x1017atoms/cm3, nitrogen concentration 5x1013atoms/cm3~1x1015atoms/cm3, concentration of carbon 1x1015atoms/cm3~5x1016atoms/cm3；Silicon single crystal rod is fabricated to silicon wafer, in non-active gas in 1150 DEG C ~ 1250 DEG C at a temperature of heat 45 minutes ~ 180 minutes.Gained silicon wafer thickness central oxygen precipitate density is 1x107/cm3~5x108/cm3, the area free from defect of the oxygen precipitate of silicon chip surface is at 15 μm or more.
Description
Technical field
The present invention relates to a kind of super large-scale integration (Very Large Scale Integrated circuits,
VLSI silicon wafer and its manufacturing method, application) are used, is ensuring that surface layer is flawless simultaneously by adulterating nitrogen, is realizing oxygen precipitate
It is innoxious.
Background technique
It is widely used in using the silicon single crystal rod that Czochralski method (Czochralski method, CZ method) makes ultra-large
In the manufacture of integrated circuit silicon wafer.In such silicon single crystal rod, the oxygen brought into during single crystal preparation is with hypersaturated state
In the presence of it can be deposited during subsequent, form oxygen precipitate (oxygen precipitates) in silicon wafer.In recent years
With the raising of electronic component integrated level, silicon wafer quality is also put forward higher requirements, especially for electronic component
Below silicon wafer and its surface and surface in the range of a few micrometers cannot the crystal defects such as aerobic precipitate, lattice defects deposit
?.
N doping is carried out when growing silicon single crystal rod by CZ method, can effectively inhibit cavity blemish or reduces empty ruler
It is very little, effectively lattice defects can be made to disappear by subsequent heat treatment process.In addition, making grid by combination carbon, hydrogen and nitrogen
The method that defect disappears also is applied.
Patent CN101748491A(annealed wafer and the method for preparing annealed wafer) in disclose suction of the N doping to Cu
The manufacturing method of the annealed wafer of miscellaneous effect enhancing, specifically: it in 650 to 800 DEG C of at a temperature of heating nitrogen concentration is 5x1014It arrives
1x1016/cm3, concentration of carbon 1x1015To 5x1016/cm3, oxygen concentration 6x1017To 11x1017/cm3Silicon substrate 4 hours or
For more time, and 1100 to 1250 DEG C at a temperature of argon annealing is carried out to the substrate of heating.Although the patent and the application skill
Art field is identical, is chip manufacturing field, but the patent mainly emphasizes that raw defect is to the gettering of Ni metal in annealing silicon wafer
Ability；The patent nitrogen concentration is higher, improves the difficulty of crystal growth；And its oxygen precipitate density is at 5x108/cm3More than,
So that the mechanical strength of silicon wafer reduces, silicon wafer is caused during manufacturing electronic component to be easy to bend, splintering problem,
Since the oxygen precipitate of this density easily leads to device performance degradation when silicon wafer is applied to power device.
In addition, to be easy to appear the heavy metals such as chromium, iron, nickel and copper miscellaneous for the semiconductor silicon wafer surface portion that silicon single crystal body is cut into
Matter, the characteristic of the device will be destroyed when manufacturing electronic device.So these beavy metal impurities need to be confined to far from the dress
Set the position of active region (i.e. far from surface layer part).Therefore the nondefective zone depth away from semiconductor wafer surface is deeper talked about,
The device of function admirable easy to accomplish, in particular so that the silicon wafer is applied to horizontal type power device of high finished product rate etc. to depth side
It is possibly realized to the widened equipment in barrier layer.
In view of the deficiencies of the prior art, the application provides a kind of super large-scale integration silicon wafer, true by N doping
It protects that surface layer is flawless simultaneously, realizes the innoxious of oxygen precipitate, zero defect layer depth is generated in silicon wafer up to 15um or more
Oxygen precipitate density become 1x107-5x108/cm3, make it possible monocrystalline silicon piece for power device.
Summary of the invention
The object of the present invention is to provide a kind of super large-scale integration silicon wafer and its manufacturing methods, application, are passing through
Doping nitrogen ensures that surface layer is flawless simultaneously, realizes the innoxious of oxygen precipitate.The present invention uses the silicon single crystal rod of CZ method production,
With the oxygen concentration, nitrogen concentration and concentration of carbon of particular range, then to silicon wafer carry out specified conditions heat treatment, realize with
Upper purpose.
Specifically, the present invention provides a kind of manufacturing method of super large-scale integration silicon wafer, comprising: use CZ method
Silicon single crystal rod is prepared, so that silicon single crystal rod is cooled to 1100 DEG C ~ 1150 DEG C in crystal pulling furnace, control cooling velocity is 0.1 DEG C/min
~ 1 DEG C/min, make the oxygen concentration 5x10 of silicon single crystal rod17atoms/cm3~7x1017atoms/cm3, nitrogen concentration be
5x1013atoms/cm3~1x1015atoms/cm3, concentration of carbon 1x1015atoms/cm3~5x1016atoms/cm3；It will be described
Silicon single crystal rod is fabricated to silicon wafer, and in a non-active gas, 45 minutes ~ 180 points are heated at a temperature of 1150 DEG C ~ 1250 DEG C
Clock.
The silicon wafer made by the above manufacturing method, the defect concentration inside the zero defect layer and silicon wafer on surface reach flat
Weighing apparatus makes have oxygen precipitate appropriate inside silicon wafer, realizes the innoxious of oxygen precipitate, and avoid the occurrence of lattice defects,
To make it possible monocrystalline silicon piece for power device.
Further, when carrying out the heat treatment, silicon wafer is inserted at 700 DEG C, takes silicon wafer when cooling to 700 DEG C
Out.
Further, when carrying out the heat treatment, during 700 to 900 DEG C, heating rate is 5-15 DEG C/min；900 arrive
During 1100 DEG C, heating rate is 2-8 DEG C/min；During 1100 to 1250 DEG C, heating rate is 0.5-2 DEG C/min；Cooling speed
Rate is consistent with heating rate.
Further, when carrying out the heat treatment, heat-treating atmosphere be Ar atmosphere, 1200 DEG C at a temperature of keep 1
Hour.
Further, perpendicular type heat-treatment furnace is used when carrying out the heat treatment.
The present invention also provides a kind of super large-scale integration silicon wafer, the silicon single crystal rod for using CZ method to make obtains oxygen
Concentration 5x1017atoms/cm3~7x1017atoms/cm3, nitrogen concentration 5x1013atoms/cm3~1x1015atoms/cm3, concentration of carbon
1x1015atoms/cm3~5x1016atoms/cm3Monocrystalline silicon piece, after being heat-treated, silicon wafer thickness central oxygen precipitate density
For 1x107/cm3~5x108/cm3.The silicon wafer will not have an impact the acting characteristic of power device, and show adequately
Impurity air-breathing, degassing effect.
The present invention also provides a kind of super large-scale integration silicon wafer, the silicon single crystal rod for using CZ method to make obtains oxygen
Concentration 5x1017atoms/cm3~7x1017atoms/cm3, nitrogen concentration 5x1013atoms/cm3~1x1015atoms/cm3, concentration of carbon
1x1015atoms/cm3~5x1016atoms/cm3Monocrystalline silicon piece, after being heat-treated, the oxygen precipitate of silicon chip surface it is intact
Region is fallen at 15 μm or more.Expand horizontal type power device for preparing high finished product rate etc. to depth direction barrier layer
Big equipment is possibly realized.
The present invention also provides a kind of application of super large-scale integration silicon wafer, the silicon wafer is used for power device.
Specific embodiment
The crystal growing furnace of pulling monocrystal silicon rod is general CZ method crystal pulling furnace.To there are many silicon single crystal rod progress N dopings
Mode can dissolve the nitride film on silicon nitride powder or silicon wafer together with raw material, or nitrogen and ammonia is added by gas.Carbon adulterates
It is dissolved together by adding carbon powder or directly carbon plate being put into raw material.Due to the additive amount and monocrystalline silicon of doped chemical
Element doping concentration is closely related in stick, it is therefore desirable to corresponding member in silicon single crystal rod is controlled according to the additive amount of doped chemical
Plain concentration.
The density of microscopic defect regards the intracorporal oxygen concentration of silicon single crystal on the inside of the depth and semiconductor wafer of known nondefective zone
And depending on the cooling rate in nitrogen concentration and single crystal growth process.Therefore, it is controlled using oxygen concentration, nitrogen concentration and cooling rate
Nondefective zone depth and the microscopic defect density of inside.
Oxygen concentration in silicon single crystal rod needs to control in 5x1017atoms/cm3~7x1017atoms/cm3In the range of.Such as
Fruit oxygen concentration is lower than 5x1017atoms/cm3, then the mechanical strength of silicon wafer is low；If oxygen concentration is more than 7x1017atoms/cm3,
Then oxygen precipitate density is higher than 5x10 inside silicon wafer8/cm3, to reduce the mechanical strength of silicon wafer.
Nitrogen concentration in silicon single crystal rod needs to control in 5x1013atoms/cm3~1x1015atoms/cm3In the range of.Such as
Fruit nitrogen concentration is lower than 5x1013atoms/cm3, then the zero defect on surface and the lattice defects from the about 5 μm of depth in surface is not become
Layer, if nitrogen concentration is more than 1x1015atoms/cm3, then oxygen precipitate density is higher than 5x10 inside silicon wafer8/cm3, to reduce silicon
The mechanical strength of piece.
Concentration of carbon in silicon single crystal rod needs to control in 1x1015atoms/cm3~5x1016atoms/cm3In the range of.Such as
Fruit concentration of carbon is lower than 1x1015atoms/cm3, then it is needed using the single crystal growing furnace of CZ farads of silicon single crystal rods processed using special material,
To be unfavorable for controlling manufacturing cost；If concentration of carbon is more than 5x1016atoms/cm3, then oxygen precipitate density is high inside silicon wafer
In 5x108/cm3, to reduce the mechanical strength of silicon wafer.
When preparing silicon single crystal rod using CZ method, silicon single crystal rod is cooled to 1100 DEG C ~ 1150 DEG C in crystal pulling furnace, cooling velocity
It is 0.1 DEG C/min ~ 1 DEG C/min.Silicon single crystal rod is prepared according to the condition, without adding a large amount of nitrogen, can be made in silicon wafer thickness
The oxygen precipitate density of the heart is 1x107/cm3~5x108/cm3, so as to produce high mechanical strength and silicon wafer at low cost.
According to above-mentioned CZ method pulled crystal, after being made into mirror surface silicon wafer by general technique for processing silicon chip, using partly leading
Body manufactures common heat-treatment furnace and is heat-treated.Before heat treatment, need to use ammonia or hydrogen peroxide cleaning silicon chip mirror surface, after cleaning
Silicon chip surface oxidation film and nitride film etc. are no more than 1nm.
When being heat-treated, needing to control heating temperature in non-active gas is 1150 DEG C ~ 1250 DEG C, when heat treatment
Between be 45 minutes ~ 180 minutes.If heating temperature is lower than 1150 DEG C, the grid near silicon chip surface cannot be completely eliminated and lacked
It falls into；If heating temperature is higher than 1250 DEG C, silicon wafer can be made to deform, and increase the risk polluted in heat-treatment furnace.If
Heat treatment time is lower than 45 minutes, then cannot completely eliminate the lattice defects near silicon chip surface；If heat treatment time is higher than
180 minutes, then the lattice defects after being heat-treated near silicon chip surface are eliminated depth and are not changed much, to be unfavorable for control system
Cause this.
When being heat-treated, silicon wafer is inserted at 700 DEG C in furnace, during 700 to 900 DEG C, heating rate is 5-15 DEG C/
min；During 900 to 1100 DEG C, heating rate is 2-8 DEG C/min；During 1100 to 1250 DEG C, heating rate is 0.5-2 DEG C/
min；Rate of temperature fall is consistent with heating rate, by silicon chip extracting when cooling to 700 DEG C.If temperature rate is too fast, silicon
Piece surface is easy to appear sliding and dislocation, is unfavorable for large scale integrated circuit manufacture；If temperature rate is too slow, for silicon wafer
Performance is unfavorable for controlling manufacturing cost without too big improvement.
Non-active gas can select lower-cost Ar gas.Also the gases such as He and Xe can be selected, but will increase production
Cost, and since He thermal conductivity is high, needs heat-treatment furnace to have special construction, and can also greatly increase that silicon wafer is contaminated can
It can property.In addition, the silicon wafer mirror surface roughness after making heat treatment increases if the mixture of oxygen and nitrogen etc. is added in non-active gas
Greatly, so needing to be equipped with Ar purification devices, cleaning box can be set in silicon wafer filling department in furnace in hot place.
Embodiment 1
The silicon single crystal rod of 8 inches of 120 Ω cm of p-type is cultivated using CZ method.Alpha-silicon nitride powders are added in polycrystalline silicon raw material,
Carbon plate is put into after dissolution of raw material and is immersed 10 minutes, oxygen concentration is 6x10 in silicon single crystal rod after crystallization17atoms/cm3, nitrogen is dense
Degree is 2x1014atoms/cm3, concentration of carbon 8x1015atoms/cm3。
The silicon single crystal rod is fabricated to mirror surface silicon wafer, is heat-treated in perpendicular type heat-treatment furnace.Heat-treating atmosphere is Ar
Silicon wafer is inserted by atmosphere when 700 DEG C in furnace, is kept for 1 hour when being warming up to 1200 DEG C, by silicon chip extracting when cooling to 700 DEG C.Tool
The temperature rate of body is shown in Table 1:
| Temperature range | Heating rate | Rate of temperature fall |
| 700℃-900℃ | +10℃/min | -10℃/min |
| 900℃-1100℃ | +5℃/min | -5℃/min |
| 1100℃-1200℃ | +1℃/min | -1℃/min |
Table 1: mirror surface wafer heat temperature rate
The surface defect of the silicon wafer is measured using infrared scanner (Semilab society system), and test result shows the silicon wafer table
Face zero defect until 5 μm.Oxygen precipitate density is measured using Secco etching solution, silicon chip surface does not produce until 15 μm
Raw oxygen precipitate, the oxygen precipitate density at silicon wafer thickness center are 2x107/cm3。
Using MOS diode made of the silicon wafer, minority carrier life time is about 0.3sec, and minority carrier life time does not deteriorate.In addition, being
Slip dislocation situation when investigation heat treatment, high speed insertion extraction experiment at a temperature of carrying out 800 DEG C in perpendicular type heat-treatment furnace are real
Silicon wafer slip dislocation situation is not found according to visually observation after testing.
Embodiment 2
The silicon single crystal rod of 8 inches of 120 Ω cm of p-type is cultivated using CZ method.Alpha-silicon nitride powders are added in polycrystalline silicon raw material,
Carbon plate is put into after dissolution of raw material and is immersed 30 minutes, oxygen concentration is 5.5x10 in silicon single crystal rod after crystallization17atoms/cm3, nitrogen
Concentration is 5x1013atoms/cm3, concentration of carbon 2x1015atoms/cm3。
The silicon single crystal rod is fabricated to mirror surface silicon wafer, mode same as Example 1 is taken to be heat-treated.
The surface defect of the silicon wafer is measured using infrared scanner (Semilab society system), and test result shows the silicon wafer table
Face zero defect until 5 μm.Oxygen precipitate density is measured using Secco etching solution, silicon chip surface does not produce until 15 μm
Raw oxygen precipitate, the oxygen precipitate density at silicon wafer thickness center are 1.5x107/cm3。
Method in the same manner as in Example 1 is taken to test, discovery minority carrier life time does not deteriorate, and does not also find silicon wafer slip dislocation
Situation.
Embodiment 3
The silicon single crystal rod of 8 inches of 120 Ω cm of p-type is cultivated using CZ method.Alpha-silicon nitride powders are added in polycrystalline silicon raw material,
Carbon plate is put into after dissolution of raw material and is immersed 30 minutes, oxygen concentration is 6.5x10 in silicon single crystal rod after crystallization17atoms/cm3, nitrogen
Concentration is 8x1014atoms/cm3, concentration of carbon 4x1016atoms/cm3。
The silicon single crystal rod is fabricated to mirror surface silicon wafer, mode same as Example 1 is taken to be heat-treated.
The surface defect of the silicon wafer is measured using infrared scanner (Semilab society system), and test result shows the silicon wafer table
Face zero defect until 5 μm.Oxygen precipitate density is measured using Secco etching solution, silicon chip surface does not produce until 15 μm
Raw oxygen precipitate, the oxygen precipitate density at silicon wafer thickness center are 4.0x108/cm3。
Method in the same manner as in Example 1 is taken to test, discovery minority carrier life time does not deteriorate, and does not also find silicon wafer slip dislocation
Situation.
Comparative example 1
The silicon single crystal rod of 8 inches of p-types, 120 Ω cm is cultivated using CZ method.Silicon nitride powder is added in polycrystalline silicon raw material
End, the oxygen concentration after crystallization in silicon single crystal rod are 6x1017atoms/cm3, nitrogen concentration 2x1015atoms/cm3, concentration of carbon is
8x1015atoms/cm3。
The silicon single crystal rod is fabricated to mirror surface silicon wafer, mode same as the previously described embodiments is taken to be heat-treated.
The surface defect of the silicon wafer is measured using infrared scanner (Semilab society system), and test result shows the silicon wafer table
Face zero defect until 5 μm.Oxygen precipitate density is measured using Secco etching solution, silicon chip surface does not produce until 12 μm
Raw oxygen precipitate, the oxygen precipitate density at silicon wafer thickness center are 5x109/cm3。
Using MOS diode made of the silicon wafer, minority carrier life time is about 0.02sec, and minority carrier life time deteriorates.In addition,
Slip dislocation situation when being heat-treated for investigation, high speed insertion extraction at a temperature of carrying out 800 DEG C in perpendicular type heat-treatment furnace are tested,
Silicon wafer slip dislocation situation is found according to visually observation after experiment.
Comparative example 2
The silicon single crystal rod of 8 inches of p-types, 120 Ω cm is cultivated using CZ method.Silicon nitride powder is added in polycrystalline silicon raw material
End, the oxygen concentration after crystallization in silicon single crystal rod are 7.5x1017atoms/cm3, nitrogen concentration 8x1014atoms/cm3, concentration of carbon is
4x1016atoms/cm3。
The silicon single crystal rod is fabricated to mirror surface silicon wafer, mode same as Example 1 is taken to be heat-treated.
The surface defect of the silicon wafer is measured using infrared scanner (Semilab society system), and test result shows the silicon wafer table
Face zero defect until 5 μm.Oxygen precipitate density is measured using Secco etching solution, silicon chip surface does not generate until 5 μm
Oxygen precipitate, the oxygen precipitate density at silicon wafer thickness center are 2x1010/cm3。
Using MOS diode made of the silicon wafer, minority carrier life time is about 0.01sec, and minority carrier life time deteriorates.In addition,
Slip dislocation situation when being heat-treated for investigation, high speed insertion extraction at a temperature of carrying out 800 DEG C in perpendicular type heat-treatment furnace are tested,
Silicon wafer slip dislocation situation is found according to visually observation after experiment.
Claims (8)
1. a kind of manufacturing method of super large-scale integration silicon wafer, characterized in that it comprises the following steps:
Silicon single crystal rod is prepared using Czochralski method, wherein using Czochralski method to prepare silicon single crystal rod includes with lower section
Formula:
Nitride film on silicon nitride powder or silicon wafer is dissolved together with raw material, or nitrogen and ammonia, addition carbon powder are added by gas
Carbon plate is put into raw material and dissolves together by end；
Silicon single crystal rod is set to be cooled to 1100 DEG C~1150 DEG C in crystal pulling furnace, control cooling velocity is 0.1 DEG C/min~1 DEG C/minute
Clock makes the oxygen concentration 5x10 of silicon single crystal rod17atoms/cm3~7x1017atoms/cm3, nitrogen concentration 5x1013atoms/cm3
~1x1015atoms/cm3, concentration of carbon 1x1015atoms/cm3~5x1016atoms/cm3；
The silicon single crystal rod is fabricated to silicon wafer, in a non-active gas, heats 45 at a temperature of 1150 DEG C~1250 DEG C
Minute~180 minutes, the silicon wafer thickness central oxygen precipitate density 1.5x10 is made by the heat treatment7/cm3~5x108/
cm3。
2. the manufacturing method of super large-scale integration silicon wafer according to claim 1, which is characterized in that carrying out institute
When stating heat treatment, silicon wafer is inserted at 700 DEG C, by silicon chip extracting when cooling to 700 DEG C.
3. the manufacturing method of super large-scale integration silicon wafer according to claim 1, which is characterized in that carrying out institute
When stating heat treatment, during 700 to 900 DEG C, heating rate is 5-15 DEG C/min；During 900 to 1100 DEG C, heating rate 2-8
℃/min；During 1100 to 1250 DEG C, heating rate is 0.5-2 DEG C/min；Rate of temperature fall is consistent with heating rate.
4. the manufacturing method of super large-scale integration silicon wafer according to claim 1, which is characterized in that carrying out institute
When stating heat treatment, heat-treating atmosphere be Ar atmosphere, 1200 DEG C at a temperature of keep 1 hour.
5. the manufacturing method of super large-scale integration silicon wafer according to claim 1, which is characterized in that carrying out institute
Using perpendicular type heat-treatment furnace when stating heat treatment.
6. a kind of super large-scale integration silicon wafer, which is characterized in that obtained using the silicon single crystal rod that Czochralski method makes
To oxygen concentration 5x1017atoms/cm3~7x1017atoms/cm3, nitrogen concentration 5x1013atoms/cm3~1x1015atoms/cm3、
Concentration of carbon 1x1015atoms/cm3~5x1016atoms/cm3Monocrystalline silicon piece, after being heat-treated, the silicon wafer thickness center
Oxygen precipitate density is 1.5x107/cm3~5x108/cm3；
Wherein, preparing silicon single crystal rod using Czochralski method includes following manner:
Nitride film on silicon nitride powder or silicon wafer is dissolved together with raw material, or nitrogen and ammonia, addition carbon powder are added by gas
Carbon plate is put into raw material and dissolves together by end.
7. super large-scale integration silicon wafer according to claim 6, which is characterized in that described after being heat-treated
The area free from defect of the oxygen precipitate of silicon chip surface is at 15 μm or more.
8. the application of the super large-scale integration silicon wafer of manufacture, the silicon wafer are used for according to the method for claim 1
Power device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510307181.7A CN105316767B (en) | 2015-06-04 | 2015-06-04 | Super large-scale integration silicon wafer and its manufacturing method, application |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510307181.7A CN105316767B (en) | 2015-06-04 | 2015-06-04 | Super large-scale integration silicon wafer and its manufacturing method, application |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105316767A CN105316767A (en) | 2016-02-10 |
| CN105316767B true CN105316767B (en) | 2019-09-24 |
Family
ID=55245046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510307181.7A Active CN105316767B (en) | 2015-06-04 | 2015-06-04 | Super large-scale integration silicon wafer and its manufacturing method, application |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105316767B (en) |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW541581B (en) * | 2001-04-20 | 2003-07-11 | Memc Electronic Materials | Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates |
| CN1489643A (en) * | 2001-01-02 | 2004-04-14 | Memc | Process for preparing single crystal silicon having improved gate oxide integrity |
| CN1155064C (en) * | 1998-09-02 | 2004-06-23 | Memc电子材料有限公司 | Process for preparing ideal oxygen precipitating silicon wafer |
| CN1158696C (en) * | 1997-02-26 | 2004-07-21 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor |
| CN1644767A (en) * | 2004-11-22 | 2005-07-27 | 浙江大学 | Carbon doped silicon sheet with internal impurity absorbing function and production thereof |
| CN1689148A (en) * | 2002-10-08 | 2005-10-26 | 信越半导体株式会社 | Annealed wafer and annealed wafer manufacturing method |
| CN101002310A (en) * | 2004-08-12 | 2007-07-18 | 小松电子金属股份有限公司 | Nitrogen-doped silicon wafer and its manufacturing method |
| CN100345263C (en) * | 2001-12-21 | 2007-10-24 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same |
| CN101360852A (en) * | 2006-01-17 | 2009-02-04 | 信越半导体股份有限公司 | Process for producing silicon single crystal wafer |
| CN101361171A (en) * | 2006-01-17 | 2009-02-04 | 信越半导体股份有限公司 | Method for manufacturing silicon single crystal wafer |
| CN101675507A (en) * | 2007-05-02 | 2010-03-17 | 硅电子股份公司 | Silicon wafer and method for manufacturing the same |
| CN102108549A (en) * | 2009-12-29 | 2011-06-29 | 硅电子股份公司 | Silicon wafer and method for producing the same |
| CN102396055A (en) * | 2009-04-13 | 2012-03-28 | 信越半导体股份有限公司 | Anneal wafer, method for manufacturing anneal wafer, and method for manufacturing device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7201800B2 (en) * | 2001-12-21 | 2007-04-10 | Memc Electronic Materials, Inc. | Process for making silicon wafers with stabilized oxygen precipitate nucleation centers |
| JP5010091B2 (en) * | 2003-11-13 | 2012-08-29 | 株式会社Ｓｕｍｃｏ | High resistance silicon wafer |
-
2015
- 2015-06-04 CN CN201510307181.7A patent/CN105316767B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1158696C (en) * | 1997-02-26 | 2004-07-21 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor |
| CN1155064C (en) * | 1998-09-02 | 2004-06-23 | Memc电子材料有限公司 | Process for preparing ideal oxygen precipitating silicon wafer |
| CN1489643A (en) * | 2001-01-02 | 2004-04-14 | Memc | Process for preparing single crystal silicon having improved gate oxide integrity |
| TW541581B (en) * | 2001-04-20 | 2003-07-11 | Memc Electronic Materials | Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates |
| CN100345263C (en) * | 2001-12-21 | 2007-10-24 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers with nitrogen/carbon stabilized oxygen precipitate nucleation centers and process for making the same |
| CN1689148A (en) * | 2002-10-08 | 2005-10-26 | 信越半导体株式会社 | Annealed wafer and annealed wafer manufacturing method |
| CN101002310A (en) * | 2004-08-12 | 2007-07-18 | 小松电子金属股份有限公司 | Nitrogen-doped silicon wafer and its manufacturing method |
| CN1644767A (en) * | 2004-11-22 | 2005-07-27 | 浙江大学 | Carbon doped silicon sheet with internal impurity absorbing function and production thereof |
| CN101360852A (en) * | 2006-01-17 | 2009-02-04 | 信越半导体股份有限公司 | Process for producing silicon single crystal wafer |
| CN101361171A (en) * | 2006-01-17 | 2009-02-04 | 信越半导体股份有限公司 | Method for manufacturing silicon single crystal wafer |
| CN101675507A (en) * | 2007-05-02 | 2010-03-17 | 硅电子股份公司 | Silicon wafer and method for manufacturing the same |
| CN102396055A (en) * | 2009-04-13 | 2012-03-28 | 信越半导体股份有限公司 | Anneal wafer, method for manufacturing anneal wafer, and method for manufacturing device |
| CN102108549A (en) * | 2009-12-29 | 2011-06-29 | 硅电子股份公司 | Silicon wafer and method for producing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105316767A (en) | 2016-02-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI336499B (en) | ||
| JP5072460B2 (en) | Silicon wafer for semiconductor and manufacturing method thereof | |
| WO2003092065A1 (en) | High resistance silicon wafer and method for production thereof | |
| CN101768777B (en) | Silicon wafer and method of manufacturing the same | |
| KR101020436B1 (en) | Silicon single crystal wafer and manufacturing method thereof | |
| CN106062926B (en) | The preparation method and epitaxial silicon wafer of epitaxial silicon wafer | |
| JP6671436B2 (en) | Fabrication of high precipitation density wafers that activate inert oxygen precipitation nuclei by heat treatment | |
| JP2006312575A (en) | Silicon wafer and its production method | |
| JP5207706B2 (en) | Silicon wafer and manufacturing method thereof | |
| JP2007045662A (en) | Semiconductor silicon wafer and method for manufacturing the same | |
| CN105026624A (en) | Epitaxial silicon wafer and method for manufacturing same | |
| KR20130072144A (en) | Silicon single crystal substrate and method of manufacturing the same | |
| KR20060040733A (en) | Process for producing wafer | |
| JP2008294112A (en) | Silicon single-crystal wafer and method of manufacturing the same | |
| KR100847925B1 (en) | Anneal wafer manufacturing method and anneal wafer | |
| JP4615161B2 (en) | Epitaxial wafer manufacturing method | |
| CN110603350B (en) | Method for producing epitaxial silicon wafer and epitaxial silicon wafer | |
| JP2010287885A (en) | Silicon wafer and method of manufacturing the same | |
| JP5262021B2 (en) | Silicon wafer and manufacturing method thereof | |
| CN105316767B (en) | Super large-scale integration silicon wafer and its manufacturing method, application | |
| CN101165224A (en) | Germanium doping silicon wafer with internal purity absorbing function and preparation method thereof | |
| JP2006040980A (en) | Silicon wafer and its manufacturing method | |
| JP2007242920A (en) | Nitrogen-doped and annealed wafer and method of manufacturing the same | |
| JP4270713B2 (en) | Manufacturing method of silicon epitaxial wafer | |
| JP5207705B2 (en) | Silicon wafer and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| CB02 | Change of applicant information |
Inventor after: Shen Siqing Inventor after: Liu Pufeng Inventor after: Song Hongwei Inventor after: Chen Meng Inventor before: Shen Siqing Inventor before: Yamada Kenji Inventor before: Liu Pufeng Inventor before: Song Hongwei Inventor before: Chen Meng |
|
| COR | Change of bibliographic data | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 201616 No. 1-15, Lane 150, dingsong Road, Songjiang District, Shanghai Patentee after: Shanghai Chaosi Semiconductor Co.,Ltd. Address before: 201604 No. 88, Yangshi Road, Shihudang Town, Songjiang District, Shanghai Patentee before: SHANGHAI ADVANCED SILICON TECHNOLOGY Co.,Ltd. |