CN105282979A - Production method capable of reducing outer-layer circuit defects for flexible printed circuit (FPC) multi-layer board - Google Patents

Production method capable of reducing outer-layer circuit defects for flexible printed circuit (FPC) multi-layer board Download PDF

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Publication number
CN105282979A
CN105282979A CN201510678639.XA CN201510678639A CN105282979A CN 105282979 A CN105282979 A CN 105282979A CN 201510678639 A CN201510678639 A CN 201510678639A CN 105282979 A CN105282979 A CN 105282979A
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CN
China
Prior art keywords
fpc
layer
layer sheet
production
sheet production
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CN201510678639.XA
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Chinese (zh)
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CN105282979B (en
Inventor
吴卫钟
王俊
邹攀
沈雷
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深圳市景旺电子股份有限公司
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Publication of CN105282979A publication Critical patent/CN105282979A/en
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Publication of CN105282979B publication Critical patent/CN105282979B/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047Drilling of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0085Apparatus for treatments of printed circuits with liquids not provided for in groups H05K3/02 - H05K3/46; conveyors and holding means therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Abstract

The invention discloses a production method capable of reducing outer-layer circuit defects for a flexible printed circuit (FPC) multi-layer board. The production method comprises the following steps of A, carrying out electroplating and glue removal after punching of the FPC multi-layer board is completed, fixing the FPC multi-layer board in a hanging basket, firstly, moving the hanging basket to a proportional integral (PI) adjustment cylinder for glue removal treatment, secondly, putting the hanging basket in a wash cylinder for washing by twice, and finally, transferring the hanging basket in a drying cylinder for drying; B, carrying out double-sided board grinding; and C, moving the FPC multi-layer in a drilling chamber for secondary drilling. According to the production method, a glue removal process is added before secondary drilling, the contrast test at the earlier stage and a large amount of data show that the outer-layer circuit defects can be obviously reduced, and the total yield of outer-layer circuit fabrication can be enhanced.

Description

A kind of FPC multi-layer sheet production method reducing outer-layer circuit defect

Technical field

The present invention relates to FPC and manufacture field, particularly relate to a kind of FPC multi-layer sheet production method reducing outer-layer circuit defect.

Background technology

FPC industry competition is more and more fierce, optimizes production procedure, and improving product yield is the long-term important process of of enterprise development, payes attention to flow process details, pursues the objective of the struggle that innovation is technical staff.List/double sided board of the prior art can not meet the demand of client, so multiple-plate demand increases day by day.In FPC multi-layer sheet production process, the yield of outer-layer circuit allows of no optimist, and outer-layer circuit exists the more problem of the defects such as open circuit, short circuit, breach, causes product yield to decline, indirectly adds cost of manufacture.

Therefore, prior art has yet to be improved and developed.

Summary of the invention

In view of above-mentioned the deficiencies in the prior art, the object of the present invention is to provide a kind of FPC multi-layer sheet production method reducing outer-layer circuit defect, be intended to solve the problem that the defects such as open circuit, short circuit, breach easily appear in existing FPC multi-layer sheet.

Technical scheme of the present invention is as follows:

Reduce a FPC multi-layer sheet production method for outer-layer circuit defect, wherein, comprise step:

A, FPC multi-layer sheet, after completing punching, carries out plating except glue:

FPC multi-layer sheet is fixed in Hanging Basket, first sends into PI and adjust cylinder, carry out except glue process, then before and after enter water washing cylinder for twice and carry out washing process, finally send into oven dry cylinder and carry out drying and processing;

B, carry out two sides nog plate process, two sides nog plate;

C, then deliver to boring room carry out secondary drilling.

Described FPC multi-layer sheet production method, wherein, the time except glue process is 5 ~ 8min.

Described FPC multi-layer sheet production method, wherein, the temperature except glue process is 35 ~ 45 DEG C.

Described FPC multi-layer sheet production method, wherein, the time of each washing process is 1 ~ 2min.

Described FPC multi-layer sheet production method, wherein, the time of drying and processing is 8 ~ 12min.

Described FPC multi-layer sheet production method, wherein, the temperature of drying and processing is 85 ~ 95 DEG C.

Described FPC multi-layer sheet production method, wherein, only open 1200# polish-brush during the nog plate process of two sides, electric current is 3.2A.

Beneficial effect: the present invention increases after except glue process before two bore, prove to make outer-layer circuit defect obviously decline by contrast test in earlier stage and mass data, outer-layer circuit makes total yield and gets a promotion.

Accompanying drawing explanation

Fig. 1 is a kind of flow chart reducing the FPC multi-layer sheet production method of outer-layer circuit defect of the present invention.

Embodiment

The invention provides a kind of FPC multi-layer sheet production method reducing outer-layer circuit defect, for making object of the present invention, technical scheme and effect clearly, clearly, the present invention is described in more detail below.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.

Refer to Fig. 1, Fig. 1 is a kind of flow chart reducing the FPC multi-layer sheet production method preferred embodiment of outer-layer circuit defect of the present invention, and as shown in the figure, it comprises step:

S101, FPC multi-layer sheet, after completing punching, carries out plating except glue:

FPC multi-layer sheet is fixed in Hanging Basket, first sends into PI and adjust cylinder, carry out except glue process, then before and after enter water washing cylinder for twice and carry out washing process, finally send into oven dry cylinder and carry out drying and processing;

S102, carry out two sides nog plate process, two sides nog plate;

S103, then deliver to boring room carry out secondary drilling.

The present invention be directed to the short circuit that plate face cull causes to improve, before second time boring, increase except glue process (idiographic flow: Pi adjustment+nog plate), greatly reduce the plate face cull because uncertain factor (as: cull etc. produced in thousand layers of lower process of frame/film/work top/circulation) causes, thus avoid the defect causing line short.

Namely the present invention increases once except glue process on original process base, and the cull in plate face is thoroughly clean as much as possible.Idiographic flow changes as follows: " punching → bis-brill " changes to " punching → plating is except glue (PI adjustment+nog plate) → bis-brill ".

Specifically, FPC multi-layer sheet, after completing punching (8 two for locating are bored T hole, location), delivers to plating except glue process:

Be fixed in Hanging Basket by FPC multi-layer sheet, first send into PI and adjust cylinder, carry out except glue process (PI adjustment), the time except glue process is 5 ~ 8min, and temperature is 35 ~ 45 DEG C.Preferred condition is that temperature is 40 DEG C, and such cull is cleaner by what be eliminated except the time of glue process is 6min.The adhesive remover adjusted in cylinder particular by PI removes glue, and containing potassium permanganate and NaOH in adhesive remover, potassium permanganate concentration is 60 ~ 80g/L, and the concentration of NaOH is 4% ~ 5%(w/w, mass percentage concentration).Best potassium permanganate concentration is 70g/L, and best naoh concentration is 4.5%.Above-mentioned adhesive remover configures by deionized water.The material that PI adjusts cylinder can use stainless steel (SS316).

Except after glue process, wash, washing is carried out at twice, and namely successively to be put in water washing cylinder by FPC multi-layer sheet for twice and wash, each washing time is 1 ~ 2min.Rinsed out fully to make cull and treatment fluid.

Finally send into oven dry cylinder and carry out drying and processing, bake out temperature is 85 ~ 95 DEG C, and drying time is 10min.

Preferred condition is bake out temperature is 90 DEG C.Drying time is 8 ~ 12min, to make oven dry more thorough, and can not impact plate plane materiel matter.

After above-mentioned plating is except glue process, carry out nog plate process, and be two-sided nog plate (i.e. two sides nog plate) process, only open 1200# polish-brush when carrying out two sides nog plate process, electric current is 3.2A.Remove the foreign material oxide on copper face during nog plate, increase the adhesion of copper coin and green oil.The flow process of nog plate comprises successively: pickling, washing, nog plate, inspection, wash, the process such as to dry up.The pickling quality concentration that pickling wherein uses is that 3 ~ 5%(is as 4%), dry up and can adopt 75 ~ 85 DEG C (as 80 DEG C), whole flow process transfer rate is that 1.5 ~ 3.0m/min(is as 2m/min).

Once, thickness of slab variable is between 0.01mil ~ 0.02mil to nog plate, such as, reduce 0.015mil, and when nog plate enters plate, left and right wheels is banished and put, and the distance between the plate of left and right two is that 2 ~ 4cm(is as 3cm).Whether the plate of milled may be dipped in 45s in water, then takes out and becomes miter angle with horizontal plane, park 15s, observe moisture film and break, as broken, then and nog plate poor effect, on the contrary then nog plate effect is better.

In sum, the present invention increases after except glue process before two bore, and prove to make outer-layer circuit defect obviously decline by contrast test in earlier stage and mass data, outer-layer circuit makes total yield and gets a promotion.

Should be understood that, application of the present invention is not limited to above-mentioned citing, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection range that all should belong to claims of the present invention.

Claims (7)

1. can reduce a FPC multi-layer sheet production method for outer-layer circuit defect, it is characterized in that, comprise step:
A, FPC multi-layer sheet, after completing punching, carries out plating except glue:
FPC multi-layer sheet is fixed in Hanging Basket, first sends into PI and adjust cylinder, carry out except glue process, then before and after enter water washing cylinder for twice and carry out washing process, finally send into oven dry cylinder and carry out drying and processing;
B, carry out two sides nog plate process, two sides nog plate;
C, then deliver to boring room carry out secondary drilling.
2. FPC multi-layer sheet production method according to claim 1, is characterized in that, the time except glue process is 5 ~ 8min.
3. FPC multi-layer sheet production method according to claim 1, is characterized in that, the temperature except glue process is 35 ~ 45 DEG C.
4. FPC multi-layer sheet production method according to claim 1, is characterized in that, the time of each washing process is 1 ~ 2min.
5. FPC multi-layer sheet production method according to claim 1, is characterized in that, the time of drying and processing is 8 ~ 12min.
6. FPC multi-layer sheet production method according to claim 1, is characterized in that, the temperature of drying and processing is 85 ~ 95 DEG C.
7. FPC multi-layer sheet production method according to claim 1, is characterized in that, only opens 1200# polish-brush during the nog plate process of two sides, and electric current is 3.2A.
CN201510678639.XA 2015-10-20 2015-10-20 A kind of FPC multilayer plate producing process for reducing outer-layer circuit defect CN105282979B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510678639.XA CN105282979B (en) 2015-10-20 2015-10-20 A kind of FPC multilayer plate producing process for reducing outer-layer circuit defect

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510678639.XA CN105282979B (en) 2015-10-20 2015-10-20 A kind of FPC multilayer plate producing process for reducing outer-layer circuit defect

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CN105282979B CN105282979B (en) 2018-06-08

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102781158A (en) * 2011-05-09 2012-11-14 代芳 PCB (Printed Circuit Board) technology capable of increasing heat dissipation effect
CN102933040A (en) * 2012-10-23 2013-02-13 东莞生益电子有限公司 Method for manufacturing printed circuit board (PCB) with buried inductance device
CN103222351A (en) * 2011-10-25 2013-07-24 建业(惠州)电路版有限公司 Method for metallisation of holes in printed circuit board
CN103945656A (en) * 2013-01-22 2014-07-23 深圳市万泰电路有限公司 Method of manufacturing double-sided aluminum substrate with resin plug holes and counterbore holes

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102781158A (en) * 2011-05-09 2012-11-14 代芳 PCB (Printed Circuit Board) technology capable of increasing heat dissipation effect
CN103222351A (en) * 2011-10-25 2013-07-24 建业(惠州)电路版有限公司 Method for metallisation of holes in printed circuit board
CN102933040A (en) * 2012-10-23 2013-02-13 东莞生益电子有限公司 Method for manufacturing printed circuit board (PCB) with buried inductance device
CN103945656A (en) * 2013-01-22 2014-07-23 深圳市万泰电路有限公司 Method of manufacturing double-sided aluminum substrate with resin plug holes and counterbore holes

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
安徽省节能减排检测信息中心: "《固定资产投资项目能评文件编制实务》", 30 November 2014 *
张怀武: "《现代印制电路原理与工艺》", 31 January 2010 *
杨玉芳: "《电气制图及CAD》", 28 February 2014 *
程婕: "《电子产品制造工程训练》", 31 July 2008 *

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