CN105261396B - A kind of chip and its replacement contrast circuit - Google Patents
A kind of chip and its replacement contrast circuit Download PDFInfo
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- CN105261396B CN105261396B CN201510629555.7A CN201510629555A CN105261396B CN 105261396 B CN105261396 B CN 105261396B CN 201510629555 A CN201510629555 A CN 201510629555A CN 105261396 B CN105261396 B CN 105261396B
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- switch module
- reset signal
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Abstract
The present invention provides a kind of chip and its replacement contrast circuits, and circuit includes: first switch module, and first end is connected with default power supply, and control terminal is connected with comparison reset signal circuit;Second switch module, first end are connected with the second end of first switch module, and control terminal is connected with comparison reset signal circuit;Third switch module, first end ground connection, second end are connected with the second end of second switch module, and control terminal is connected with comparison reset signal circuit;Multiple contrast modules, multiple replacement units of multiple contrast modules and chip correspond, each contrast module includes parasitic capacitance, first end is connected with input address output end, second end is connected with the first end of second switch module and corresponding replacement unit respectively, and third end is connected with the second end of second switch module;Latch is connected with the first end of second switch module and main memory respectively.It is shared the invention can avoid multiple parasitic capacitance charges and latch mistake is caused to overturn.
Description
Technical field
The present invention relates to chip technology fields, replacement contrast circuit and a kind of chip more particularly to a kind of chip.
Background technique
In NAND FLASH chip, (NAND FLASH chip is one kind of FLASH chip, is adopted inside NAND FLASH chip
With non-linear macroelement mode) storage unit might have bad point appearance in manufacturing process, and the storage unit for bad point occur cannot
For storing data, chip interior can be written in test phase in the memory unit address for bad point occur by chip interior.To core
When piece is written and read, the memory unit address of appearance bad point of address that needs can be read and write and record carry out pair
Than.If matched after comparison, the storage unit for bad point occur is replaced with chip interior others storage unit;If comparison
It does not match, then normal operating.After the completion of read-write, last comparing result can be resetted, for next time
Read-write is prepared.
Referring to Fig.1, in the replacement contrast circuit of the relevant technologies, (the comparison reset signal when comparison reset signal is invalid
For high level), the value of latch can be set low;(comparison reset signal is low level), comparison when comparison reset signal is effective
Module can be compared according to the memory unit address of input address and the appearance bad point being written when test, and comparing result determines lock
The value of storage.
The replacement contrast circuits of above-mentioned the relevant technologies the problem is that, contrast module is relatively more, opposite parasitic capacitance
Also bigger, if the memory unit address of input address and the appearance bad point being written when test does not match, latch
Value should not change.But since parasitic capacitance is bigger, the value i.e. latch that can change latch after charge is shared is turned over
Turn, so as to cause the read-write of mistake.
Summary of the invention
In view of the above problems, the embodiment of the invention provides a kind of replacement contrast circuit for the chip for overcoming the above problem and
A kind of corresponding chip.
To solve the above-mentioned problems, the embodiment of the invention discloses a kind of replacement contrast circuits of chip, comprising: first opens
Module is closed, the first end of the first switch module is connected with default power supply, the control terminal and chip of the first switch module
Comparison reset signal circuit be connected;The comparison reset signal circuit evolving compares reset signal;Second switch module, it is described
The first end of second switch module is connected with the second end of the first switch module, the control terminal of the second switch module with
The comparison reset signal circuit is connected;Third switch module, the first end ground connection of the third switch module, the third are opened
Close module second end be connected with the second end of the second switch module, the control terminal of the third switch module with it is described right
It is connected than reset signal circuit;Multiple replacement units of multiple contrast modules, the multiple contrast module and chip correspond,
Each contrast module includes parasitic capacitance, the first end and the input address output end phase of chip of each contrast module
Even, the second end of each contrast module respectively with the first end of the second switch module and the corresponding replacement unit
It is connected, the third end of each contrast module is connected with the second end of the second switch module, believes when the comparison resets
When number invalid, the first switch module, second switch module closure and the third switch module are disconnected, described default
Power supply charges to multiple parasitic capacitances;Latch, the latch respectively with the first end of the second switch module and
The main memory of chip is connected.
Preferably, when the comparison reset signal is effective, the first switch module, the second switch module are disconnected
And the third switch module closure.
Preferably, the first switch module and the second switch module are PMOS tube, and the third switch module is
NMOS tube.
Preferably, when the comparison reset signal is low level, the comparison reset signal is invalid;When the comparison is multiple
When position signal is high level, the comparison reset signal is effective.
Preferably, when the comparison reset signal is high level, the comparison reset signal is invalid;When the comparison is multiple
When position signal is low level, the comparison reset signal is effective.
Preferably, the replacement contrast circuit of chip further include: phase inverter, the phase inverter is resetted with the comparison respectively to be believed
Number circuit, the control terminal of the first switch module, the control terminal of the second switch module and the third switch module
Control terminal is connected, and the phase inverter is used to carry out the comparison reset signal reversed.
To solve the above-mentioned problems, the embodiment of the invention also discloses a kind of chips, comprising: comparison reset signal circuit,
The replacement contrast circuit of input address output end, multiple replacement units, main memory and the chip, the replacement of the chip
Contrast circuit respectively with the comparison reset signal circuit, the input address output end, the multiple replacement unit and described
Main memory is connected.
The embodiment of the present invention includes following advantages: increase second switch module, second switch module respectively with first switch
Module, third switch module with comparison reset signal circuit be connected, and by each contrast module respectively with second switch module
First end and second end is connected, and when comparison reset signal is invalid, first switch module, second switch module closure and third
Switch module disconnects, and default power supply charges to multiple parasitic capacitances.To avoid multiple post when comparison reset signal is effective
Raw capacitance charge is shared and latch mistake is caused to overturn, and greatly improves the accuracy of replacement contrast circuit.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the replacement contrast circuit of the relevant technologies;
Fig. 2 is a kind of structural block diagram of the replacement contrast circuit embodiment of chip of the invention;
Fig. 3 is a kind of structural schematic diagram of the replacement contrast circuit embodiment of chip of the invention;
Fig. 4 is a kind of structural block diagram of chip of the invention.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
One of the core concepts of the embodiments of the present invention is, by changing to replacement contrast circuit in the related technology
Into so that improved replacement contrast circuit can avoid multiple parasitic capacitance charges total when comparison reset signal is effective
It enjoys and latch mistake is caused to overturn.
Referring to Fig. 2, a kind of structural block diagram of 1 embodiment of replacement contrast circuit of chip of the invention is shown, specifically may be used
To include following module: first switch module 11, second switch module 12, third switch module 13,14 and of multiple contrast modules
Latch 15.
Wherein, the first end of first switch module 11 is connected with default power supply VCC, the control terminal of first switch module 11 with
The comparison reset signal circuit 2 of chip is connected, and comparison reset signal circuit 2 generates comparison reset signal.Second switch module 12
First end be connected with the second end of first switch module 11, the control terminal of second switch module 12 and comparison reset signal circuit
2 are connected.The first end of third switch module 13 is grounded, the second end of third switch module 13 and the second of second switch module 12
End is connected, and the control terminal of third switch module 13 is connected with comparison reset signal circuit 2.Multiple contrast modules 14 are more with chip
A replacement unit 4 corresponds, and each contrast module 14 includes parasitic capacitance, the first end of each contrast module 14 and chip
Input address output end 3 is connected, and when being written and read to chip, input address output end 3 needs to read for exporting
The input address write, the second end of each contrast module 14 are single with the first end of second switch module 12 and corresponding replacement respectively
Member 4 is connected, and the third end of each contrast module 14 is connected with the second end of second switch module 12, when comparison reset signal is invalid
When, first switch module 11, the closure of second switch module 12 and third switch module 13 disconnect, and default power supply VCC is posted multiple
Raw capacitor charging.Latch 15 is connected with the main memory 5 of the first end of second switch module 12 and chip respectively.
Wherein, when comparison reset signal is invalid, due to first switch module 11, the closure of second switch module 12 and third
Switch module 13 disconnects, and the first end of second switch module 12 is high level, and latch 15 is overturn, and the value of latch 15 is low electricity
Flat, latch 15, which is realized, to be resetted.
Specifically, the chip in the embodiment of the present invention can be NAND FLASH chip or other chips, multiple comparison moulds
Block 14 can be 128.In addition, there is the storage of bad point for multiple in record main memory 5 respectively in multiple contrast modules 14
Element address (one the memory unit address of bad point occurs in each 14 corresponding record main memory 5 of contrast module).
Preferably, when comparison reset signal is effective, first switch module 11, second switch module 12 disconnect and third is opened
It closes module 13 to be closed, occur in the main memory 5 of input address and record that each contrast module 14 respectively reads and writes needs bad
The memory unit address of point compares, and when the comparing result of any contrast module 14 is matching, that is, need to read and write is defeated
It is identical to enter to occur in address and the main memory 5 that the contrast module 14 records the memory unit address of bad point, matches accordingly
Contrast module 14 export low level, the first end level of second switch module 12 is pulled low, i.e. the input signal of latch 15
For low level, latch 15 is overturn, and the value of latch 15 is high level, and the value of latch 15 is exported to main memory 5, primary storage
The corresponding storage unit of memory unit address for occurring bad point in device 5 is shielded, and data can not be read and write.Meanwhile contrast module 14
Corresponding replacement unit 4, which is replaced, there is the corresponding storage unit of memory unit address of bad point in main memory 5, read-write needs to read
The corresponding data of the input address write.
Due to presetting power supply VCC and charging to multiple parasitic capacitances, therefore, when every when comparison reset signal is invalid
There is the memory unit address of bad point in the main memory 5 of input address and record that a contrast module 14 respectively reads and writes needs
When comparing, multiple parasitic capacitances not will do it charge and share, so that the comparing result in no any contrast module 14 is
When matching, latch 15 will not be shared due to charge and mistake is overturn, and effectively increases the replacement of the chip of the embodiment of the present invention
The accuracy of contrast circuit 1.
Preferably, in one embodiment of the invention, when compare reset signal be high level when, comparison reset signal without
Effect;When comparing reset signal is low level, comparison reset signal is effective.Preferably, referring to Fig. 3, in a reality of the invention
Apply in example, the replacement contrast circuit 1 of chip can also include: phase inverter 16, phase inverter 16 respectively with comparison reset signal circuit
2, the control terminal of first switch module 11, the control terminal of second switch module 12 are connected with the control terminal of third switch module 13,
Phase inverter 16 is used to carry out comparison reset signal reversed.Preferably, referring to Fig. 3, in one embodiment of the invention, first
Switch module 11 and second switch module 12 can be respectively PMOS tube P1 and PMOS tube P2, and PMOS tube P1 and PMOS tube P2 can be with
Identical, third switch module 13 can be NMOS tube N1.
Preferably, in another embodiment of the present invention, when comparing reset signal is low level, reset signal is compared
In vain;When comparing reset signal is high level, comparison reset signal is effective.
The embodiment of the present invention includes following advantages: increase second switch module, second switch module respectively with first switch
Module, third switch module with comparison reset signal circuit be connected, and by each contrast module respectively with second switch module
First end and second end is connected, and when comparison reset signal is invalid, first switch module, second switch module closure and third
Switch module disconnects, and default power supply charges to multiple parasitic capacitances.To avoid multiple post when comparison reset signal is effective
Raw capacitance charge is shared and latch mistake is caused to overturn, and greatly improves the accuracy of replacement contrast circuit.
In addition, the embodiment of the invention also discloses a kind of chips referring to Fig. 4, comprising: comparison reset signal circuit 2, input
The replacement contrast circuit 1 of address output end 3, multiple replacement units 4, main memory 5 and above-mentioned chip.Wherein, chip replaces
Change contrast circuit 1 respectively with comparison reset signal circuit 2,5 phase of input address output end 3, multiple replacement units 4 and main memory
Even.
The chip of the embodiment of the present invention includes following advantages: when comparison reset signal is invalid, being compared to the replacement of chip
Multiple parasitic capacitance chargings in circuit.To when compare reset signal it is effective when, avoid multiple parasitic capacitance charges it is shared and
Cause latch mistake in the replacement contrast circuit of chip to overturn, greatly improves the accuracy of chip.
For chip embodiment, since it includes the replacement contrast circuit embodiment of chip, so the comparison of description
Simply, related place illustrates referring to the part of the replacement contrast circuit embodiment of chip.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiments, the same or similar parts between the embodiments can be referred to each other.
Although the preferred embodiment of the embodiment of the present invention has been described, once a person skilled in the art knows bases
This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as
Including preferred embodiment and fall into all change and modification of range of embodiment of the invention.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap
Those elements are included, but also including other elements that are not explicitly listed, or further includes for this process, method, article
Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited
Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device for including the element.
Replacement contrast circuit to a kind of chip provided by the present invention and a kind of chip above, are described in detail,
Used herein a specific example illustrates the principle and implementation of the invention, and the explanation of above embodiments is only used
In facilitating the understanding of the method and its core concept of the invention;At the same time, for those skilled in the art, according to the present invention
Thought, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as
Limitation of the present invention.
Claims (7)
1. a kind of replacement contrast circuit of chip characterized by comprising
The first end of first switch module, the first switch module is connected with default power supply, the control of the first switch module
End processed is connected with the comparison reset signal circuit of chip;The comparison reset signal circuit evolving compares reset signal;
Second switch module, the first end of the second switch module is connected with the second end of the first switch module, described
The control terminal of second switch module is connected with the comparison reset signal circuit;
Third switch module, the third switch module first end ground connection, the second end of the third switch module with it is described
The second end of second switch module is connected, and the control terminal of the third switch module is connected with the comparison reset signal circuit;
Multiple replacement units of multiple contrast modules, the multiple contrast module and chip correspond, each comparison mould
Block includes parasitic capacitance, and the first end of each contrast module is connected with the input address output end of chip, each described right
It is connected respectively with the first end of the second switch module and the corresponding replacement unit than the second end of module, it is each described
The third end of contrast module is connected with the second end of the second switch module, described when the comparison reset signal is invalid
First switch module, second switch module closure and the third switch module disconnect, and the default power supply is to multiple institutes
State parasitic capacitance charging;
Latch, the latch are connected with the main memory of the first end of the second switch module and chip respectively.
2. circuit according to claim 1, which is characterized in that when the comparison reset signal is effective, described first is opened
Close module, the second switch module disconnects and the third switch module is closed.
3. circuit according to claim 1 or 2, which is characterized in that the first switch module and the second switch mould
Block is PMOS tube, and the third switch module is NMOS tube.
4. circuit according to claim 2, which is characterized in that
When the comparison reset signal is low level, the comparison reset signal is invalid;
When the comparison reset signal is high level, the comparison reset signal is effective.
5. circuit according to claim 2, which is characterized in that
When the comparison reset signal is high level, the comparison reset signal is invalid;
When the comparison reset signal is low level, the comparison reset signal is effective.
6. circuit according to claim 5, which is characterized in that further include:
Phase inverter, the input terminal of the phase inverter are connected with the output end of the comparison reset signal circuit, the phase inverter
Output end respectively with the control terminal of the first switch module, the control terminal of the second switch module and the third switching molding
The control terminal of block is connected, and the phase inverter is used to carry out the comparison reset signal reversed.
7. a kind of chip characterized by comprising comparison reset signal circuit, input address output end, multiple replacement units,
The replacement contrast circuit of main memory and chip according to claim 1 to 6, the replacement comparison of the chip
Circuit respectively with the comparison reset signal circuit, the input address output end, the multiple replacement unit and the main memory
Reservoir is connected.
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CN201510629555.7A CN105261396B (en) | 2015-09-28 | 2015-09-28 | A kind of chip and its replacement contrast circuit |
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CN201510629555.7A CN105261396B (en) | 2015-09-28 | 2015-09-28 | A kind of chip and its replacement contrast circuit |
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CN105261396B true CN105261396B (en) | 2019-08-30 |
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Citations (3)
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CN1125349A (en) * | 1994-12-27 | 1996-06-26 | 联华电子股份有限公司 | Device patching fault dynamic RAM by using cache buffer memory |
US6724670B2 (en) * | 2001-02-12 | 2004-04-20 | Micron Technology, Inc. | Shared redundancy for memory having column addressing |
CN1901093A (en) * | 2005-07-22 | 2007-01-24 | 三星电子株式会社 | Redundancy selector circuit for use in non-volatile memory device |
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US7324389B2 (en) * | 2006-03-24 | 2008-01-29 | Sandisk Corporation | Non-volatile memory with redundancy data buffered in remote buffer circuits |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1125349A (en) * | 1994-12-27 | 1996-06-26 | 联华电子股份有限公司 | Device patching fault dynamic RAM by using cache buffer memory |
US6724670B2 (en) * | 2001-02-12 | 2004-04-20 | Micron Technology, Inc. | Shared redundancy for memory having column addressing |
CN1901093A (en) * | 2005-07-22 | 2007-01-24 | 三星电子株式会社 | Redundancy selector circuit for use in non-volatile memory device |
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Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |
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