CN105260333B - The accelerated processing method and device of audio signal - Google Patents
The accelerated processing method and device of audio signal Download PDFInfo
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- CN105260333B CN105260333B CN201510616063.4A CN201510616063A CN105260333B CN 105260333 B CN105260333 B CN 105260333B CN 201510616063 A CN201510616063 A CN 201510616063A CN 105260333 B CN105260333 B CN 105260333B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/16—Sound input; Sound output
Abstract
The present invention provides a kind of accelerated processing method and device of audio signal, and the accelerated processing method of the audio signal includes：Hardware-accelerated reading is carried out to external audio signal data using DMA interface, exports audio signal accelerates data；Data are accelerated to carry out First Input First Output caching the audio signal；Accelerate data to carry out hardware high frequency operation processing the audio signal of caching using the first audio processing modules, exports first via Audio Signal Processing data；First Input First Output caching is carried out to the first via Audio Signal Processing data；Utilize the first via Audio Signal Processing data of DMA interface output caching.The present invention is using the intrinsic high frequency operation characteristic of hardware circuit, and by the hardware algorithm of Digital Signal Processing, by software-hardware synergism, the most high speed for realizing algorithm is realized, the performance of Audio Signal Processing is can effectively improve.
Description
Technical field
The invention belongs to signal processing technology fields, are related to a kind of processing method of audio signal, more particularly to one kind
The accelerated processing method and device of audio signal.
Background technology
It can be related to the algorithm design of many Digital Signal Processing during Audio Signal Processing, it generally should by software realization
Class algorithm, similar FFT (Fast Fourier Transform (FFT)), IIR are filtered, are linear in FIR filtering and some audio format decoder modules
Algorithm design of prediction module etc..These algorithms design operation on software needs to expend more time, and algorithm process speed reaches
Less than growing high speed audio process demand.So, how to improve the arithmetic speed of such algorithm is then that the present invention will
It solves the problems, such as.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of acceleration of audio signal processing
Method and device, time-consuming in software realization for the algorithm design for solving existing Digital Signal Processing, and arithmetic speed is slow
The problem of.
In order to achieve the above objects and other related objects, the present invention provides a kind of accelerated processing method of audio signal, institute
The accelerated processing method for stating audio signal includes：Hardware-accelerated reading is carried out to external audio signal data using DMA interface, it is defeated
Go out audio signal and accelerates data；Data are accelerated to carry out First Input First Output caching the audio signal；At the first audio
Managing module accelerates data to carry out hardware high frequency operation processing the audio signal of caching, exports first via Audio Signal Processing number
According to；First Input First Output caching is carried out to the first via Audio Signal Processing data；Utilize DMA interface output caching
First via Audio Signal Processing data.
Optionally, described to accelerate data to carry out hardware high frequency fortune the audio signal of caching using the first audio processing modules
Calculating the process handled includes：Data are accelerated to carry out hardware filtering the audio signal that audio format is FLAC using FIR filter
Processing obtains the first linear predictive coding result；It is ALAC to audio format using the FIR filter after filter coefficient update
Audio signal accelerate data carry out hardware filtering processing after, obtain the second linear predictive coding result；Or/and utilize filter
Coefficient correct updated FIR filter to audio format be APE audio signal accelerate data carry out hardware filtering processing after,
Obtain third linear predictive coding result.
Optionally, the accelerated processing method of the audio signal further includes：Using the second audio processing modules to the sound
Frequency signal accelerates data to carry out hardware-accelerated processing, exports the second tunnel Audio Signal Processing data；It is sent out using the DMA interface
The second tunnel Audio Signal Processing data.
Optionally, described to accelerate data to carry out hardware-accelerated processing the audio signal using the second audio processing modules
Process include：Data are accelerated to carry out FFT hardware-accelerated processing the audio signal；To the audio signal accelerate data into
The hardware-accelerated processing of row IFFT；Data are accelerated to carry out IIR hardware-accelerated processing the audio signal；Or/and to the audio
Signal accelerates data to carry out the hardware-accelerated processing of FIR.
Optionally, the accelerated processing method of the audio signal further includes：Using AMBA bus interface to first sound
Frequency processing module carries out hardware decoder module register configuration；After the completion of the external audio signal data acceleration is handled or send out
When raw abnormal, interrupt signal is exported using Interrupt interfaces.
The present invention provides a kind of acceleration processing unit of audio signal, and the acceleration processing unit of the audio signal includes：
System interface module carries out hardware-accelerated reading by DMA interface to external audio signal data, and exports audio signal accelerates number
According to；Cache module is sent, is connected with the system interface module, accelerates data to carry out First Input First Output the audio signal
Caching；First audio processing modules are connected with the transmission cache module, accelerate data to carry out hardware the audio signal of caching
High frequency operation processing, exports first via Audio Signal Processing data；Order caching module, with the first audio processing modules phase
Even, First Input First Output caching is carried out to the first via Audio Signal Processing data；The system interface module connects with described
It receives cache module to be connected, passes through the first via Audio Signal Processing data of DMA interface output caching.
Optionally, first audio processing modules include：FIR filter unit, to the audio that audio format is FLAC
Signal accelerates data to carry out hardware filtering processing, obtains the first linear predictive coding result；Filter coefficient update unit, with institute
It states FIR filter unit to be connected, the filter coefficient of the FIR filter unit is updated；FIR filters after coefficient update
Wave device unit accelerates data to carry out hardware filtering processing the audio signal that audio format is ALAC, obtains the second linear prediction and compiles
Code result；Correction factor updating unit is connected, more to filter coefficient update unit with the filter coefficient update unit
New coefficient is modified；Coefficient corrects updated FIR filter unit and accelerates data to the audio signal that audio format is APE
Hardware filtering processing is carried out, third linear predictive coding result is obtained.
Optionally, the acceleration processing unit of the audio signal further includes：Second audio processing modules connect with the system
Mouth mold block is connected, and accelerates data to carry out hardware-accelerated processing the audio signal, exports the second tunnel Audio Signal Processing data；
The second tunnel Audio Signal Processing data are exported using the DMA interface.
Optionally, second audio processing modules include：FFT unit accelerates data to carry out FFT the audio signal
Hardware-accelerated processing；IFFT units accelerate data to carry out IFFT hardware-accelerated processing the audio signal；IIR units, to institute
Stating audio signal accelerates data to carry out the hardware-accelerated processing of IIR；Or/and FIR units, accelerate data to carry out the audio signal
The hardware-accelerated processing of FIR.
Optionally, the system interface module further includes：AMBA BUS interfaces, by AMBA buses to first audio
Processing module carries out hardware decoder module register configuration；Interrupt interface has been handled in external audio signal data acceleration
At rear or when being abnormal, interrupt signal is exported.
As described above, the accelerated processing method and device of the audio signal of the present invention, have the advantages that：
The present invention is passed through the hardware algorithm of Digital Signal Processing using the intrinsic high frequency operation characteristic of hardware circuit
Software-hardware synergism, the most high speed for realizing algorithm is realized, the performance of Audio Signal Processing is can effectively improve.
Description of the drawings
Fig. 1 is shown as a kind of implementation process signal of the accelerated processing method of the audio signal described in the embodiment of the present invention
Figure.
Fig. 2 is shown as another implementation process signal of the accelerated processing method of the audio signal described in the embodiment of the present invention
Figure.
Fig. 3 is shown as a kind of realization stream of the step S3 of the accelerated processing method of the audio signal described in the embodiment of the present invention
Journey schematic diagram.
Fig. 4 is shown as a kind of realization structural representation of the acceleration processing unit of the audio signal described in the embodiment of the present invention
Figure.
Fig. 5 is shown as the first audio processing modules of the acceleration processing unit of the audio signal described in the embodiment of the present invention
A kind of realization structural schematic diagram.
Fig. 6 is shown as the second audio processing modules of the acceleration processing unit of the audio signal described in the embodiment of the present invention
A kind of realization structural schematic diagram.
Component label instructions
The acceleration processing unit of 400 audio signals
410 system interface modules
411 DMA interfaces
412 AMBA BUS interfaces
413 interrupt interfaces
420 send cache module
430 first audio processing modules
431 FIR filter units
432 filter coefficient update units
433 correction factor updating units
440 order caching modules
450 second audio processing modules
451 FFT units
452 IFFT units
453 IIR units
454 FIR units
S1~S7 steps
S31~S33 steps
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.It should be noted that in the absence of conflict, following embodiment and implementation
Feature in example can be combined with each other.
It should be noted that the diagram provided in following embodiment only illustrates the basic structure of the present invention in a schematic way
Think, component count, shape and size when only display is with related component in the present invention rather than according to actual implementation in schema then
Draw, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change, and its assembly layout kenel
It is likely more complexity.
Referring to Fig. 1, the present invention provides a kind of accelerated processing method of audio signal, the acceleration processing of the audio signal
Method includes：
S1 carries out hardware-accelerated reading using DMA interface to external audio signal data, and exports audio signal accelerates number
According to.
S2 accelerates data to carry out First Input First Output caching the audio signal.
S3 accelerates data to carry out hardware high frequency operation processing the audio signal of caching using the first audio processing modules,
Export first via Audio Signal Processing data.The present embodiment carries out first audio processing modules using AMBA bus interface
Hardware decoder module register configuration.In the present embodiment, the audio signal of the first audio processing modules processing is needed to accelerate
Data type includes that the audio signal that audio format is FLAC accelerates data, the audio signal that audio format is ALAC to accelerate number
According to or/and audio format be APE audio signal accelerate data.
Further, shown in Figure 3, the first audio processing modules of utilization described in step S3 add the audio signal of caching
The process that fast data carry out hardware high frequency operation processing includes：
S31 accelerates data to carry out hardware filtering processing the audio signal that audio format is FLAC using FIR filter,
Obtain the first linear predictive coding result.
S32 accelerates data using the FIR filter after filter coefficient update to the audio signal that audio format is ALAC
After carrying out hardware filtering processing, the second linear predictive coding result is obtained.Or/and
S33 corrects updated FIR filter using filter coefficient and accelerates to the audio signal that audio format is APE
After data carry out hardware filtering processing, third linear predictive coding result is obtained.
S4 carries out First Input First Output caching to the first via Audio Signal Processing data.
S5 utilizes the first via Audio Signal Processing data of DMA interface output caching.
Further, shown in Figure 2, the accelerated processing method of the audio signal further includes：
S1 carries out hardware-accelerated reading using DMA interface to external audio signal data, and exports audio signal accelerates number
According to.
S6 accelerates data to carry out hardware-accelerated processing the audio signal using the second audio processing modules, output the
Two tunnel Audio Signal Processing data.In the present embodiment, the hardware-accelerated processing function of second audio processing modules includes FFT
Processing function, IFFT is accelerated to accelerate processing function, IIR that processing function, FIR is accelerated to accelerate processing function etc..
Further, data are accelerated to carry out hardware the audio signal using the second audio processing modules described in step S6
Accelerate processing a kind of realization process include：Data are accelerated to carry out FFT hardware-accelerated processing the audio signal；To the sound
Frequency signal accelerates data to carry out the hardware-accelerated processing of IFFT；Data are accelerated to carry out IIR hardware-accelerated processing the audio signal；
Or/and data are accelerated to carry out FIR hardware-accelerated processing the audio signal.
S7 sends out the second tunnel Audio Signal Processing data using the DMA interface.
The present embodiment utilizes after the completion of the external audio signal data acceleration is handled or the when of being abnormal
Interrupt interfaces export interrupt signal.Wherein, the case where being abnormal includes that hardware decoding time-out or bus access occurs,
It initiates to interrupt when writing the mistake such as data.
The protection domain of the accelerated processing method of audio signal of the present invention is not limited to the present embodiment the step of enumerating
Execute sequence, increase and decrease, step replace realized scheme all the step of the prior art that every principle according to the present invention is done
Including within the scope of the present invention.
The present invention also provides a kind of acceleration processing unit of audio signal, the acceleration processing unit of the audio signal can be with
Realize the accelerated processing method of audio signal of the present invention, but the accelerated processing method of audio signal of the present invention
Realization device includes but not limited to the structure of the acceleration processing unit for the audio signal that the present embodiment is enumerated, every according to the present invention
The principle malformation and replacement of the prior art done, be included in protection scope of the present invention.
Described in Fig. 4, the acceleration processing unit 400 of the audio signal includes：System interface module 410 is sent slow
Storing module 420, the first audio processing modules 430, order caching module 440, the second audio processing modules 450.
The system interface module 410 carries out hardware-accelerated reading, output by DMA interface to external audio signal data
Audio signal accelerates data.
Further, shown in Figure 4, the system interface module 410 further includes：DMA interface 411, AMBA BUS interfaces
412, interrupt interface 413.The high performance DMA interface 411 carries out internal calculation by high speed data access reading external data
Method circuit hardware acceleration is handled；The AMBA BUS interfaces 412 carry out first audio processing modules by AMBA buses
Hardware decoder module register configuration.AMBA BUS interfaces 412 are to be based on ARM high performance bus protocol interfaces, are used for into line number
According to transmission configuration.The interrupt interface (interrupt interface) 413 is handled in the external audio signal data acceleration
When after the completion or being abnormal, interrupt signal, the interrupt requests of feedback module circuit are exported.Wherein, the case where being abnormal is wrapped
It includes hardware decoding and time-out or bus access occurs, initiate to interrupt when writing the mistake such as data.The present embodiment utilizes AMBA buses
Interface carries out hardware decoder module register configuration to first audio processing modules.The present embodiment passes through AMBA bus interfaces
Carry out HIFI audio hardware decoder module register configurations；By DMA interface carry out external storage audio data carrying, newly read into
Accelerate to export after processing to carry out audio；Interrupt interfaces are interrupt interfaces, hardware decoding occur timeout or
Bus is fetched, and initiates to interrupt when writing the mistake such as data.
The transmission cache module (Transmit fifo) 420 is connected with the system interface module 410, to the sound
Frequency signal accelerates data to carry out First Input First Output caching.The transmission cache module (Transmit fifo) 420 receives DMA
It is data cached, it calculates and uses for rear class.
First audio processing modules 430 are connected with the transmission cache module 420, accelerate to the audio signal of caching
Data carry out hardware high frequency operation processing, export first via Audio Signal Processing data.In the present embodiment, first sound is needed
It includes that the audio signal that audio format is FLAC accelerates data, audio that the audio signal of frequency processing module processing, which accelerates data type,
The audio signal that the audio signal that format is ALAC accelerates data or/and audio format is APE accelerates data.
Further, shown in Figure 5, first audio processing modules 430 include：FIR filter unit 431, filtering
Device coefficient update unit 432, correction factor updating unit 433.The FIR filter unit 431 is FLAC's to audio format
Audio signal accelerates data to carry out hardware filtering processing, obtains the first linear predictive coding result.The filter coefficient update
Unit 432 is connected with the FIR filter unit 431, is updated to the filter coefficient of the FIR filter unit；System
The updated FIR filter unit of number accelerates data to carry out hardware filtering processing the audio signal that audio format is ALAC, obtains
Obtain the second linear predictive coding result.The correction factor updating unit 433 and 432 phase of filter coefficient update unit
Even, the update coefficient of filter coefficient update unit is modified；Coefficient corrects updated FIR filter unit to audio
The audio signal that format is APE accelerates data to carry out hardware filtering processing, obtains third linear predictive coding result.
The order caching module (Receiver FIFO) 440 is connected with first audio processing modules 430, to institute
It states first via Audio Signal Processing data and carries out First Input First Output caching.The order caching module (Receiver FIFO)
Data after 440 caching calculating, are exported by System interface.
The system interface module 410 is connected with the order caching module 440, passes through the of DMA interface output caching
Audio Signal Processing data all the way.
Second audio processing modules 450 are connected with the system interface module 410, accelerate number to the audio signal
According to hardware-accelerated processing is carried out, the second tunnel Audio Signal Processing data are exported；Second road sound is exported using the DMA interface
Audio signalprocessing data.In the present embodiment, the hardware-accelerated processing function of second audio processing modules includes at FFT acceleration
Manage function, IFFT accelerates processing function, IIR accelerates processing function, FIR accelerates processing function etc..
Further, shown in Figure 6, second audio processing modules 450 include：FFT(Fast Fourier
Transformation, fast Fourier transform) unit 451, IFFT (Inverse Fast Fourier Transform, quickly
Fourier transform inverse transformation) unit 452, IIR units (i.e. digital recursive filter) 453 or/and FIR units (have limit for length's unit
Impact response filter) 454.The FFT unit 451 accelerates data to carry out FFT hardware-accelerated processing the audio signal.Institute
Stating IFFT units 452 accelerates data to carry out IFFT hardware-accelerated processing the audio signal.The IIR units 453 are to described
Audio signal accelerates data to carry out the hardware-accelerated processing of IIR.The FIR units 454 accelerate data to carry out the audio signal
The hardware-accelerated processing of FIR.
The present invention is passed through the hardware algorithm of Digital Signal Processing using the intrinsic high frequency operation characteristic of hardware circuit
Software-hardware synergism, the most high speed for realizing algorithm is realized, the performance of Audio Signal Processing is can effectively improve.
In conclusion the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (6)
1. a kind of accelerated processing method of audio signal, which is characterized in that the accelerated processing method of the audio signal includes：
Hardware-accelerated reading is carried out to external audio signal data using DMA interface, exports audio signal accelerates data；
Data are accelerated to carry out First Input First Output caching the audio signal；
Data are accelerated to carry out hardware high frequency operation processing, output first audio signal of caching using the first audio processing modules
Road Audio Signal Processing data；
First Input First Output caching is carried out to the first via Audio Signal Processing data；
Utilize the first via Audio Signal Processing data of DMA interface output caching；
Accelerate data to carry out hardware-accelerated processing the audio signal using the second audio processing modules, exports the second tunnel audio
Signal processing data；
The second tunnel Audio Signal Processing data are sent out using the DMA interface；
Hardware decoder module register configuration is carried out to first audio processing modules using AMBA bus interface；
After the completion of the external audio signal data acceleration is handled or the when of being abnormal, in being exported using Interrupt interfaces
Break signal.
2. the accelerated processing method of audio signal according to claim 1, which is characterized in that described using at the first audio
Managing the process that module accelerates data to carry out hardware high frequency operation processing the audio signal of caching includes：
Accelerate data to carry out hardware filtering processing the audio signal that audio format is FLAC using FIR filter, obtains first
Linear predictive coding result；
Data are accelerated to carry out hardware the audio signal that audio format is ALAC using the FIR filter after filter coefficient update
After being filtered, the second linear predictive coding result is obtained；Or/and
Correcting updated FIR filter using filter coefficient accelerates data to carry out the audio signal that audio format is APE
After hardware filtering processing, third linear predictive coding result is obtained.
3. the accelerated processing method of audio signal according to claim 1, which is characterized in that described using at the second audio
Managing the process that module accelerates data to carry out hardware-accelerated processing the audio signal includes：
Data are accelerated to carry out FFT hardware-accelerated processing the audio signal；
Data are accelerated to carry out IFFT hardware-accelerated processing the audio signal；
Data are accelerated to carry out IIR hardware-accelerated processing the audio signal；Or/and
Data are accelerated to carry out FIR hardware-accelerated processing the audio signal.
4. a kind of acceleration processing unit of audio signal, which is characterized in that the acceleration processing unit of the audio signal includes：
System interface module carries out hardware-accelerated reading by DMA interface to external audio signal data, and exports audio signal adds
Fast data；
Cache module is sent, is connected with the system interface module, accelerates data to carry out first in, first out team the audio signal
Row caching；
First audio processing modules are connected with the transmission cache module, accelerate data to carry out hardware the audio signal of caching
High frequency operation processing, exports first via Audio Signal Processing data；
Order caching module is connected with first audio processing modules, is carried out to the first via Audio Signal Processing data
First Input First Output caches；
The system interface module is connected with the order caching module, is believed by the first via audio of DMA interface output caching
Number processing data；
Second audio processing modules are connected with the system interface module, accelerate data to carry out hardware the audio signal and add
Speed processing, exports the second tunnel Audio Signal Processing data；The second tunnel Audio Signal Processing number is exported using the DMA interface
According to；
AMBA BUS interfaces carry out hardware decoder module register to first audio processing modules by AMBA buses and match
It sets；
Interrupt interface exports interrupt signal after the completion of the external audio signal data acceleration is handled or the when of being abnormal.
5. the acceleration processing unit of audio signal according to claim 4, which is characterized in that the first audio frequency process mould
Block includes：
FIR filter unit accelerates data to carry out hardware filtering processing the audio signal that audio format is FLAC, obtains first
Linear predictive coding result；
Filter coefficient update unit is connected with the FIR filter unit, to the filter system of the FIR filter unit
Number is updated；It is hard that FIR filter unit after coefficient update accelerates data to carry out the audio signal that audio format is ALAC
Part is filtered, and obtains the second linear predictive coding result；
Correction factor updating unit is connected with the filter coefficient update unit, the update to filter coefficient update unit
Coefficient is modified；Coefficient correct updated FIR filter unit to audio format be APE audio signal accelerate data into
The processing of row hardware filtering, obtains third linear predictive coding result.
6. the acceleration processing unit of audio signal according to claim 4, which is characterized in that the second audio frequency process mould
Block includes：
FFT unit accelerates data to carry out FFT hardware-accelerated processing the audio signal；
IFFT units accelerate data to carry out IFFT hardware-accelerated processing the audio signal；
IIR units accelerate data to carry out IIR hardware-accelerated processing the audio signal；Or/and
FIR units accelerate data to carry out FIR hardware-accelerated processing the audio signal.
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| CN106527999A (en) * | 2016-12-01 | 2017-03-22 | 中国船舶重工集团公司第七六研究所 | Hardware acceleration device and acceleration method for solving differential equations |
| CN109462796A (en) * | 2018-10-25 | 2019-03-12 | 歌尔股份有限公司 | A kind of audio processing system and audio frequency apparatus |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6898470B1 (en) * | 2000-11-07 | 2005-05-24 | Cirrus Logic, Inc. | Digital tone controls and systems using the same |
| CN104240714A (en) * | 2014-09-30 | 2014-12-24 | 福州瑞芯微电子有限公司 | Audio decoding device and method |
| CN104717587A (en) * | 2013-12-13 | 2015-06-17 | Gn奈康有限公司 | Apparatus And A Method For Audio Signal Processing |
| CN104750494A (en) * | 2014-12-26 | 2015-07-01 | 深圳市微纳集成电路与系统应用研究院 | Processor and audio processing method thereof |
| CN104901651A (en) * | 2015-06-25 | 2015-09-09 | 福州瑞芯微电子有限公司 | Realizing circuit and method of digital filter |
-
2015
- 2015-09-24 CN CN201510616063.4A patent/CN105260333B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6898470B1 (en) * | 2000-11-07 | 2005-05-24 | Cirrus Logic, Inc. | Digital tone controls and systems using the same |
| CN104717587A (en) * | 2013-12-13 | 2015-06-17 | Gn奈康有限公司 | Apparatus And A Method For Audio Signal Processing |
| CN104240714A (en) * | 2014-09-30 | 2014-12-24 | 福州瑞芯微电子有限公司 | Audio decoding device and method |
| CN104750494A (en) * | 2014-12-26 | 2015-07-01 | 深圳市微纳集成电路与系统应用研究院 | Processor and audio processing method thereof |
| CN104901651A (en) * | 2015-06-25 | 2015-09-09 | 福州瑞芯微电子有限公司 | Realizing circuit and method of digital filter |
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