CN105249983B - A kind of validity event identification device - Google Patents
A kind of validity event identification device Download PDFInfo
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- CN105249983B CN105249983B CN201510713797.4A CN201510713797A CN105249983B CN 105249983 B CN105249983 B CN 105249983B CN 201510713797 A CN201510713797 A CN 201510713797A CN 105249983 B CN105249983 B CN 105249983B
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Abstract
The embodiment of the invention discloses a kind of validity event identification device, described device includes：Integrating circuit, peak holding circuit, multi-channel gating device, sampling unit and energy harvesting unit；Integrating circuit, the electric signal for the signal output part output to semiconductor probe unit array integrate；Peak holding circuit, the electric signal for integrating circuit to be exported carry out peak holding；Multi-channel gating device, for according to the position by the crystal that photon is hit in the crystal array, selecting the corresponding electric signal of the crystal from the electric signal of peak holding circuit output, and by the electric signal output selected to the sampling unit；Sampling unit, for being sampled to the electric signal that multi-channel gating device exports；Energy harvesting unit, for using the electric signal of sampling obtain the photon hit crystal generation energy, to carry out the identification of validity event.The embodiment of the invention discloses validity event identification device realize ensure realize identification validity event on the basis of reduce hardware quantity, effectively reduce cost.
Description
Technical field
The present invention relates to medical instruments field, more particularly to a kind of validity event identification device.
Background technology
Background that this section is intended to provide an explanation of the embodiments of the present invention set forth in the claims or context.Herein
Description recognizes it is the prior art not because not being included in this part.
Nuclear medicine facility is current medically common detection device, for example, single photon emission computed tomography (Single
Photon Emission Computed Tomography, SPECT) image documentation equipment, positron emission tomography
(Positron emission computed tomography, PET) image documentation equipment etc..Nuclear medicine facility, which will can contain, puts
The distribution of the medicine of penetrating property nucleic in vivo forms image, which can reflect body metabolism, function of organization and structural form.
Nuclear detector imaging firstly the need of injecting radioactive biological tracing medicine (such as 13N-NH, 18F- in patient body
FDOPA, 18F-FDG, 11C-Acetate, 15O-H2O), these medicines are synthesized by the radionuclide of releasable positive electron
's.Biological tracing medicine is typically the nucleic of rich proton, they can produce positive electron, usual positive electron (β+) in decay process
Decay all betides artificial radionuclide.The positive electron that the radionuclide being injected in vivo is launched is mobile big in human body
It will be combined after about lmm with the negative electron in human body and annihilation radiation occurs, it is identical that two energy are produced during positron-electron annihilation
The opposite γ photons (hereinafter referred to as photon) in (511 keV) direction.Usually a pair of of photon is carried out the event after annihilation reaction to claim
Be single event.
Due to hitting a crystal when photon, the crystal not only hit can receive the energy of the photon, but also should
Crystal around crystal may can also receive the energy of photon equilibrium state, so as to be interfered to the judgement for meeting event.Alternatively,
Crystal also receives the energy of another photon equilibrium state while being hit by a photon, causes energy stacking, such
Single event can also interfere with the judgement for meeting event.In order to filter out the crystal that these receive photon equilibrium state energy, general meeting
The single event of preset energy scope, only energy in the range of the preset energy can just be referred to as validity event, only effectively
Event could participate in the judgement for meeting event.
In the prior art, common nuclear medicine facility detector includes the crystal array being made of multiple crystal and photoelectricity inspection
Device is surveyed, wherein, the crystal array is used to detecting the photon (such as γ photons) that is discharged in patient and convert thereof into can
See light, photoelectric detector is used for it will be seen that light is converted into electric signal.In one example, the photoelectric detector is visited for silicon semiconductor
Cell array is surveyed, the silicon semiconductor probe unit in the silicon semiconductor probe unit array and the crystal in the crystal array
It is corresponding.
In the prior art, it is every in the silicon semiconductor probe unit array in order to obtain the energy of each single event
A silicon semiconductor probe unit is respectively coupled a sampling unit, such as ADC (Analog-to-Digital Converter,
Analog-digital converter) device, the electric signal for being exported to each silicon semiconductor probe unit samples.These sampling units are equal
It is connected with energy calculation unit, the energy calculation unit is used to calculate each silicon semiconductor respectively according to the electric signal of sampling
Probe unit exports the energy of signal.Due to sampling unit at present costly, and validity event recognition methods in the prior art
More sampling unit is needed, causes cost very high.
The content of the invention
In order to solve in the prior art due to more than sampling unit quantity and existing technical problem of high cost, the present invention carry
For a kind of validity event identification device, the quantity that hardware is reduced on the basis of realization identification validity event is ensured is realized, effectively
Reduce cost.
An embodiment of the present invention provides a kind of validity event identification device, described device includes：Integrating circuit, peak keep electricity
Road, multi-channel gating device, sampling unit and energy harvesting unit；Wherein, the input terminal and semiconductor probe of the integrating circuit
The signal output part of cell array corresponds to connection, and output terminal connection corresponding with the input terminal of the peak holding circuit, the peak is protected
The output terminal for holding circuit connects the multi-channel gating device, and the multi-channel gating device is connected with the sampling unit, and the sampling is single
It is first to be connected with the energy harvesting unit；
The integrating circuit, the electric signal for the signal output part output to the semiconductor probe cell array carry out
Integration, the semiconductor probe cell array are used to the visible ray that crystal array is sent being converted to electric signal；
The peak holding circuit, the electric signal for the integrating circuit to be exported carry out peak holding；
The multi-channel gating device, for according to the position by the crystal that photon is hit in the crystal array, from described
Select the corresponding electric signal of the crystal in the electric signal of peak holding circuit output, and by selected electric signal output
To the sampling unit；
The sampling unit, the electric signal for being exported to the multi-channel gating device sample；
The energy harvesting unit, for using the electric signal of the sampling obtain the photon hit crystal generation energy
Amount, to carry out the identification of validity event.
Preferably, the peak holding circuit includes amplifier and diode, one of input terminal of the amplifier with
The signal output part connection of the semiconductor probe cell array, the output terminal of the amplifier and the cathode of diode connect,
The anode of the diode is connected with another input terminal of the amplifier, the anode of the diode also with the multichannel
Gate connects.
Preferably, each semiconductor probe unit of the semiconductor probe cell array has a signal output
End.
Preferably, the signal output part includes row signal output part and/or column signal output terminal, the semiconductor probe
The often row semiconductor probe unit of cell array respectively has a row signal output part, and/or, the semiconductor probe list
The each column semiconductor probe unit of element array respectively has a column signal output terminal；
If often row semiconductor probe unit respectively has a row signal output part, each silicon semiconductor of the row
Probe unit is connected each via a resistance and the silicon semiconductor probe unit corresponding row signal output part of being expert at；
If each column semiconductor probe unit respectively has a column signal output terminal, each silicon semiconductor of the row
Probe unit is connected by another resistance column signal output terminal corresponding with the silicon semiconductor probe unit column.
Preferably, described device further includes：Or logic unit and time calibrating unit, described or logic unit input terminal
Be connected with least two signal output parts of the semiconductor probe cell array, described or logic unit output terminal with it is described
Time calibrating unit corresponds to connection；
Described or logic unit, for export at least two signal output parts of the semiconductor probe cell array
Electric signal performs OR operation；
The time calibrating unit, for using perform the electric signal of OR operation to time of the validity event into
Rower is determined.
Preferably, described device further includes n time calibrating unit, and the silicon semiconductor probe unit array is divided into n
Group silicon semiconductor probe unit, the n time calibrating unit are corresponded with the n groups silicon semiconductor probe unit, one group
In each silicon semiconductor probe unit connected with corresponding time calibrating unit, wherein n is the integer more than or equal to 2；
The time calibrating unit, for the signal using the one group of silicon semiconductor probe unit output for producing validity event
The time of the validity event is demarcated.
Preferably, the time calibrating unit is time-to-digit converter.
Preferably, the integrating circuit is integral amplifier.
The embodiment of the present invention also provides a kind of validity event identification device, and described device includes：Or logic unit and time
Unit is demarcated, described or logic unit input terminal is connected with least two signal output parts of semiconductor probe cell array,
The connection corresponding with the time calibrating unit of described or logic unit output terminal；
Described or logic unit, for export at least two signal output parts of the semiconductor probe cell array
Electric signal performs OR operation；
The time calibrating unit, for using perform the electric signal of OR operation to time of the validity event into
Rower is determined.
The embodiment of the present invention also provides a kind of validity event identification device, and described device includes：N time calibrating unit,
The silicon semiconductor probe unit array is divided into n group silicon semiconductor probe units, the n time calibrating unit and the n
Group silicon semiconductor probe unit corresponds, and each silicon semiconductor probe unit connects with corresponding time calibrating unit in one group
Connect, wherein n is the integer more than or equal to 2；
The time calibrating unit, for the signal using the one group of silicon semiconductor probe unit output for producing validity event
The time of the validity event is demarcated.
Relative to the prior art, advantages of the present invention is：
The present invention by integrating circuit to the electric signal that the signal output part of the semiconductor probe cell array exports into
Row integration, the electric signal that the peak holding circuit exports the integrating circuit carry out peak holding, the multi-channel gating device according to
By position of the crystal that photon is hit in the crystal array, selected from the electric signal of several peak holding circuit outputs
The corresponding electric signal of the crystal is selected out, the electric signal that the sampling unit exports the multi-channel gating device samples, institute
State energy harvesting unit using the electric signal of the sampling obtain the photon hit crystal generation energy, to carry out effective thing
The identification of part.The validity event device of the present invention only needs a sampling unit, therefore is greatly reduced relative to the prior art
The quantity of the sampling unit, effectively reduces cost.
Brief description of the drawings
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments described in application, for those of ordinary skill in the art, without creative efforts,
Other attached drawings can also be obtained according to these attached drawings.
Fig. 1 is a kind of structure diagram of validity event identification device embodiment one provided by the invention；
Fig. 2 is that semiconductor probe cell array both had in a kind of validity event identification device embodiment one provided by the invention
There are row signal output part, and the schematic diagram with column signal output terminal；
Fig. 3 is the telecommunications before and after peak holding in a kind of validity event identification device embodiment one provided by the invention
Number schematic diagram；
Fig. 4 is that peak holding circuit one of which is realized in a kind of validity event identification device embodiment one provided by the invention
The schematic diagram of mode；
Fig. 5 is second of crystal positions identification device in a kind of validity event identification device embodiment one provided by the invention
Structure diagram；
Fig. 6 is second of crystal positions identification device in a kind of validity event identification device embodiment one provided by the invention
Validity event identification hardware schematic；
Fig. 7 is a kind of structure diagram of validity event identification device embodiment two provided by the invention；
Fig. 8 is that time calibrating unit is visited with semiconductor in a kind of validity event identification device embodiment three provided by the invention
Survey the schematic diagram of cell array connection.
Embodiment
In order to make those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention
Attached drawing, is clearly and completely described the technical solution in the embodiment of the present invention, it is clear that described embodiment is only this
Invention part of the embodiment, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art exist
All other embodiments obtained under the premise of creative work are not made, belong to the scope of protection of the invention.
Device embodiment one：
Referring to Fig. 1, which is the structure diagram of validity event identification device embodiment one provided by the invention.
Validity event identification device provided by the embodiment includes：Integrating circuit 11, peak holding circuit 12, multi-channel gating device
13rd, sampling unit 14 and energy harvesting unit 15.
Wherein, the input terminal of the integrating circuit 11 connection corresponding with the signal output part of semiconductor probe cell array.
The present invention not quantity to the signal output part of the semiconductor probe cell array and each semiconductor probe unit and institute
The connection mode for stating signal output part is defined.In a kind of mode in the cards, the semiconductor probe cell array
Each semiconductor probe unit respectively there is a signal output part.In the mode of alternatively possible realization, referring to figure
2, the often row semiconductor probe unit of the semiconductor probe cell array respectively has a row signal output part, and/or,
The each column semiconductor probe unit of the semiconductor probe cell array respectively has a column signal output terminal.It is if described every
Row semiconductor probe unit respectively has a row signal output part, then any one of silicon semiconductor detection is single in the row
Member is expert at corresponding row signal output part connection by a resistance and the silicon semiconductor probe unit；If each column semiconductor
Probe unit respectively has a column signal output terminal, then any one of silicon semiconductor probe unit passes through in the row
The column signal output terminal connection corresponding with the silicon semiconductor probe unit column of another resistance.Such as Fig. 2, the figure are described
Semiconductor probe cell array not only has row signal output part, but also the schematic diagram with column signal output terminal.If semiconductor probe
Cell S 11 produces electric signal, then the output terminal of the semiconductor probe cell S 11 and the place of semiconductor probe cell S 11
Capable row signal output part produces voltage difference, therefore the electric signal streams reach the row signal output part through resistance 801；It is described
The output terminal of semiconductor probe cell S 11 and the column signal output terminal of 11 column of semiconductor probe cell S produce voltage
Difference, therefore the electric signal streams reach the column signal output terminal through resistance 802.
The integrating circuit 11, for the electric signal to the output of the signal output part of the semiconductor probe cell array into
Row integration, the semiconductor probe cell array are used to the visible ray that crystal array is sent being converted to electric signal.
Since the essence made energy calculation according to electric signal is exactly that electric signal is integrated, the present embodiment passes through
The electric signal that integrating circuit 11 exports the signal output part of the semiconductor probe cell array integrates, so as to the peak
Electric signal after integration is maintained at peak value output by holding circuit 12, and the peak value is the energy value for the event that represents.
The present invention is not defined realization of the integrating circuit 11 on hardware, for example, a kind of possible reality wherein
In existing mode, the integrating circuit 11 can be integral amplifier；In the mode of alternatively possible realization, the integration electricity
Road 11 can also be PID (ratio Proportion integrates Integration differential Differentiation) control circuit.
Hit by photon that the time of one section of electric signal duration of generation is very short due to crystal, almost transient state, therefore
Need in some way to maintain this section of electric signal, avoided before the position of the crystal is got this section of electric signal
Output.Therefore, the output terminal of the integrating circuit 11 needs connection corresponding with the input terminal of the peak holding circuit 12.The peak
Holding circuit 12, the electric signal for the integrating circuit to be exported carry out peak holding.
So-called " peak holding ", simple to understand to be exactly that electric signal is maintained at peak value, it is actually with the electric signal
Peak value output.Referring to Fig. 3, Fig. 3 (a) figures are the electric signal before peak is kept, its waveform is triangular wave, and Fig. 3 (b) keeps for peak
Signal afterwards, i.e., when electric signal is to peaking, peak value output is maintained at by electric signal.
The present invention is not defined the 12 specific hardware realization of peak holding circuit, a kind of in the cards wherein
In mode, the peak holding circuit 12 includes amplifier 120 and diode 121, referring to Fig. 4, wherein the one of the amplifier 120
A input terminal is connected with the signal output part of the semiconductor probe cell array, the output terminal of the amplifier 120 and two poles
The cathode connection of pipe 121, the anode of the diode 121 are connected with another input terminal of the amplifier 120, and described two
The anode 121 of pole pipe is also connected with the multi-channel gating device 13.The operation principle of the peak holding circuit 12 is：When electric signal is from putting
Cathode (A points) input of big device 120, during signal increases, the voltage of the output terminal (B points) of amplifier 120 is with A points electricity
The increase of pressure and increase, since diode 121 is conducting state at this time, the voltage of 120 anode of amplifier (C points) is also therewith
Increase.Begun to decline after A point voltages reach maximum, during decline, the voltage of B points also declines therewith, but due to C
The voltage of point is higher than the voltage of B points, causes diode to end, and at this moment the voltage of C points is maintained at the maximum voltage value, therefore,
The magnitude of voltage of electric signal of the follow-up output to multi-channel gating device 13 is maintained at voltage peak.
The output terminal of the peak holding circuit 12 connects the multi-channel gating device 13, the multi-channel gating device 13, for root
According to the position by the crystal that photon is hit in the crystal array, selected from the electric signal of the peak holding circuit 12 output
Go out the corresponding electric signal of the crystal, and by selected electric signal output to the sampling unit 14.
So-called multi-channel gating device refers to select the device that wherein electric signal is exported all the way from multi-channel electric signal, its is hard
Part can realize that the present invention is not specifically limited by analog switch, FPGA etc..In the present embodiment, the multi-channel gating device
Position in 13 crystal arrays according to where the crystal hit by photon, from the electric signal of the peak holding circuit 12 output
In select the corresponding electric signal of the crystal, and by the electric signal output of the selection output to the sampling unit.With institute
Multi-channel gating device 13 is stated as exemplified by analog switch, each switch of the analog switch has corresponding numbering, under normal circumstances,
All analog switches are in off state., then can be according to the crystal when the position of the crystal hit by photon is identified
Position encoded, the coding of the corresponding coding of crystal analog switch corresponding with the crystal is identical, according to described
The corresponding analog switch of the crystal corresponding coding-control crystal is opened, so as to export the corresponding electricity kept by peak of the crystal
Signal.As to how the position of crystal is identified, will be described below.
The multi-channel gating device 13 is connected with the sampling unit 14, the sampling unit 14, for selecting the multichannel
The electric signal that logical device 13 exports is sampled.
The present invention is not defined the hardware realization of the sampling unit 14, such as can be ADC (Analog-to-
Digital Converter, analog-digital converter).
The sampling unit 14 is connected with the energy harvesting unit 15, the energy harvesting unit 15, for utilizing institute
The electric signal for stating sampling obtains the energy that the photon hits crystal generation, to carry out the identification of validity event.
Since the electric signal of sampling is the signal that have passed through " peak holding ", and the signal of " peak holding " is that original signal is carried out
The signal of integration, therefore, energy conversion is carried out by reading the voltage of the sampled signal, and by the voltage, it is possible to
The energy that photon hits crystal generation is obtained, by judging the energy whether in default energy range, if so, then recognizing
It is validity event for the event, realizes the identification of validity event.
The function of the energy harvesting unit 15 can pass through the hardware such as field programmable gate array (FPGA) or processor
Realized, the present invention is not specifically limited.
The basic thought of validity event identification device provided in this embodiment is from numerous using the multi-channel gating device 13
Electric signal in select photon and hit the acquisition that the corresponding electric signal all the way of crystal carries out energy, therefore whole circuit only needs
One sampling unit 14, is corresponding with relative to each semiconductor probe unit in semiconductor probe cell array in the prior art
One sampling unit, the technical solution of the present embodiment greatly reduce the quantity of sampling unit, effectively reduce cost.It is situated between below
Continue two kinds of crystal positions identification devices, it is to be understood that both devices do not form limitation of the invention, this area skill
Art personnel can be according to practical situations designed, designed others crystal positions identification device.
The first crystal positions identification device includes：
Silicon semiconductor probe unit array, the silicon semiconductor probe unit array amplify including silicon semiconductor probe unit
Device, comparator and crystal positions recognition unit, wherein, one end of the amplifier connects with silicon semiconductor probe unit with corresponding
Connect, the other end and the comparator correspond to connection, and the other end of the comparator is then connected with the crystal positions recognition unit.
The amplifier, the signal for being exported to corresponding silicon semiconductor probe unit are amplified.
The comparator, for the voltage of amplified signal that exports corresponding amplifier compared with threshold voltage,
Obtain comparative result.
The crystal positions recognition unit, for the position for the crystal for being identified as being hit by photon using the comparative result
Put.
When the corresponding crystal of the silicon semiconductor probe unit is hit by photon, the silicon semiconductor probe unit can produce
Raw signal.And in practical applications, in the case where the corresponding crystal of the silicon semiconductor probe unit is not hit by photon,
The silicon semiconductor probe unit may can also export faint signal, in order to which the signal and crystal are hit generation by photon
Signal is distinguished, the first described crystal positions identification device is provided with comparator, and the input of the comparator is put to be described
The signal and threshold signal of big device output, the voltage for the signal that amplifier is exported and the threshold voltage of threshold signal are compared
Compared with obtaining comparative result.Such as export high level if the voltage of the amplified signal is greater than or equal to the threshold voltage；If
The voltage of the amplified signal then exports low level less than the threshold voltage or does not export any level.The crystal positions
Recognition unit is after the signal of high level is received, using the position of the corresponding silicon semiconductor probe unit of the signal as by light
The position for the crystal that son is hit.
Second of crystal positions identification device includes：
Silicon semiconductor probe unit array, the silicon semiconductor probe unit array include silicon semiconductor probe unit.Institute
The often row silicon semiconductor probe unit for stating silicon semiconductor probe unit array respectively has a row signal output part, the silicon
The each column silicon semiconductor probe unit of semiconductor probe cell array respectively has a column signal output terminal, each silicon
Semiconductor probe unit is respectively provided with such connection relation：The silicon semiconductor probe unit is partly led by a resistance with the silicon
Body probe unit is expert at the connection of corresponding row signal output part, and passes through another resistance and the silicon semiconductor probe unit institute
Arranging corresponding column signal output terminal connection.
Described device further includes row signal comparing unit and column signal comparing unit, the row signal output and row letter
Number comparing unit corresponds to connection, and the column signal output terminal is corresponding with the column signal comparing unit to be connected.
Wherein, the row signal comparing unit is used to detect a line silicon semiconductor corresponding with the row signal comparing unit
The sum of voltage of unit output obtains row comparative result compared with threshold voltage；
The column signal comparing unit is used for will row silicon semiconductor probe unit corresponding with the column signal comparing unit
The sum of voltage of output obtains row comparative result compared with the threshold voltage；
Described device further includes crystal positions recognition unit, the both ends of the crystal positions recognition unit respectively with the row
Signal comparing unit is connected with the column signal comparing unit, for the row ratio according to each row signal comparing unit output
The position of the crystal hit compared with the row comparative result identification that result and each column signal comparing unit export by photon.
The nuclear detector crystal positions identification device is introduced by taking 8 × 8 silicon semiconductor probe unit array as an example below
Operation principle.Referring to Fig. 5, in the figure, it is assumed that passed through between silicon semiconductor probe unit S11 and row signal comparing unit 101
Connected by a resistance；The silicon semiconductor probe unit S11 is connected with column signal comparing unit 201 via another resistance.
The connection mode of the corresponding row signal comparing unit of other silicon semiconductor probe units and column signal comparing unit with it is described
The connection mode of silicon semiconductor probe unit S11 is identical.
When the corresponding crystal of the silicon semiconductor probe unit S11 is hit by photon, the silicon semiconductor probe unit S11
The visible ray that the crystal produces can be converted to electric signal, due to the presence of resistance, the silicon semiconductor detector cell S 11
Potential difference is produced between the row signal comparing unit 101, therefore the silicon semiconductor probe unit S11 can be by the electricity of generation
Signal is sent to the row signal comparing unit 101.Meanwhile the silicon semiconductor detector cell S 11 can be believed with corresponding row
Potential difference is produced between number comparing unit 201, therefore the electric signal that can be also converted is sent to the column signal comparing unit
201。
Due to the row signal comparing unit 101 and the silicon semiconductor probe unit S11, S12, S13, S14, S15,
S16, S17, S18 are connected by a bus x1, therefore what the row signal comparing unit 101 received is this bus
The electric signal of superposition on x1.The row signal comparing unit 101 can obtain this line 8 according to the electric signal of the superposition
The sum of voltage of silicon semiconductor probe unit output.Due in practical applications, in a line silicon semiconductor probe unit pair
Also had in the case that the crystal answered is not hit by photon, in the bus faint electric current by, therefore the row believe
Number comparing unit 101 can also receive electric signal.In order to obtain the position of the crystal hit by photon, the present embodiment passes through
The sum of voltage that row signal comparing unit 101 exports a line silicon semiconductor probe unit compared with threshold voltage,
The corresponding magnitude of voltage of electric signal that i.e. described row signal comparing unit 101 is received on bus x1 and the threshold voltage
It is compared, obtains row comparative result.The present invention does not limit realization of the row signal comparing unit 101 on hardware
It is fixed.For example, in a kind of possible implementation, calculating can be compared using processor.In the reality of another possibility
In existing mode, can also be compared using comparator, will the superposition electric signal and threshold voltage signal be used as described in
The input of comparator, if the sum of voltage of a line silicon semiconductor probe unit output is greater than or equal to the threshold voltage,
Then export high level；If the sum of voltage of a line silicon semiconductor probe unit output is less than the threshold voltage, export
Low level does not export any level.In addition, described device can also include amplifier, referring to Fig. 6 (a), the amplifier
For amplifying the electric signal on the bus x1, then amplified electric signal is inputted into the comparator and is compared.
The operation principle of other row signal comparing units is identical with the operation principle of the row signal comparing unit 101.
Similarly, due to the column signal comparing unit 201 and the silicon semiconductor probe unit S11, S21, S31, S41,
S51, S61, S71, S81 are connected by a bus y1, therefore what the column signal comparing unit 201 received is this
The electric signal of superposition on bus y1.The column signal comparing unit 201 can obtain this according to the electric signal of the superposition
The sum of voltage of 8 silicon semiconductor probe unit output of row.Due in practical applications, being detected in the row silicon semiconductor single
In the case that first 201 corresponding crystal are not hit by photon, faint electric current is also had in the bus and passes through therefore institute
Electric signal can also be received by stating column signal comparing unit 201.In order to obtain the position of the crystal hit by photon, this implementation
The sum of voltage that example is exported the row silicon semiconductor probe unit by column signal comparing unit 201 and the threshold voltage
It is compared, i.e., the corresponding magnitude of voltage of electric signal and institute that described column signal comparing unit 201 is received on bus y1
State threshold voltage to be compared, obtain row comparative result.The not reality to the column signal comparing unit 201 on hardware of the invention
Now it is defined.For example, in a kind of possible implementation, calculating can be compared using processor.At another
In possible implementation, it can also be compared using comparator, even described row silicon semiconductor probe unit output
The sum of voltage is greater than or equal to the threshold voltage, then exports high level；If the row silicon semiconductor probe unit output
The sum of voltage is less than the threshold voltage, then exports low level or do not export any level.In addition, described device can also wrap
Amplifier is included, referring to Fig. 6 (b), the amplifier is used to amplify the electric signal on the bus y1, then by amplified telecommunications
Number input is compared into the comparator.
The operation principle of other column signal comparing units is identical with the operation principle of the column signal comparing unit 201.
The row signal comparing unit 101-108 and column signal comparing unit 201-208 respectively with crystal positions
Recognition unit 301 connects.The crystal positions recognition unit 108 reads the row signal comparing unit 101-108 and sends out respectively
After the row comparative result sent, and the row comparative results that send respectively of the column signal comparing unit 201-208, according to 8 row ratios
The position of the crystal hit compared with result and 8 row comparative result identifications by photon.The present invention is not defined to how to identify, example
Such as, it is assumed that the value that each row signal comparing unit and each column signal comparing unit export is level value, i.e., when a line (or row)
The sum of voltage of silicon semiconductor probe unit output is greater than or equal to the threshold voltage, then exports high level；When a line (or
Row) the sum of the voltage of silicon semiconductor probe unit output is less than the threshold voltage, then output low level or do not export any
Level.If row comparative result and row comparative result are high level, the corresponding a line silicon semiconductor of the row comparative result is visited
The intersection point for surveying unit and the corresponding row silicon semiconductor probe unit of the row comparative result is identified as the crystal hit by photon
Position.For example, the row comparative result that the row signal comparing unit 105 exports is high level, the column signal comparing unit
The comparative result of the column signal comparing unit output of 203 outputs is also high level, then the row signal comparing unit 105 corresponds to
A line silicon semiconductor probe unit and the corresponding row silicon semiconductor probe unit of the column signal comparing unit 203 intersection point
For silicon semiconductor probe unit S53, therefore where the position where the silicon semiconductor probe unit S53 is corresponding crystal
Position.
The present invention is not defined realization of the crystal positions recognition unit 301 on hardware, such as can be place
Manage device or field programmable gate array (FPGA) etc..
In addition, in the present invention, the silicon semiconductor probe unit can be the arbitrarily photodetection based on silicon semiconductor
Device, such as silicon photomultiplier SiPM etc., the present invention is not specifically limited.The present invention does not also detect the silicon semiconductor single
The species of the corresponding crystal of member is defined, such as can be BGO, LYSO, LSO etc..
In second of nuclear detector crystal positions identification device, the often row silicon half of the silicon semiconductor probe unit array
Conductor probe unit respectively corresponds to a row signal comparing unit, and each column silicon of the silicon semiconductor probe unit array is partly led
Body probe unit respectively corresponds to a column signal comparing unit, and the row signal comparing unit is used for will be compared with the row signal
The sum of voltage of the corresponding a line silicon semiconductor probe unit output of unit obtains row and relatively ties compared with threshold voltage
Fruit, the column signal comparing unit are used for row silicon semiconductor probe unit corresponding with column signal comparing unit output
The sum of voltage obtains row comparative result compared with the threshold voltage.The crystal positions recognition unit respectively with it is described
Row signal comparing unit is connected with the column signal comparing unit, for the row according to each row signal comparing unit output
The position for the crystal that the row comparative result identification of comparative result and the output of each column signal comparing unit is hit by photon.For example,
For 8 × 8 silicon semiconductor probe unit array, it is only necessary to 8 row signal comparing units and 8 column signal comparing units, outside
Add a crystal positions recognition unit to realize the identification to crystal positions, the number of hardware is reduced relative to the prior art
Amount and cost, also reduce system scale.
Device embodiment two
The judgement needs for meet event demarcate the time of validity event, mark of the prior art to validity event
Fixed, each semiconductor probe unit of the semiconductor probe cell array each connects a time calibrating unit respectively,
If identifying validity event, the time of the corresponding time calibrating unit calibration of the validity event is read.Partly led due to each
Body probe unit all each connects a time calibrating unit, such as TDC (Time to Digital Convert, time respectively
Digital quantizer), general time calibrating unit is all expensive, and excessive time calibrating unit causes cost to steeply rise.
In order to solve the technical problem, referring to Fig. 7, which is the structural frames of validity event identification device embodiment two provided by the invention
Figure.
On the basis of described device embodiment one, validity event identification device provided in this embodiment further includes：Or patrol
Collect unit 16 and time calibrating unit 17, described or logic unit the 16 and at least two semiconductor probe unit of input terminal
The signal output part connection of array, described or logic unit 16, for by least two of the semiconductor probe cell array
The electric signal of signal output part output performs OR operation.After performing OR operation, originally at least two signals are changed into one
A signal output, therefore reduce the quantity of time calibrating unit, reduce cost.
As described in device embodiment one, each semiconductor probe unit of the semiconductor probe cell array can
The often row semiconductor probe unit for having a signal output part or the semiconductor probe cell array respectively is divided equally
Not Ju You a row signal output part, and/or each column semiconductor probe unit respectively has a column signal output terminal.Generally
In the case of, at the same moment, a crystal array can only be hit by a photon, therefore, in all semiconductor probe units
In the signal output part of array, only a signal output part can export signal.For example, in Fig. 7, if the crystalline substance hit by photon
The corresponding signal output part of body is P1, and the electric signal of the signal output part P1 outputs is inputted to corresponding or logic unit 16,
Signal output part P2 is connected with the signal output part P1 with same or logic unit 16, due to P2 pairs of the signal output part
The crystal answered is not hit by photon, and the signal output part P2 does not export electric signal or only exports faint electric signal, therefore
The electric signal that described or logic unit 16 exports is essentially the electric signal of the signal output part P1 outputs.
In the present embodiment, the signal output part at least two of each or logic unit 16 input terminal connection, at most
Can be identical with the quantity of the semiconductor probe unit.
Described or logic unit 16 output terminal connection corresponding with the time calibrating unit 17.The time calibrating unit
17, for being demarcated using the electric signal for performing OR operation to the time of the validity event of the generation.
If identifying validity event, the time that the corresponding time calibrating unit 17 of the validity event is demarcated is read, with
The judgement for meeting event is carried out according to the time of the validity event.
In this embodiment, each or logic unit 16 input terminal 16 at least with two semiconductor probe unit battle arrays
The signal output part connection of row, therefore described or logic unit 16 quantity is certainly less than the quantity of the signal output part, and
One or logic unit 16 corresponds to a time calibrating unit 17, that is to say, that the quantity of the time calibrating unit 17
It is identical with described or logic unit 16 quantity, the quantity less than the signal output part, therefore relative to the prior art, sheet
Embodiment reduces the quantity of the time calibrating unit 17, reduces cost.
Device embodiment three
In device embodiment two, the quantity of time calibrating unit 17 is reduced using described or logic unit 16, and originally
Embodiment provides another thinking for reducing time calibrating unit.
On the basis of described device embodiment one, device provided in this embodiment further includes：N time calibrating unit,
The silicon semiconductor probe unit array is divided into n group silicon semiconductor probe units, the n time calibrating unit and the n
Group silicon semiconductor probe unit corresponds, and each silicon semiconductor probe unit connects with corresponding time calibrating unit in one group
Connect, wherein n is the integer more than or equal to 2.
The time calibrating unit, for the signal using the one group of silicon semiconductor probe unit output for producing validity event
The time of the validity event is demarcated.
If identifying validity event, the time of the corresponding time calibrating unit calibration of the validity event is read, with root
The judgement for carrying out meeting event according to the time of the validity event.
The present invention is not defined realization of the time calibrating unit on hardware, for example, in a kind of possible realization
Mode in, the time calibrating unit is processor, another possibility realize mode in, the time calibrating unit
For time-to-digit converter (Time to Digital Convert, TDC).Since time calibrating belongs to art technology in itself
General knowledge known to personnel, therefore repeat no more.
By taking 8 × 8 silicon semiconductor probe unit array as an example, 8 × 8 silicon semiconductor probe unit array is divided into
4 groups, every group of correspondence one TDC, Fig. 8 are the hardware connection figure of one of which.In the figure, a TDC is responsible for adjacent rows
Totally 16 silicon semiconductor probe units carry out time calibrating, therefore 8 × 8 silicon semiconductor probe unit array only needs 4
TDC can complete the time calibrating of all silicon semiconductor probe units, greatly reduce hardware quantity, effectively reduce cost,
Reduce system scale.
It should be noted that one of ordinary skill in the art will appreciate that realize the whole in above method embodiment or portion
Split flow, is that relevant hardware can be instructed to complete by computer program, the program can be stored in a computer
In read/write memory medium, the program is upon execution, it may include such as the flow of above-mentioned each method embodiment.Wherein, the storage
Medium can be magnetic disc, CD, read-only memory (Read-Only Memory, ROM) or random access memory (Random
Access Memory, RAM) etc..
Each embodiment in this specification is described by the way of progressive, identical similar portion between each embodiment
Divide mutually referring to what each embodiment stressed is the difference with other embodiment.It is real especially for device
For applying example, since it is substantially similar to embodiment of the method, so describing fairly simple, related part is referring to embodiment of the method
Part explanation.Device embodiment described above is only schematical, wherein described be used as separating component explanation
Unit and module may or may not be it is physically separate.Furthermore it is also possible to it is selected according to the actual needs
In some or all of unit and module realize the purpose of this embodiment scheme.Those of ordinary skill in the art are not paying
In the case of creative work, you can to understand and implement.
The above is only the embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should
It is considered as protection scope of the present invention.
Claims (8)
1. a kind of validity event identification device, it is characterised in that described device includes：Integrating circuit, peak holding circuit, multichannel choosing
Logical device, sampling unit and energy harvesting unit；Wherein, the input terminal of the integrating circuit and silicon semiconductor probe unit array
Signal output part correspond to connection, the output terminal of the integrating circuit it is corresponding with the input terminal of the peak holding circuit connects, institute
The output terminal for stating peak holding circuit connects the multi-channel gating device, and the multi-channel gating device is connected with the sampling unit, described
Sampling unit is connected with the energy harvesting unit；
The integrating circuit, the electric signal for the signal output part output to the silicon semiconductor probe unit array accumulate
Point, the silicon semiconductor probe unit array is used to the visible ray that crystal array is sent being converted to electric signal；
The peak holding circuit, the electric signal for the integrating circuit to be exported carry out peak holding；
The multi-channel gating device, for according to the position by the crystal that photon is hit in the crystal array, being protected from the peak
Hold and the corresponding electric signal of the crystal is selected in the electric signal of circuit output, and by selected electric signal output to institute
State sampling unit；
The sampling unit, the electric signal for being exported to the multi-channel gating device sample；
The energy harvesting unit, for using the electric signal of the sampling obtain the photon hit crystal generation energy,
To carry out the identification of validity event.
2. device according to claim 1, it is characterised in that the peak holding circuit includes amplifier and diode, institute
The one of input terminal for stating amplifier is connected with the signal output part of the silicon semiconductor probe unit array, the amplifier
Output terminal and the cathode of diode connect, the anode of the diode is connected with another input terminal of the amplifier,
The anode of the diode is also connected with the multi-channel gating device.
3. device according to claim 1, it is characterised in that each silicon of the silicon semiconductor probe unit array is partly led
Body probe unit all has a signal output part.
4. device according to claim 1, it is characterised in that the signal output part include row signal output part and/or
Column signal output terminal, the often row silicon semiconductor probe unit of the silicon semiconductor probe unit array respectively there is a row to believe
Number output terminal, and/or, each column silicon semiconductor probe unit of the silicon semiconductor probe unit array respectively has a row
Signal output part；
If often row silicon semiconductor probe unit respectively has a row signal output part, the row each visit by the silicon semiconductor
Unit is surveyed to be expert at corresponding row signal output part connection each via a resistance and the silicon semiconductor probe unit；
If each column silicon semiconductor probe unit respectively has a column signal output terminal, the row each visit by the silicon semiconductor
Unit is surveyed to connect by another resistance column signal output terminal corresponding with the silicon semiconductor probe unit column.
5. device according to claim 1, it is characterised in that described device further includes：Or logic unit and time calibrating
Unit, at least two signal output parts of described or logic unit input terminal and the silicon semiconductor probe unit array connect
Connect, the connection corresponding with the time calibrating unit of described or logic unit output terminal；
Described or logic unit, for the electricity for exporting at least two signal output parts of the silicon semiconductor probe unit array
Signal performs OR operation；
The time calibrating unit, for using performing the electric signal of OR operation to time of the validity event into rower
It is fixed.
6. device according to claim 1, it is characterised in that described device further includes n time calibrating unit, the silicon
Semiconductor probe cell array is divided into n group silicon semiconductor probe units, the n time calibrating unit and the n groups silicon half
Conductor probe unit corresponds, and each silicon semiconductor probe unit is connected with corresponding time calibrating unit in one group, its
Middle n is the integer more than or equal to 2；
The time calibrating unit, for the signal using the one group of silicon semiconductor probe unit output for producing validity event to institute
The time for stating validity event is demarcated.
7. the device according to claim 5 or 6, it is characterised in that the time calibrating unit is time-to-digit converter.
8. device according to claim 1, it is characterised in that the integrating circuit is integral amplifier.
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| CN102283663A (en) * | 2011-05-23 | 2011-12-21 | 江苏中惠医疗科技股份有限公司 | Primitive event detection module for all-digital processing unit |
| CN102648856A (en) * | 2012-04-28 | 2012-08-29 | 中国科学院高能物理研究所 | Positron emission tomography scanner and coincidence judging and selecting method therein |
| CN103070697A (en) * | 2012-12-31 | 2013-05-01 | 沈阳东软医疗系统有限公司 | Coincidence judgment circuit of positron emission tomography (PET) system detection device as well as adjusting device and method thereof |
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| JP3858933B1 (en) * | 2005-08-31 | 2006-12-20 | 株式会社日立製作所 | Radiation detection circuit and nuclear medicine diagnosis apparatus using the same |
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| CN102283663A (en) * | 2011-05-23 | 2011-12-21 | 江苏中惠医疗科技股份有限公司 | Primitive event detection module for all-digital processing unit |
| CN102648856A (en) * | 2012-04-28 | 2012-08-29 | 中国科学院高能物理研究所 | Positron emission tomography scanner and coincidence judging and selecting method therein |
| CN103070697A (en) * | 2012-12-31 | 2013-05-01 | 沈阳东软医疗系统有限公司 | Coincidence judgment circuit of positron emission tomography (PET) system detection device as well as adjusting device and method thereof |
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