CN105161494A - 一种阵列基板及其制成方法、显示面板 - Google Patents

一种阵列基板及其制成方法、显示面板 Download PDF

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CN105161494A
CN105161494A CN201510346979.2A CN201510346979A CN105161494A CN 105161494 A CN105161494 A CN 105161494A CN 201510346979 A CN201510346979 A CN 201510346979A CN 105161494 A CN105161494 A CN 105161494A
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layer
channel layer
array base
base palte
drain electrode
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王质武
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201510346979.2A priority Critical patent/CN105161494A/zh
Priority to PCT/CN2015/083745 priority patent/WO2016201752A1/zh
Priority to US14/765,833 priority patent/US9595539B2/en
Publication of CN105161494A publication Critical patent/CN105161494A/zh
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Abstract

本申请公开了一种阵列基板及其制成方法、显示面板。其中，该阵列基板，包括基板和多个TFT，所述TFT包括设置在所述基板上的栅极、栅绝缘层、沟道层、蚀刻阻挡层、源极和漏极，所述栅绝缘层叠置在所述栅极和沟道层之间，以将所述栅极和沟道层绝缘，所述蚀刻阻挡层、源极和漏极分别设置在所述沟道层上，且所述刻蚀阻挡层设置在所述源极和漏极之间；其中，所述刻蚀阻挡层为AlN薄膜。通过上述方式，能够保证TFT的质量，且提高刻蚀阻挡层的成膜速率。

Description

一种阵列基板及其制成方法、显示面板
技术领域
本申请涉及显示技术领域，特别是涉及一种阵列基板及其制成方法、显示面板。
背景技术
目前，主流显示面板的薄膜晶体管(英文：thinfilmtransistor，简称：TFT)的刻蚀阻挡层(英文：EtchStopLayer，简称：ESL)通常采用一氧化硅(分子式：SiO)构成。由于在制备SiO时需使用含氢的反应气体，故反应生成物中会包括氢，也即刻蚀阻挡层中含有氢。
然而，由于刻蚀阻挡层含氢，故在刻蚀阻挡层成膜时，如果温度过高，则会导致相邻的沟道层的还原，从而影响TFT的沟道层的质量，如果温度过低，则刻蚀阻挡层的氮含量会相对提高，容易出现孔洞(英文：pinhole)，从而影响刻TFT的蚀阻挡层的成膜质量。所以，为保证TFT的质量，现有的刻蚀阻挡层的成膜要求高，且成膜速率低。
发明内容
本申请提供一种阵列基板及其制成方法、显示面板，能够保证TFT的质量，且提高刻蚀阻挡层的成膜速率。
本申请第一方面提供一种阵列基板，包括基板和多个薄膜晶体管，所述薄膜晶体管包括设置在所述基板上的栅极、栅绝缘层、沟道层、蚀刻阻挡层、源极和漏极，所述栅绝缘层叠置在所述栅极和沟道层之间，以将所述栅极和沟道层绝缘，所述蚀刻阻挡层、源极和漏极分别设置在所述沟道层上，且所述刻蚀阻挡层设置在所述源极和漏极之间；其中，所述刻蚀阻挡层为AlN薄膜。
其中，所述AlN薄膜是利用磁控溅射设备，在铝箱中通入氮气、或包括氩气和氮气的混合气体，溅射形成的。
其中，所述氩气与氮气的比值为0-90％。
其中，所述栅绝缘层为AlN薄膜。
其中所述沟道层由金属氧化物构成。
本申请第二方面提供一种阵列基板的制成方法，所述方法包括：在基板上形成栅极、栅绝缘层、沟道层，其中，所述栅绝缘层叠置在所述栅极和沟道层之间；在所述沟道层上形成蚀刻阻挡层、源极和漏极，且所述刻蚀阻挡层设置在所述源极和漏极之间，其中，所述蚀刻阻挡层为AlN薄膜。
其中，所述在所述沟道层上形成蚀刻阻挡层，包括：利用磁控溅射设备，在铝箱中通入氮气、或包括氩气和氮气的混合气体，以在沟道层上溅射形成AlN薄膜。
其中，所述氩气与氮气的比值为0-90％。
其中，在AlN薄膜成膜时，所述基板的温度为25摄氏度-300摄氏度。
本申请第三方面提供一种显示面板，包括上面所述的阵列基板。
上述方案中，采用AlN薄膜作为阵列基板的TFT的刻蚀阻挡层，由于AlN薄膜不含氢，故在刻蚀阻挡层成膜时，即使温度过高或过低，也不会导致沟道层还原或者刻蚀阻挡层出现孔洞的情况，进而保证了TFT的质量，而且，在AlN薄膜成膜时无需受到温度限制，降低了成膜要求，且可提高成膜速率。
附图说明
图1是本申请阵列基板一实施方式的结构示意图；
图2是本申请显示面板一实施方式的结构示意图；
图3是本申请阵列基板的制成方法一实施方式的流程图。
具体实施方式
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、接口、技术之类的具体细节，以便透彻理解本申请。然而，本领域的技术人员应当清楚，在没有这些具体细节的其它实施方式中也可以实现本申请。在其它情况中，省略对众所周知的装置、电路以及方法的详细说明，以免不必要的细节妨碍本申请的描述。
请参阅图1，图1是本申请阵列基板一实施方式的结构示意图。本实施方式中，阵列基板100包括基板110和多个TFT120(图1仅示范性示出基板110上的一个TFT120进行说明)。其中，所述基板110可以为玻璃基板或其他绝缘材料构成的透明基板。TFT120包括设置在所述基板110上的栅极121、栅绝缘层122、沟道层123、源极124、漏极125和刻蚀阻挡层126。所述栅绝缘层122叠置在所述栅极121和沟道层123之间，以将所述栅极121和沟道层123绝缘，所述源极124和漏极125、刻蚀阻挡层126位于同一层，并分别设置在所述沟道层123上且刻蚀阻挡层126设置在源极124和漏极125之间，以间隔源极124和漏极125。当栅极121获得大于或等于开启电压的电压时，沟道层123感应出电子，使源极124和漏极125导通。
其中，所述刻蚀阻挡层126为氮化铝(化学式：AlN)薄膜。AlN薄膜为良好的绝缘材料，故可对源极124和漏极125间起到很好的绝缘作用。而且，AlN薄膜具有高的击穿场强(如AlN晶体为1.2-1.8MV/cm)、高热导率、高化学和热稳定性、以及在可见光范围可具备90％以上的穿透率等特点。另外，由于AlN薄膜不含氢，故在刻蚀阻挡层成膜时，即使温度过高或过低，也不会导致沟道层还原或者刻蚀阻挡层出现孔洞的情况，进而保证了TFT的质量，而且，在AlN薄膜成膜时无需受到温度限制，降低了成膜要求，且可提高成膜速率。
在本实施方式中，所述沟道层123可由金属氧化物构成，例如为铟镓锌氧化物(英文：indiumgalliumzincoxide，简称：IGZO)。
栅绝缘层121也可为AlN薄膜，由于AlN薄膜不含氢，可避免在阵列基板工作时，栅绝缘层含氢而捕捉或释放电子，使得TFT的阈值电压出现正向或负向漂移，从而保证了TFT的稳定性。
TFT120还可包括覆盖在所述源极124和漏极125上的钝化层127。在其他实施方式中，在源极、漏极与钝化层之间还可设置硅化物层，以防止源极、漏极的Cu离子扩散到钝化层。
在上述结构中，所述栅极121、沟道层123、源极124和漏极125可采用物理气相沉积(英文：PhysicalVaporDeposition，简称：PVD)生成，上述钝化层127可采用等离子体增强化学气相沉积法(英文：PlasmaEnhancedChemicalVaporDeposition，简称：PECVD)生成。
上述AlN薄膜可以由感应耦合等离子体(简称：ICP)设备进行刻蚀、或采用PVD如磁控溅射法制备得到。
在另一实施方式中，AlN薄膜利用磁控溅射设备制备得到。例如，在铝箱(英文：AlChamber)中通入氮气、或包括氩气和氮气的混合气体，溅射形成的。其中，在通入混合气体的实施方式中，所述氩气与氮气的比值为0-90％，例如比值为0％、45％或90％。
在磁控溅射成膜过程中，基板的温度为25摄氏度-300摄氏度，例如具体为25、85或300摄氏度。故由于制备AlN薄膜如采用磁控溅射制备，无需高温，可在常温下进行，故可避免制备刻蚀阻挡层时对沟道层123的损伤，进而避免对TFT电性造成影响。而且，相对化学气相沉积(英文简称：CVD)，采用PVD制备AlN薄膜的成膜速率更高，产能得到提高。
在再一实施方式中，阵列基板还可包括设置在所述基板上的多条数据线、多条扫描线和多个像素电极(图未示出)，所述数据线与所述TFT的源极连接，所述扫描线与所述TFT的栅极连接，像素电极与所述TFT的漏极连接。当扫描线向TFT的栅极输入大于或等于启动电压的电压时，TFT的源极和漏极导通，即数据线和像素电极连接，像素电极获得数据线输入的电压。
其中，为增加像素电极的开口率，源极、漏极和像素电极可是一体结构，由透明导电薄膜构成。
请参阅图2，图2是本申请显示面板一实施方式的结构示意图。本实施方式中，显示面板包括阵列基板210、彩膜基板220和夹置在阵列基板210、彩膜基板220之间的液晶230。其中，所述阵列基板210为上面实施方式描述的阵列基板，彩膜基板220可包括基板，以及分别设置在基板上的黑矩阵、彩色滤光层(英文：ColorFilter，简称：CF)、保护层及ITO膜。阵列基板的像素电极获取数据线输入的显示电压时，与彩膜基板的ITO膜之间形成电场，从而驱动液晶230发生偏转，形成显示图像。
请参阅图3，图3是本申请阵列基板的制成方法一实施方式的流程图。所述方法包括：
310：在基板上形成栅极、栅绝缘层、沟道层，其中，所述栅绝缘层叠置在所述栅极和沟道层之间。
本实施方式中，在基板上形成栅极，在栅极上覆盖栅绝缘层，再在栅绝缘层上形成沟道层。其中，所述栅极、沟道层可采用PVD生成。栅绝缘层可以为AlN薄膜。
320：在所述沟道层上形成刻蚀阻挡层、源极和漏极，且所述刻蚀阻挡层设置在所述源极和漏极之间，其中，所述蚀刻阻挡层为AlN薄膜。
在形成沟道层后，在沟道层上分别形成AlN薄膜、源极和漏极，其中，AlN薄膜作为刻蚀阻挡层，设置在源极和漏极之间。
AlN薄膜可以由ICP设备进行刻蚀、或采用PVD如磁控溅射法制备得到。例如，AlN薄膜利用磁控溅射设备，在铝箱中通入氮气、或包括氩气和氮气的混合气体，溅射形成的。其中，在通入混合气体的实施方式中，所述氩气与氮气的比值可为0-90％，例如比值为0％、45％或90％。在磁控溅射成膜过程中，基板的温度为25摄氏度-300摄氏度，例如具体为25、85或300摄氏度。故由于制备AlN薄膜如采用磁控溅射制备，无需高温，可在常温下进行，故可避免制备刻蚀阻挡层时对沟道层的损伤，进而避免对TFT电性造成影响。而且，相对化学气相沉积(英文简称：CVD)，采用PVD制备AlN薄膜的成膜速率更高，产能得到提高。可以理解的是，当310中形成的栅绝缘层为AlN薄膜时，可采用上述同样的方法制备AlN薄膜。
在另一实施方式中，还可分别源极和漏极上形成钝化层。
具体地，所述源极和漏极可采用PVD生成，上述钝化层可采用PECVD生成。
在再一实施方式中，所述制成方法还包括在基板上形成多条扫描线、多条数据线和多个像素电极。其中，所述数据线与所述TFT的源极电接触，所述扫描线与所述TFT的栅极电接触，像素电极与所述TFT的漏极电接触。
上述方案中，采用AlN薄膜作为阵列基板的TFT的刻蚀阻挡层，由于AlN薄膜不含氢，故在刻蚀阻挡层成膜时，即使温度过高或过低，也不会导致沟道层还原或者刻蚀阻挡层出现孔洞的情况，进而保证了TFT的质量，而且，在AlN薄膜成膜时无需受到温度限制，降低了成膜要求，且可提高成膜速率。
在本申请所提供的几个实施方式中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施方式仅仅是示意性的，例如，所述模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施方式方案的目的。
另外，在本申请各个实施方式中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。

Claims (10)

1.一种阵列基板，其特征在于，包括基板和多个薄膜晶体管，所述薄膜晶体管包括设置在所述基板上的栅极、栅绝缘层、沟道层、蚀刻阻挡层、源极和漏极，所述栅绝缘层叠置在所述栅极和沟道层之间，以将所述栅极和沟道层绝缘，所述蚀刻阻挡层、源极和漏极分别设置在所述沟道层上，且所述刻蚀阻挡层设置在所述源极和漏极之间；其中，所述刻蚀阻挡层为氮化铝AlN薄膜。
2.根据权利要求1所述的阵列基板，其特征在于，所述AlN薄膜是利用磁控溅射设备，在铝箱AlChamber中通入氮气、或包括氩气和氮气的混合气体，溅射形成的。
3.根据权利要求2所述的阵列基板，其特征在于，所述氩气与氮气的比值为0-90％。
4.根据权利要求1所述的阵列基板，其特征在于，所述栅绝缘层为AlN薄膜。
5.根据权利要求1所述的阵列基板，其特征在于，所述沟道层由金属氧化物构成。
6.一种阵列基板的制成方法，其特征在于，所述方法包括：
在基板上形成栅极、栅绝缘层、沟道层，其中，所述栅绝缘层叠置在所述栅极和沟道层之间；
在所述沟道层上形成蚀刻阻挡层、源极和漏极，且所述刻蚀阻挡层设置在所述源极和漏极之间，其中，所述蚀刻阻挡层为氮化铝AlN薄膜。
7.根据权利要求6所述的方法，其特征在于，所述在所述沟道层上形成蚀刻阻挡层，包括：
利用磁控溅射设备，在铝箱AlChamber中通入氮气、或包括氩气和氮气的混合气体，以在沟道层上溅射形成AlN薄膜。
8.根据权利要求7所述的方法，其特征在于，所述氩气与氮气的比值为0-90％。
9.根据权利要求7所述的方法，其特征在于，在AlN薄膜成膜时，所述基板的温度为25摄氏度-300摄氏度。
10.一种显示面板，其特征在于，包括权利要求1至5任一项所述的阵列基板。
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