CN105099408B - Reception device - Google Patents
Reception device Download PDFInfo
- Publication number
- CN105099408B CN105099408B CN201510245837.7A CN201510245837A CN105099408B CN 105099408 B CN105099408 B CN 105099408B CN 201510245837 A CN201510245837 A CN 201510245837A CN 105099408 B CN105099408 B CN 105099408B
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- circuit
- error detection
- detection circuit
- reception device
- signal received
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- Expired - Fee Related
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- 238000001514 detection method Methods 0.000 claims abstract description 61
- 238000012545 processing Methods 0.000 claims abstract description 17
- 230000005540 biological transmission Effects 0.000 claims description 55
- 230000002159 abnormal effect Effects 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 8
- 238000010276 construction Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000009182 swimming Effects 0.000 description 2
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 102220029346 rs34541442 Human genes 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dc Digital Transmission (AREA)
Abstract
The present invention provides a kind of reception device, which includes terminating circuit (1), is entered the signal received；Processing circuit (2) is handled in the rear class of terminating circuit (1)；And error detection circuit (3), the mistake for being included to the signal received detect.In the case where detecting mistake by error detection circuit (3), reduce the termination resistance value of terminating circuit (1).Thereby, it is possible to promptly be restored when receiving the signal comprising mistake.
Description
Technical field
The present invention relates to reception device, which is promptly restored when receiving the signal comprising mistake.
Background technique
In the past, a kind of reception circuit was proposed, the reception circuit is the case where receiving from the signal that sending device is sent
Under, it prevents from receiving (such as referenced patent documents 1) such as mistakes.In the transmission of such signal, for example, having accounted for the distance of swimming
It is sent after the modulation of (run length) or DC balance from sending device, after reception device receives the signal, to data
It is demodulated.The noise robustness of this communication mode known is high.
Patent document 1: Japanese Unexamined Patent Publication 2008-219813 bulletin
But in the case where transmission lines are applied extraneous noise, particularly are applied discharge noise, charge accumulation exists
Mistake occurs in transmission lines and in the circuit of rear class, and then there are problems that being restored to normal condition needs the time.
Summary of the invention
The present invention is exactly to be completed in view of this problem, and it is an object of the present invention to provide a kind of reception device, the reception device connect
Promptly restored when receiving the signal comprising mistake.
In order to solve the above problems, comprising: terminating circuit, is entered and connects in the 1st reception device
The signal received；Processing circuit is handled in the rear class of the terminating circuit；And error detection circuit, to reception
To the signal mistake that is included detected, in the case where detecting mistake by the error detection circuit, make the end
The termination resistance value of terminal circuit reduces, the charge in transmission lines to discharge the input side for being accumulated in the terminating circuit.
The input for being accumulated in reception device can be promptly discharged by reducing termination resistance value according to the reception device
Charge in the transmission lines of side, therefore reception device can promptly be restored.
In the 2nd reception device, which is characterized in that the error detection circuit is located at the rear class of the processing circuit.
In the 3rd reception device, which is characterized in that whether the mode for the signal that the error detection circuit judgement receives
Normally, in the case where being judged as the judgement abnormal situation of result, the error detection circuit output indicates the information of mistake.
In the 4th reception device, which is characterized in that the identical value that the detection circuit is included in the signal received
In the case where continuously there is stipulated number or more, it is judged as that the mode of the signal received is abnormal.
In the 5th reception device, which is characterized in that the error detection circuit is to the signal received to repeat frequency than it
The high frequency of rate is sampled, in the case where the mode of the value sampled includes abnormal mode, the error detection electricity
Road is judged as that the mode of the signal received is abnormal.
In the 6th reception device, which is characterized in that the error detection circuit is located at the terminating circuit or the processing
The prime of circuit.
In the 7th reception device, which is characterized in that the error detection circuit detects to the terminating circuit and transmits signal
Transmission lines voltage, in the case where the voltage detected is not in prescribed limit, the error detection circuit output
Indicate the information of mistake.
In the 8th reception device, which is characterized in that the signal received is by the differential of 2 transmission lines transmission
Signal, the terminating circuit have resistance circuit network, and the resistance circuit network is connected to the node between the transmission lines,
In the case where detecting mistake by the error detection circuit, the resistance value of the resistance circuit network drops in the resistance circuit network
It is low.
Comprising: terminating circuit, is entered the signal received in the 9th reception device；Processing electricity
Road is handled in the rear class of the terminating circuit；And error detection circuit, the mistake for being included to the signal received
It is accidentally detected, in the case where detecting mistake by the error detection circuit, the reception device makes the transmission lines
It is connect with fixed current potential, so that the charge release being accumulated in the transmission lines for the input side being connect with the terminating circuit.
If connecting transmission lines with fixed current potential, the charge being accumulated in transmission lines is quickly released, therefore receives dress
Normal condition can be promptly restored to by setting.
Reception device according to the present invention can promptly be restored when receiving the signal comprising mistake.
Detailed description of the invention
Figure 1A is the block diagram of the sending/receiving system comprising reception device.
Figure 1B is the block diagram of the sending/receiving system comprising reception device.
Fig. 2A is the circuit diagram for showing the detailed construction of reception device.
Fig. 2 B is the circuit diagram for showing the detailed construction of reception device.
Fig. 3 A is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 B is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 C is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 D is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 E is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 F is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 G is the circuit diagram for showing the variation of terminating circuit.
Specific embodiment
In the following, being illustrated to the reception device that embodiment is related to.Identical label is used to identical element, and omits weight
Multiple explanation.
Figure 1A and Figure 1B is the block diagram of the sending/receiving system comprising reception device 10 and sending device 20.
Reception device 10 receives the signal sent from sending device 20.Sending device 20, which has, carries out letter using reference clock
Number coding driving circuit DV.The signal sent from sending device 20 is input to reception device 10 after propagating in transmission lines D.
Reception device 10 includes terminating circuit 1, is entered the signal received；Processing circuit 2, in terminating circuit 1
Rear class handled；And error detection circuit 3, the mistake for being included to the signal received detect.In the dress
In setting, in the case where detecting mistake by error detection circuit 3, reduce the termination resistance value of terminating circuit 1.Figure 1A is wrong
Erroneous detection slowdown monitoring circuit 3 is located at the structure in the case where the rear class of processing circuit 2, and Figure 1B is that error detection circuit 3 is located at terminating circuit 1
Or the structure in the case where the prime of processing circuit 2.
The terminal of transmission lines D when transmitting signal is configured with the terminating circuit 1 comprising terminal resistance, in multiple circuits
In be equipped with resistance value identical with the characteristic impedance of transmission lines.In previous device, the resistance value depend on specification (such as
USB, VbyOneHS, PCIe etc.), and the resistance value can not be changed.In addition, power consumption increases in general if making resistance value become smaller
Add, therefore not will do it the change for reducing resistance value in the past.
In present embodiment, reception device 10 has the error detection circuit detected to the mistake occurred by noise
3, which detects the case where transmitting extraneous noise, particularly discharge noise.In the case where detecting mistake,
Making the resistance value of terminal resistance reduces.In addition, using the coding in sending device 20 or transmission data limitation when, be easy
Detect mistake, additionally it is possible to improve error detection sensitivity.
As a result, meeting transmission specification and in the state of do not increase common power consumption, transmit as extraneous noise, particularly
When the noise of the burst as discharge noise, the recovery of data transmission is carried out in advance, as a result can be improved transmission characteristic.
In the case where discharge noise etc. is superimposed in transmission lines D, charge accumulation is in transmission lines D, transmission lines D
Current potential change, so that mistake occur in the circuit of rear class.In the case where error detection circuit 3 detects mistake,
It needs to retransmit signal from sending device 20, still, in the state that transmission lines D is electrically charged, it is difficult to normally be believed
Number transmission.Therefore, in the case where detecting mistake by error detection circuit 3, reduce the termination resistance value of terminating circuit 1.
In this case, the charge being accumulated in transmission lines is quickly released, and transmission lines can promptly be restored
To the state with normal current potential.
In figure 1A, error detection circuit 3 is located at the rear class of processing circuit 2.After error detection circuit 3 is configured at
Whether grade is actually more easily detected in signal compared with the case where being configured at preceding-stage side comprising mistake.Inspection as mistake
Survey method, it is known to various methods.
For example, there are following methods: in sending device 20, in advance carry out can to normal mode (pattern) with it is different
The modulation (coding) for the signal that norm formula is differentiated, error detection circuit 3 determine whether the mode of the signal received is normal,
In the case where being judged as the judgement abnormal situation of result, the output of error detection circuit 3 indicates the information of mistake.
It has been known that there is several such methods.
The error detection circuit 3 of Figure 1A samples the signal received with the frequency higher than its repetition rate, is adopting
In the case that the mode for the value that sample arrives includes abnormal mode, error detection circuit 3 is judged as the mode of the signal received
It is abnormal.In addition, continuously there is stipulated number or more in the identical value that the signal received is included in error detection circuit 3
In the case of, it also may determine that the mode of the signal to receive is abnormal.
In addition to this, in the case where the coding of the run-length-limited codes of the data sampled, by the mistake of receiving side
The mistake of the detection distance of swimming of detection circuit 3.
In addition, as shown in Figure 1B, error detection circuit 3 can also be located at the prime of processing circuit 2 or terminating circuit 1.?
In this case, error detection circuit 3 detects the voltage that the transmission lines D of signal is transmitted to terminating circuit 1, in the electricity detected
In the case that pressure is not in prescribed limit, error detection circuit 3 can export the information for indicating mistake.
Fig. 2A and Fig. 2 B is the circuit diagram for showing the detailed construction of above-mentioned reception device.In Fig. 2A and Fig. 2 B, passed with 2
Line sending road D1, D2 express above-mentioned transmission lines D.
As the method for the change for carrying out reducing above-mentioned termination resistance value, it is able to use resistance circuit network 11.It is this
In the case of, it is the differential wave transmitted by 2 transmission lines D1, D2 by the signal that reception device 10 receives.
Terminating circuit 1 is provided between transmission lines D1 and transmission lines D2.Terminating circuit 1 is in transmission lines D1 and passes
There is resistance R1, the R2 being connected in series between the D2 of line sending road.Tie point (node) VCOM of resistance R1 and resistance R2, i.e. transmission line
Node VCOM between road is connect with resistance circuit network 11.In resistance circuit network 11, mistake is detected by error detection circuit 3
In the case where, carry out the change for reducing the resistance value of resistance circuit network 11.
Between transmission lines D1 and node VCOM, resistance R1 is connected in parallel in resistance Ra and switch S1.In addition, transmitting
Between route D2 and node VCOM, resistance R2 is connected in parallel in resistance Rb and switch S2.In node VCOM and resistance circuit network 11
Node VCOM1 connection.
It is connected with resistance R11 between node VCOM1 and power Vcc, is connected with resistance between node VCOM1 and ground
R12, node VCOM1 are connect via switch S3 and resistance R21 with power Vcc.In addition, node VCOM1 successively via switch S3,
Resistance R22 and switch S4 and be grounded.
In the case where detecting mistake by error detection circuit 3, in fig. 2, by meeting switch S1, S2, S3 and S4
Lead to and reduce the synthesized resistance value of above-mentioned resistance, so that making the terminal resistance body of terminating circuit 1 reduces.Mistake is being not detected
In the case where, these switches S1, S2, S3 and S4 is all off.In addition, electric current is not in the case where disconnecting switch S4 when normal
Resistance R21 and resistance R22 can be flowed through, so power consumption can be reduced.
The size relation of the resistance value of preferred resistance R1, R2, Ra, Rb, R11, R12, R21 and R22 for example may be set to:
R1 with Ra is roughly equal, R2 and Rb are roughly equal, R1=R2, Ra=Rb and R11:R12=R21:R22, still, in this hair
Various modifications can be carried out in bright.In addition, about the relationship between the above-mentioned parameter indicated by roughly equal and equal sign,
It can have the relationship that a parameter value is equal to another parameter value ± 30%.
If carrying out the change for reducing the resistance value of resistance circuit network 11, it can control transmission lines D's (D1, D2)
Current potential discharges the charge being accumulated in transmission lines D (D1, D2) so as to change termination resistance value rapidly.
In addition, the processing circuit 2 of this example has buffer circuit 21 and sample circuit 22, but encoder also can be used etc. its
His processing circuit.The signal of transmission lines D1, D2 is input to sample circuit 22 via buffer circuit 21, in the case of figure 2 a,
Signal is received as digital value to export via error detection circuit 3.Error detection circuit 3 makes in the case where detecting mistake
Switch S1~S4 is connected.
In addition, in the case of fig. 2b, error detection circuit 3 detects the voltage between transmission lines D1, D2, detecting
Voltage be not in prescribed limit in the case where, the output of error detection circuit 3 indicates the information of mistake, and makes switch S1~S4
It connects.The current potential of 3 detection node VCOM of error detection circuit, in the case where the voltage detected is not in prescribed limit,
Error detection circuit 3 can also export the information for indicating mistake, and connect switch S1~S4.
In addition, the method about change termination resistance value, can also consider other methods as follows.
Fig. 3 is the circuit diagram for showing the variation of terminating circuit.
Fig. 3 A is that the example that above-mentioned node VCOM is grounded via switch S31 makes switch S31 when detecting mistake
It connects, under other usual states, disconnects switch S31.
Fig. 3 B is the example that above-mentioned node VCOM is connect via switch S31 with power Vcc, when detecting mistake,
Switch S31 is connected, under other usual states, disconnects switch S31.
Fig. 3 C is that the example that above-mentioned node VCOM is grounded via switch S31 and resistance R makes when detecting mistake
Switch S31 is connected, and under other usual states, disconnects switch S31.
Fig. 3 D is the example that above-mentioned node VCOM is connect via switch S31 and resistance R with power Vcc, is being detected
When mistake, switch S31 is connected, under other usual states, disconnects switch S31.
Fig. 3 E is that above-mentioned node VCOM is connect and via switch S31 with power Vcc via switch S31 and resistance R11
With resistance R12 and the example that is grounded connects switch S31 when detecting mistake, under other usual states, make switch S31
It disconnects.
In addition, as illustrated in Figure 3 F, can also directly discharge the charge being accumulated in transmission lines.
That is, reception device includes terminating circuit 1, it is entered the signal received；Processing circuit 2, in terminating circuit
1 rear class is handled；And error detection circuit 3, the mistake for being included to the signal received detects, by mistake
In the case that erroneous detection slowdown monitoring circuit 3 detects mistake, transmission lines D1, D2 are connect with fixation current potential, so that being accumulated in and end
Charge release in transmission lines D1, D2 for the input side that terminal circuit 1 connects.Transmission lines D1 via switch S3a and and power supply
Vcc connection, transmission lines D2 are grounded via switch S3b.If making transmission lines D fix current potential with these to connect, because
The charge being accumulated in transmission lines D1, D2 is quickly released, so reception device 10 can promptly be restored to normal shape
State.It when detecting mistake, connects switch S3a with switch S3b, under other usual states, makes switch S3a and switch S3b
It disconnects.
In addition, in such a configuration, differential input is illustrated, but is inputted in signal via single transmission lines
It, can also be using the present invention in the case where structure as buffer circuit 21.That is, as shown in Figure 3 G, in transmission lines D and section
Between point VCOM, resistance R1 is connected in parallel in resistance Ra and switch S1, can on node VCOM connection figure 3A~Fig. 3 E electricity
Line structure.
In addition, the current potential of node VCOM is determined by resistance circuit network 11.Even if being also able to maintain that section when resistance value reduces
The current potential of point VCOM be it is constant, have the effect of restoring in advance transmitting.
It is as described above, according to above-mentioned circuit structure, by only just reducing termination resistance value when detecting mistake,
Charge can be discharged from terminating circuit 1 according to termination resistance value.Data cannot be normally transmitted before charge releases, in electricity
Lotus can transmit data after releasing again.Termination resistance value is bigger, then normally time needed for restoring data again
It is longer, but in the present invention, so that termination resistance value is become smaller, therefore, the time of charge release can be shortened, and meet specification and
The convergence of voltage is improved in the case where power when not changing usual work, so as to improve transmission characteristic.
Claims (9)
1. a kind of reception device, which is characterized in that the reception device includes
Terminating circuit is entered the signal received；
Processing circuit is handled in the rear class of the terminating circuit；And
Error detection circuit, the mistake for being included to the signal received detect,
In the case where detecting mistake by the error detection circuit, reduce the termination resistance value of the terminating circuit, with
Discharge the charge in the transmission lines for the input side for being accumulated in the terminating circuit.
2. reception device according to claim 1, which is characterized in that
The error detection circuit is located at the rear class of the processing circuit.
3. reception device according to claim 1, which is characterized in that
The error detection circuit determines whether the mode of the signal received is normal, determines the abnormal feelings of result being judged as
Under condition, the error detection circuit output indicates the information of mistake.
4. reception device according to claim 3, which is characterized in that
Continuously there is the situation of stipulated number or more in the identical value that the signal received is included in the error detection circuit
Under, it is judged as that the mode of the signal received is abnormal.
5. reception device according to claim 3, which is characterized in that
The error detection circuit samples the signal received with the frequency higher than its repetition rate, in the value sampled
Mode include abnormal mode in the case where, the error detection circuit judges be the mode of the signal received not just
Often.
6. reception device according to claim 1, which is characterized in that
The error detection circuit is located at the prime of the terminating circuit or the processing circuit.
7. reception device according to claim 6, which is characterized in that
The error detection circuit detects the voltage of the transmission lines to terminating circuit transmission signal, in the voltage detected
In the case where being not in prescribed limit, the error detection circuit output indicates the information of mistake.
8. reception device according to claim 1, which is characterized in that
The signal received is the differential wave transmitted by 2 transmission lines,
The terminating circuit has resistance circuit network, and the resistance circuit network is connected to the node between the transmission lines,
In the case where detecting mistake by the error detection circuit, the resistance circuit network makes the electricity of the resistance circuit network
Resistance value reduces.
9. a kind of reception device, which is characterized in that the reception device includes
Terminating circuit is entered the signal received；
Processing circuit is handled in the rear class of the terminating circuit；And
Error detection circuit, the mistake for being included to the signal received detect,
In the case where detecting mistake by the error detection circuit, make the transmission for the input side connecting with the terminating circuit
Route is connect with fixed current potential, so that the charge release being accumulated in the transmission lines.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014102335A JP6371111B2 (en) | 2014-05-16 | 2014-05-16 | Receiver |
| JP2014-102335 | 2014-05-16 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105099408A CN105099408A (en) | 2015-11-25 |
| CN105099408B true CN105099408B (en) | 2019-10-25 |
Family
ID=54539402
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510245837.7A Expired - Fee Related CN105099408B (en) | 2014-05-16 | 2015-05-14 | Reception device |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9712344B2 (en) |
| JP (1) | JP6371111B2 (en) |
| CN (1) | CN105099408B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9541990B2 (en) | 2015-04-21 | 2017-01-10 | Cypress Semiconductor Corporation | Asynchronous transceiver for on-vehicle electronic device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014049752A1 (en) * | 2012-09-26 | 2014-04-03 | 富士通株式会社 | Data transmission device and data transmission method |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3783281B2 (en) * | 1996-02-08 | 2006-06-07 | ソニー株式会社 | Data decoding device |
| JP3788928B2 (en) * | 2001-11-01 | 2006-06-21 | 株式会社ルネサステクノロジ | Resistance variable |
| JP4179883B2 (en) * | 2003-01-08 | 2008-11-12 | Ｎｅｃエレクトロニクス株式会社 | Termination resistor device, data transmission device, and termination resistor circuit inspection method |
| US7205789B1 (en) * | 2004-08-26 | 2007-04-17 | Chris Karabatsos | Termination arrangement for high speed data rate multi-drop data bit connections |
| JP4798618B2 (en) * | 2006-05-31 | 2011-10-19 | ルネサスエレクトロニクス株式会社 | Output circuit and semiconductor integrated circuit device |
| JP2008219813A (en) | 2007-03-07 | 2008-09-18 | Sharp Corp | Lvds receiver, lvds receiving method, lvds data transmission system, and semiconductor device |
| JP5465376B2 (en) * | 2007-10-18 | 2014-04-09 | ピーエスフォー ルクスコ エスエイアールエル | Semiconductor device and driver control method |
| JP4482048B2 (en) * | 2008-05-30 | 2010-06-16 | 株式会社日本自動車部品総合研究所 | Receiver |
| JP5407524B2 (en) * | 2009-04-27 | 2014-02-05 | 富士通株式会社 | TRANSMISSION DEVICE, RECEPTION CIRCUIT, AND TRANSMISSION DEVICE CONTROL METHOD |
| US8760188B2 (en) * | 2011-06-30 | 2014-06-24 | Silicon Image, Inc. | Configurable multi-dimensional driver and receiver |
-
2014
- 2014-05-16 JP JP2014102335A patent/JP6371111B2/en active Active
-
2015
- 2015-05-14 US US14/712,298 patent/US9712344B2/en active Active
- 2015-05-14 CN CN201510245837.7A patent/CN105099408B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014049752A1 (en) * | 2012-09-26 | 2014-04-03 | 富士通株式会社 | Data transmission device and data transmission method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105099408A (en) | 2015-11-25 |
| US9712344B2 (en) | 2017-07-18 |
| US20150333869A1 (en) | 2015-11-19 |
| JP2015220579A (en) | 2015-12-07 |
| JP6371111B2 (en) | 2018-08-08 |
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