CN105022589A - Electronic device and operation method thereof - Google Patents
Electronic device and operation method thereof Download PDFInfo
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- CN105022589A CN105022589A CN201410177348.8A CN201410177348A CN105022589A CN 105022589 A CN105022589 A CN 105022589A CN 201410177348 A CN201410177348 A CN 201410177348A CN 105022589 A CN105022589 A CN 105022589A
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- microcontroller
- dynamic ram
- electronic installation
- nonvolatile memory
- speed cache
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Abstract
The invention discloses an electronic device. The electronic device comprises a micro-controller, a nonvolatile memory, a dynamic random access memory, an image processing unit, a high-speed cache and an interface switching unit, wherein the nonvolatile memory is used for storing instructions used by the micro-controller; the dynamic random access memory is used for storing image data and loading the instructions of the micro-controller after the electronic device starts; the image processing unit is coupled to the dynamic random access memory and is used for accessing image data; the high-speed cache is coupled to the micro-controller; and the interface switching unit is coupled to the high-speed cache, the nonvolatile memory and the dynamic random access memory. When the micro-controller cannot successfully read the instructions from the high-speed cache, the interface switching unit dynamically switches, so that the micro-controller reads the instructions from the nonvolatile memory or from the dynamic random access memory.
Description
Technical field
The invention relates to a kind of electronic installation, and relate to a kind of electronic installation of image procossing especially.
Background technology
Along with development in science and technology and portable electronic product make rapid progress, image procossing has been technology indispensable in present most electronic product, no matter be in flat computer, mobile phone or projection arrangement, all need by image procossing mode to show image.By by image data storage in storer, and with read and write storer mode, to carry out the image procossing of being correlated with.
But along with the requirement for screen resolution promotes, the frequency reading storer and write and data volume increase gradually.For 720p and resolution is the image of 60, have 60 pictures a second, each picture has 1080x720 pixel, and each pixel has the sub-pixel of RGB 3 colors, quite huge to the access amount of storer.When to memory access view data, if microcontroller now from memory read data, namely need may cause memory band width to be not enough to the problem of load, can cause Missing data, user will watch float or the phenomenon of broken figure occurs.
Therefore, how solving the float occurred when memory band width is not enough and break figure problem, is one of problem of endeavouring of current industry.
Summary of the invention
The invention relates to a kind of electronic installation and method of operating thereof.
According to a first aspect of the invention, propose a kind of electronic installation, comprise microcontroller, nonvolatile memory, dynamic RAM, graphics processing unit, high-speed cache, interface switch unit.The instruction that nonvolatile memory uses in order to store microcontroller.Dynamic RAM in order to store images data, and after electronic installation starts, loads the instruction of microcontroller from nonvolatile memory.Graphics processing unit is coupled to dynamic RAM, in order to accessing image data.High-speed cache is coupled to microcontroller.Interface switch unit, is coupled to high-speed cache, nonvolatile memory and dynamic RAM.When microcontroller needs reading command, microcontroller is preferentially from high-speed cache reading command, when microcontroller cannot successfully from high-speed cache reading command time, interface switch unit dynamically switches, and makes microcontroller from nonvolatile memory reading command or from dynamic RAM reading command.Microcontroller is be stored in high-speed cache from the instruction that dynamic RAM read.
According to a further aspect in the invention, propose a kind of method of operating of electronic installation, comprising: the instruction used with non-volatile memory storage microcontroller; With dynamic RAM store images data, and after electronic installation starts, load the instruction of microcontroller from nonvolatile memory; With elementary area accessing image data; And when microcontroller needs reading command, microcontroller is preferentially from high-speed cache reading command, when microcontroller cannot successfully from high-speed cache reading command time, dynamically switch with interface switch unit, make microcontroller from nonvolatile memory reading command or from dynamic RAM reading command; Wherein, microcontroller is be stored in high-speed cache from the instruction that dynamic RAM read.
In order to have better understanding, preferred embodiment cited below particularly to above-mentioned and other side of the present invention, and coordinating institute's accompanying drawings, being described in detail below.
Accompanying drawing explanation
Fig. 1 illustrates the schematic diagram of the electronic installation according to the embodiment of the present invention.
Fig. 2 illustrates the schematic diagram of the electronic installation according to another embodiment of the present invention.
[label declaration]
10,12: electronic installation 100: microcontroller
102: nonvolatile memory 104: dynamic RAM
106: graphics processing unit 108: high-speed cache
110: interface switch unit 112: memory control unit
114: bus
Embodiment
In image processing apparatus, dynamic RAM (Dynamic Random AccessMemory, DRAM) is in order to store images data.Such as in a projection arrangement, when view data inputs, constantly data can be write DRAM, and when output image data, then need constantly to read DRAM.
But DRAM is also in order to store the instruction (instruction) needed for microcontroller (microcontroller) execution, and therefore in the process of device operation, microcontroller also needs to access DRAM.Due to the characteristic of view data, be access in the mode of continuity address for DRAM, and image-receptive and image player often have the demand of (real time) in real time.If when DRAM is carrying out the continuation address access of great amount of images data, microcontroller need from DRAM reading command, namely the continuation address access interrupted originally is inserted, make to skip to DRAM address far away, DRAM frequency range then may be caused to be not enough to load, the access speed of DRAM does not catch up with the demand play in real time, causes picture to break the phenomenon of figure.
For solving the problem, between microcontroller and DRAM, increasing the storer of a stratum, being called high-speed cache (cache memory).The instruction that microcontroller read from DRAM is stored in high-speed cache, namely keeps in high-speed cache the data that microcontroller often uses.When microcontroller needs reading command afterwards, preferentially read from high-speed cache, if be present in high-speed cache, namely can successfully read (cache hit), and the action without the need to accessing DRAM, the unlikely access interrupting view data.
But consider with regard to actual hardware, the limited space of high-speed cache, can exist and cannot successfully occur (cache miss) from the situation of high-speed cache reading command, now still need from DRAM reading command.Therefore, the present invention proposes a kind of by using the mode of high-speed cache, nonvolatile memory and interface switch unit, to reduce the demand of system for DRAM frequency range, and takes into account the usefulness of microcontroller simultaneously.
Fig. 1 illustrates the schematic diagram of the electronic installation according to the embodiment of the present invention.Electronic installation 10 comprises microcontroller 100, nonvolatile memory 102, dynamic RAM 104, graphics processing unit 106, high-speed cache 108 and interface switch unit 110.Hereby each element function is described in detail as follows.
Microcontroller 100 controls the running of electronic installation 10, and multiple instructions that nonvolatile memory 102 uses in order to store microcontroller 100.Even if because nonvolatile memory 102 is not when having power supply to supply, still can storage data, no matter the on off state of therefore electronic installation 10, nonvolatile memory 102 all stably can store multiple instructions that microcontroller 100 uses.Nonvolatile memory 102 is such as flash memory (flash memory).
Compared to nonvolatile memory 102, the access speed of dynamic RAM 104 is very fast.Therefore after electronic installation 10 starts, dynamic RAM 104 loads from nonvolatile memory 102 multiple instructions that microcontroller 100 uses, and makes microcontroller 100 can from dynamic RAM 104 reading command.In addition, dynamic RAM 104 is also in order to the view data of store images process use.Dynamic RAM 104 is such as double data rate dynamic RAM (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM).
Graphics processing unit 106 is coupled to dynamic RAM 104, in order to accessing image data, comprises write and reads dynamic RAM 104.Graphics processing unit 106 can be connected to provides projected image source person (such as outside computing machine), writes view data to dynamic RAM 104.Graphics processing unit 106 also can be the unit of playing image, to dynamic RAM 104 reads image data.
High-speed cache 108 is coupled to microcontroller 100.Microcontroller 100 is be stored in high-speed cache 108 from the instruction that dynamic RAM 104 read.When microcontroller 100 needs reading command, microcontroller 100 is preferential from high-speed cache 108 reading command, so can have preferably usefulness, and can avoid accessing dynamic RAM 104.
Interface switch unit 110 is coupled to high-speed cache 108, nonvolatile memory 102 and dynamic RAM 104.When microcontroller 100 needs reading command, microcontroller 100 is preferential from high-speed cache 108 reading command, when microcontroller 100 cannot successfully from high-speed cache 108 reading command time, interface switch unit 110 dynamically switches, and makes microcontroller 100 from nonvolatile memory 102 reading command or from dynamic RAM 104 reading command.
Specifically, when microcontroller 100 cannot successfully from high-speed cache 108 reading command time, interface switch unit 110 dynamically switches the source of microcontroller 100 reading command, is switch between nonvolatile memory 102 and dynamic RAM 104.From dynamic RAM 104 reading command speed, but likely have influence on the view data access of well afoot, therefore cause the image quality decrease shown.For taking picture quality into account, microcontroller 100 can from nonvolatile memory 102 reading command, but reading speed is slower.
The situation that interface switch unit 110 can use according to current dynamic RAM 104 dynamically switches, such as, according to utilization rate and the data transmitting bandwidth of dynamic RAM 104.When graphics processing unit 106 just carries out the access of great amount of images data to dynamic RAM 104, the data transmitting bandwidth used is larger, this appropriate to the occasion microcontroller 100 that preferably makes is from nonvolatile memory 102 reading command, avoid the access having influence on view data, namely reduce the usefulness of some microcontrollers 100 a little, but improve the stabilised quality of image.
Interface switch unit 110 also dynamically can switch according to the usefulness of microcontroller 100.Such as when finding that microcontroller 100 usefulness deficiency needs to promote, being namely switched to and reading dynamic RAM 104, to promote the speed of reading.
Interface switch unit 110 also dynamically can switch according to the state of graphics processing unit 106 from dynamic RAM 104 accessing image data.For example, a picture has the pixel of multiple row (row), when view data being carried out scanning by column broadcasting, has free time when being scanned up between the column and the column, does not temporarily read the action of dynamic RAM 104.When being scanned up to the last pixel of a row image, because graphics processing unit 106 does not access dynamic RAM 104, the source of microcontroller 100 reading command is switched to dynamic RAM 104 by interface switch unit 110.And when starting to scan next column image, then can be switched to and read from nonvolatile memory 102.
Interface switch unit 110 also dynamically can be switched by user's manual operation.For example, when from screen, user sees that shake or broken figure occur the image of actual displayed, user can Non-follow control, such as by control one physical switches or touch a button on screen-picture, interface switch unit 110 is switched to read from nonvolatile memory 102, to reduce the frequency that microcontroller 100 reads from dynamic RAM 104.
Fig. 2 illustrates the schematic diagram of the electronic installation according to another embodiment of the present invention.Electronic installation 12 in this embodiment and previous embodiment difference, be that electronic installation 12 also comprises memory control unit 112, be coupled between interface switch unit 110 and nonvolatile memory 102, memory control unit 112 is in order to control accessing non-volatile memory 102.Wherein nonvolatile memory 102 is such as the serial interfaces flash memory using list type interface, memory control unit 112 is such as sequence Peripheral Interface Controller (Serial Peripheral Interface controller, SPI controller).Use list type interface can reduce the quantity of line, reduce overall cost.
Electronic installation 12 can also comprise a bus 114, and microcontroller 100 and high-speed cache 108 are all connected to bus 114, passes through bus 114 pass-along message between microcontroller 100 and high-speed cache 108.Bus 114 is such as advanced Microcontroller Bus Architecture high-level efficiency bus (Advanced MicrocontrollerBus Architecture High-Performance Bus, AHB).
Electronic installation in the present invention is such as to hold formula electronic installation, as the mobile device such as mobile phone and flat computer.In the mobile device, due to the consideration of power saving, without the need to using the very high dynamic RAM of operating frequency.In such mobile device, easily produce the situation that memory band width is not enough to load when carrying out image procossing.Use the present invention's electronic installation as above, opportunity of dynamic RAM can be read by dynamic conditioning microcontroller, make when dynamic RAM just busy in accessing image data time, microcontroller can from nonvolatile memory reading command.In addition, the electronic installation in the present invention is such as again the electronic installation with projecting function, such as, be minitype projection machine or the mobile phone with projecting function.
The present invention also proposes a kind of method of operating of electronic installation, comprising: with the instruction of non-volatile memory storage microcontroller; With dynamic RAM store images data, and after electronic installation starts, load the instruction of microcontroller from nonvolatile memory; With elementary area accessing image data; And when microcontroller needs reading command, microcontroller is preferentially from high-speed cache reading command, when microcontroller cannot successfully from high-speed cache reading command time, dynamically switch with interface switch unit, make microcontroller from nonvolatile memory reading command or from dynamic RAM reading command; Wherein, microcontroller is be stored in high-speed cache from the instruction that dynamic RAM read.
In the above-mentioned electronic installation of the embodiment of the present invention and method of operating thereof, owing to switching the source of microcontroller reading command with interface switch unit, can effectively avoid dynamic RAM frequency range to can't bear the problem of load, its concrete effect can be reflected in the image of actual displayed.Compared to the mode of tradition access dynamic RAM, display image when frequency range can't bear load has brokenly figure phenomenon, use electronic installation described above, when causing the utilization rate height of dynamic RAM because of a large amount of view data, can switch and make microcontroller from nonvolatile memory reading command, namely decline a little the usefulness of some microcontrollers within the scope of tolerable, but improve the quality of display image, can see that in actual measurement display image has not had brokenly figure, and the better viewing experience of user can be supplied to.
In addition, the interface switch unit system in the present invention dynamically switches, and namely can adjust according to actual user demand, use and have better elasticity.Such as when microcontroller usefulness is not enough, be switched to reading dynamic RAM, when dynamic RAM frequency range is not enough, be switched to reading non-volatile storage.Such as dynamically can switch according to the state of view data again, or can be decided in its sole discretion the opportunity of switching by user.Therefore, it is possible to make preferably corresponding adjustment mode according to electronic installation situation at that time, also can set according to the demand of user, not only maintain good image quality, use also have more elasticity and simple to operate.
In sum, although the present invention with preferred embodiment disclose as above, so itself and be not used to limit the present invention.Persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when being as the criterion depending on the appended right person of defining.
Claims (18)
1. an electronic installation, comprising:
One microcontroller;
One nonvolatile memory, in order to store multiple instructions that this microcontroller uses;
One dynamic RAM, in order to store a view data, and after this electronic installation starts, loads the plurality of instruction of this microcontroller from this nonvolatile memory;
One graphics processing unit, is coupled to this dynamic RAM, in order to access this view data;
One high-speed cache, is coupled to this microcontroller; And
One interface switch unit, is coupled to this high-speed cache, this nonvolatile memory and this dynamic RAM;
Wherein, when this microcontroller need read the plurality of instruction at least one of them time, this microcontroller preferentially from this high-speed cache read the plurality of instruction at least one of them, when this microcontroller cannot successfully from this high-speed cache read the plurality of instruction at least one of them time, this interface switch unit dynamically switches, make this microcontroller from this nonvolatile memory read the plurality of instruction at least one of them or from this dynamic RAM read the plurality of instruction at least one of them;
Wherein, this microcontroller is be stored in this high-speed cache from the finger that this dynamic RAM read.
2. electronic installation according to claim 1, wherein this interface switch unit dynamically switches according to the utilization rate of this dynamic RAM and data transmitting bandwidth.
3. electronic installation according to claim 1, wherein this interface switch unit dynamically switches according to the usefulness of this microcontroller.
4. electronic installation according to claim 1, the state that wherein this interface switch unit accesses this view data according to this graphics processing unit from this dynamic RAM dynamically switches.
5. electronic installation according to claim 1, wherein this interface switch unit is dynamically switched by user's manual operation.
6. electronic installation according to claim 1, wherein this nonvolatile memory is a flash memory, and this dynamic RAM is a double data rate dynamic RAM.
7. electronic installation according to claim 1, also comprises a memory control unit, is coupled between this interface switch unit and this nonvolatile memory, in order to control this nonvolatile memory of access.
8. electronic installation according to claim 7, wherein this memory control unit is a sequence Peripheral Interface Controller.
9. electronic installation according to claim 1, wherein this microcontroller and this high-speed cache are all connected to a bus.
10. electronic installation according to claim 9, wherein this bus is an advanced Microcontroller Bus Architecture high-level efficiency bus.
11. electronic installations according to claim 1, wherein formula electronic installation to be held by this electronic installation.
12. electronic installations according to claim 1, wherein this electronic installation is the electronic installation with projecting function.
The method of operating of 13. 1 kinds of electronic installations, this electronic installation comprises a microcontroller, a nonvolatile memory, a dynamic RAM, a graphics processing unit is coupled to this dynamic RAM, a high-speed cache is coupled to this microcontroller and an interface switch unit is coupled to this high-speed cache, this nonvolatile memory and this dynamic RAM, and this method of operating comprises:
With multiple instructions that this microcontroller of this non-volatile memory storage uses;
Store a view data with this dynamic RAM, and load the plurality of instruction of this microcontroller from this nonvolatile memory after this electronic installation starts;
This view data is accessed with this elementary area; And
When this microcontroller need read the plurality of instruction at least one of them time, this microcontroller preferentially from this high-speed cache read the plurality of instruction at least one of them, when this microcontroller cannot successfully from this high-speed cache read the plurality of instruction at least one of them time, dynamically switch with this interface switch unit, make this microcontroller from this nonvolatile memory read the plurality of instruction at least one of them or from this dynamic RAM read the plurality of instruction at least one of them;
Wherein, this microcontroller is be stored in this high-speed cache from the instruction that this dynamic RAM read.
14. methods of operating according to claim 11, also comprise and control this nonvolatile memory of access with a memory control unit, this memory control unit is coupled between this interface switch unit and this nonvolatile memory.
15. methods of operating according to claim 11, wherein this interface switch unit dynamically switches according to the utilization rate of this dynamic RAM and data transmitting bandwidth.
16. methods of operating according to claim 11, wherein this interface switch unit dynamically switches according to the usefulness of this microcontroller.
17. methods of operating according to claim 11, the state that wherein this interface switch unit accesses this view data according to this graphics processing unit from this dynamic RAM dynamically switches.
18. methods of operating according to claim 11, wherein this interface switch unit is dynamically switched by user's manual operation.
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| CN201410177348.8A CN105022589A (en) | 2014-04-29 | 2014-04-29 | Electronic device and operation method thereof |
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| CN201410177348.8A CN105022589A (en) | 2014-04-29 | 2014-04-29 | Electronic device and operation method thereof |
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| CN107025190A (en) * | 2016-02-02 | 2017-08-08 | 爱思开海力士有限公司 | System and its operating method |
| CN108228471A (en) * | 2016-12-14 | 2018-06-29 | 旺宏电子股份有限公司 | Manage the method and system of the entity information of memory cell in memory device |
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| US20090222653A1 (en) * | 2008-02-29 | 2009-09-03 | Ralf Findeisen | Computer system comprising a secure boot mechanism |
| CN101986286A (en) * | 2009-07-28 | 2011-03-16 | 联发科技股份有限公司 | Embedded system and managing method thereof |
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| CN101236526A (en) * | 2007-01-30 | 2008-08-06 | 扬智科技股份有限公司 | Computer system having cache system directly connected to nonvolatile storage device |
| US20090222653A1 (en) * | 2008-02-29 | 2009-09-03 | Ralf Findeisen | Computer system comprising a secure boot mechanism |
| CN101986286A (en) * | 2009-07-28 | 2011-03-16 | 联发科技股份有限公司 | Embedded system and managing method thereof |
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| CN107025190A (en) * | 2016-02-02 | 2017-08-08 | 爱思开海力士有限公司 | System and its operating method |
| CN107025190B (en) * | 2016-02-02 | 2021-04-13 | 爱思开海力士有限公司 | System and method of operation thereof |
| CN108228471A (en) * | 2016-12-14 | 2018-06-29 | 旺宏电子股份有限公司 | Manage the method and system of the entity information of memory cell in memory device |
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Application publication date: 20151104 |