CN104953813B - Method and apparatus for preventing pfc power factor correction circuit of the output voltage of the overvoltage - Google Patents

Method and apparatus for preventing pfc power factor correction circuit of the output voltage of the overvoltage Download PDF

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CN104953813B
CN104953813B CN 201510367622 CN201510367622A CN104953813B CN 104953813 B CN104953813 B CN 104953813B CN 201510367622 CN201510367622 CN 201510367622 CN 201510367622 A CN201510367622 A CN 201510367622A CN 104953813 B CN104953813 B CN 104953813B
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CN 201510367622
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CN104953813A (en )
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黄招彬
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广东美的制冷设备有限公司
美的集团股份有限公司
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Abstract

本发明公开了一种防止PFC电路的输出电压过压的方法和装置,方法包括以下步骤:检测PFC电路的输入电流瞬时值和输入电压瞬时值,并根据输入电流瞬时值计算输入电流平均值检测PFC电路输出端的直流母线电压值,并获取直流母线电压给定,以及根据直流母线电压值和直流母线电压给定获取PFC电路的升压比Ka;根据升压比Ka、输入电流瞬时值和输入电流平均值计算PFC电路中功率开关管的占空比;获取PFC电路输出端的电解电容的耐压上限值,并根据耐压上限值和输入电压瞬时值Vin计算占空比的上限限幅,以及根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压,从而可以防止直流母线电压过高,避免设备中的器件因过压而损坏。 The present invention discloses a method for preventing the output voltage of the PFC circuit overpressure apparatus and method, the method comprising the steps of: an input current instantaneous value and the input voltage instantaneous value detection circuit PFC, and calculates the average input current instantaneous value of the input current detection DC bus voltage value of the output of the PFC circuit, and acquires the DC bus voltage reference, and a given ratio of acquiring boost PFC circuit is the DC bus voltage value Ka and the DC bus voltage; Ka the boost ratio, the input current instantaneous value and the input the average duty cycle of the current calculation power switch in the PFC circuit; obtaining electrolytic capacitor voltage upper limit value of the output of the PFC circuit, and the duty ratio is calculated according to the input voltage value and instantaneous value of the voltage Vin is a limiter and the upper limit of the duty cycle limiter output duty cycle of the power switch to be limited according to the output voltage of the PFC circuit to prevent overvoltage, thereby preventing the DC bus voltage is too high, to avoid the device from overvoltage device damage.

Description

防止功率因数校正PFC电路的输出电压过压的方法和装置 Method and apparatus for preventing power factor correction circuit PFC output voltage overpressure

技术领域 FIELD

[0001]本发明涉及家用电器技术领域,特别涉及一种防止功率因数校正PFC电路的输出电压过压的方法以及一种防止功率因数校正PFC电路的输出电压过压的装置。 [0001] The present invention relates to the technical field of household appliances, in particular, relates to a device for power factor correction (PFC) circuit, the output voltage of the overvoltage method and a power factor correction (PFC) circuit to prevent output overvoltage prevention.

背景技术 Background technique

[0002]在家用空调等设备中,为提高电源功率因数,通常在不可控全桥整流电路之后连接PFC电路例如Boost型功率因数校正电路,并在PFC电路之后连接大容量电解电容和负载(例如开关电源和压缩机等),这样,通过PFC电路不仅可以达到较高的功率因数,而且可以升压输出稳定的直流电压,给负载提供稳定的直流电源。 After [0002] In the home air conditioners and other equipment in order to improve power factor, typically uncontrolled full bridge rectifier circuit connected to the PFC circuit, for example, the Boost power factor correction circuit, and is connected to a large-capacity electrolytic capacitor and the load after the PFC circuit (e.g. switching power supply and a compressor, etc.), so that, not only the PFC circuit can achieve high power factor, and can output a stable boosted DC voltage to the load to provide a stable DC power supply.

[0003]在相关技术中,可采用单周期PFC控制算法对Boost型功率因数校正电路进行控制,具体地,单周期PFC控制算法可通过电压外环和单周期电流内环计算出PFC电路中开关管的占空比。 [0003] In the related art, can be a single cycle of Boost PFC control algorithm for controlling a power factor correction circuit, specifically, the single-cycle algorithm PFC control voltage can be calculated by the outer and inner current single cycle switch PFC circuit duty cycle tube. 但是,相关技术存在的缺点是,在直流母线电压给定较高电压(接近预设上限电压)时,电压外环的输出可能发生超调,进而引起直流母线电压过高,造成设备中的器件损坏;或者在直流母线电压稳定在较高电压(接近预设上限电压)时,输入电流的下降也可能导致直流母线电压过高,进而造成设备中的器件损坏。 However, the disadvantage of the related art, in a given high voltage DC bus voltage (near the upper limit of the preset voltage), the output of the outer loop voltage overshoot may occur, thereby causing the DC bus voltage too high, resulting in equipment device damage; or when the DC bus voltage at a higher voltage (closer to the upper limit preset voltage), the input current may drop causing the DC link voltage is too high, thereby causing damage to the device apparatus. 因此,相关技术需要改进。 Therefore, the relevant technology needs to be improved.

发明内容 SUMMARY

[0004]本发明旨在至少在一定程度上解决相关技术中的技术问题之一。 [0004] The present invention to solve at least to some extent, one of the technical issues related to technology. 为此,本发明的一个目的在于提出一种防止功率因数校正PFC电路的输出电压过压的方法,该方法能够防止直流母线电压过高,避免设备中的器件因过压而损坏。 To this end, an object of the present invention is to provide a method for power factor correction (PFC) circuit for preventing the output voltage of the overvoltage, the method can prevent the DC bus voltage too high to avoid equipment damage from overvoltage device.

[0005]本发明的另一个目的在于提出一种防止功率因数校正PFC电路的输出电压过压的装置。 [0005] Another object of the present invention is to provide an apparatus for power factor correction circuit PFC output voltage to prevent overvoltage.

[0006]为达到上述目的,本发明实施例提出了一种防止功率因数校正PFC电路的输出电压过压的方法,包括以下步骤:检测所述PFC电路的输入电流瞬时值Iinst和所述PFC电路的输入电压瞬时值Vin,并根据所述输入电流瞬时值nnst计算输入电流平均值lavg;检测所述PFC电路输出端的直流母线电压值Vdc,并获取所述PFC电路输出端的直流母线电压给定Vdc_ref,以及根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref获取所述PFC 电路的升压比Ka;根据所述PFC电路的升压比Ka、所述输入电流瞬时值Iinst和所述输入电流平均值Iavg计算所述PFC电路中功率开关管的占空比;获取所述PFC电路输出端的电解电容的耐压上限值Vdc_limit,并根据所述耐压上限值Vdc_limit和所述输入电压瞬时值Vin 计算所述占空比的上限限幅,以及根据所述占空比的上限限幅对输出到所述功率开关管的占空比进 [0006] To achieve the above object, an embodiment of a method of preventing the power factor correction circuit PFC output overvoltage present invention, comprising the steps of: detecting an input current instantaneous value Iinst the PFC circuit and the PFC circuit the instantaneous value of the input voltage Vin, and to the input current instantaneous value according to the calculated average input current nnst LAVG; DC bus voltage detecting circuit output of the PFC DC bus voltage value Vdc, and acquiring the output of the PFC circuit is given Vdc_ref , and acquires the boost ratio Ka given Vdc_ref PFC circuit according to the DC bus voltage value Vdc and the DC bus voltage; boosting ratio Ka according to the PFC circuit, the input current instantaneous value and the Iinst said input average current Iavg of the duty cycle of the PFC circuit power switch; obtaining electrolytic capacitor voltage on the output terminal of the PFC circuit limits Vdc_limit, and according to the pressure value and the Vdc_limit calculating the instantaneous value of the input voltage Vin of the duty ratio upper limit limiter, and in accordance with the duty ratio upper limit limiter to the output of the duty cycle of the power switch into 行限制以防止所述PFC电路的输出电压发生过压。 OK limited to prevent the output voltage of the PFC circuit overvoltage.

[0007]根据本发明实施例提出的防止功率因数校正PFC电路的输出电压过压的方法,获取PFC电路输出端的电解电容的耐压上限值Vdc_limit,并根据耐压上限值VdC_limit和输入电压瞬时值Vin计算占空比的上限限幅,之后根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压。 [0007] The method of preventing the power factor correction circuit PFC output voltage overpressure proposed embodiment of the present invention, on obtaining an electrolytic capacitor voltage is the output of the PFC circuit limits Vdc_limit, and according to the pressure limit value and the input voltage VdC_limit the instantaneous value of Vin is calculated an upper limit limiter duty, after clipping the upper limit of the duty ratio of the duty cycle of the power switch output to be limited according to the output voltage of the PFC circuit to prevent overvoltage. 由此,通过在将功率开关管的占空比输出之前对占空比进行限幅,可以达到防止输出电压过高的目的,进而防止直流母线电压过高,避免设备中的器件因过压而损坏。 Thus, the duty ratio by the duty ratio before clipping the output of the power switch, to prevent the output voltage is too high to achieve the purpose, thereby preventing the DC bus voltage is too high, to avoid the device from overvoltage device damage.

[0008] 根据本发明的一个实施例,可据以下公式计算所述占空比的上限限幅: [0008] According to an embodiment of the present invention, the duty ratio may be calculated according to the following formula a limiter:

[0009] Duty_max = 1-Vin/Vdc_limit [0009] Duty_max = 1-Vin / Vdc_limit

[0010] 其中,Duty_max为所述占空比的上限限幅。 [0010] wherein, Duty_max is the duty of a limiter.

[0011] 根据本发明的一个实施例,根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref获取所述PFC电路的升压比Ka,具体包括:计算所述直流母线电压给定Vdc_ref与所述直流母线电压值Vdc之间的电压误差值;对所述电压误差值进行比例积分调节以获得所述PFC电路的升压比Ka。 [0011] According to an embodiment of the present invention, the boost given Vdc_ref obtain Ka PFC circuit according to the ratio of the DC link voltage value Vdc and the DC bus voltage, comprises: calculating said DC bus voltage given Vdc_ref voltage error value between the voltage value Vdc of the DC bus; said voltage error value proportional integral control to obtain the boost PFC circuit than Ka.

[0012] 根据本发明的一个实施例,可根据以下公式计算所述PFC电路中功率开关管的占空比: [0012] According to an embodiment of the present invention, the duty ratio of the embodiment, the PFC circuit may calculate the power switch in accordance with the following formula:

[0013] Duty = 1~1 inst/ (Ka*Iavg) [0013] Duty = 1 ~ 1 inst / (Ka * Iavg)

[0014] 其中,Duty为所述PFC电路中功率开关管的占空比。 [0014] where, Duty said PFC circuit in the power switch duty cycle.

[0015] 根据本发明的一个实施例,检测所述输入电压瞬时值Vin的电压检测通道的延时时间小于2个所述PFC电路的载波周期。 [0015] According to an embodiment of the present invention, detects the instantaneous value of the input voltage Vin of the voltage detection channel delay time period less than the carrier 2 of the PFC circuit.

[0016] 为达到上述目的,发明实施例还提出了一种防止PFC电路的输出电压过压的装置, 包括:第一电压检测模块,用于检测所述PFC电路的输入电压瞬时值Vin;第二电压检测模块,用于检测所述PFC电路输出端的直流母线电压值Vdc;第一电流检测模块,用于检测所述PFC电路的输入电流瞬时值Iinst;控制模块,用于根据所述输入电流瞬时值Iinst计算输入电流平均值Iavg,并获取所述PFC电路输出端的直流母线电压给定Vdc_ref,以及根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref获取所述PFC电路的升压比Ka,且根据所述PFC电路的升压比Ka、所述输入电流瞬时值Iinst和所述输入电流平均值lavg计算所述PFC电路中功率开关管的占空比,以及所述控制模块还用于获取所述PFC电路输出端的电解电容的耐压上限值Vdc_limit,并根据所述耐压上限值Vdc_limit和所述输入电压瞬时值Vi [0016] To achieve the above object, the invention further embodiment provides a device for preventing the output voltage of the PFC circuit overpressure, comprising: a first voltage detection module, the input voltage Vin for detecting an instantaneous value of the PFC circuit; of two voltage measuring module, the DC link voltage value Vdc of the PFC circuit for detecting the output terminal; a first current detection module, the input current instantaneous value Iinst for detecting the PFC circuit; and a control module configured according to the input current the instantaneous value of the DC link voltage Iinst calculated average input current Iavg, and acquiring the output of the PFC circuit is given vdc_ref, and a given vdc_ref obtaining the PFC circuit in accordance with the DC bus voltage value Vdc and the DC bus voltage rise pressure ratio Ka, and the ratio of Ka, the instantaneous value of the input current of the PFC Iinst the booster circuit and the input current average value of the duty ratio is calculated lavg PFC circuit power switch, and the control module further configured to obtain the electrolytic capacitor of the voltage output of the PFC circuit limits Vdc_limit, and the voltage value Vi in accordance with the input voltage value and instantaneous Vdc_limit n计算所述占空比的上限限幅,以及根据所述占空比的上限限幅对输出到所述功率开关管的占空比进行限制以防止所述PFC电路的输出电压发生过压。 n calculating the duty ratio upper limit limiter, and in accordance with the duty ratio upper limit limiter to the output of the duty cycle of the power switch is limited to prevent the output voltage of the PFC circuit overvoltage.

[0017]根据本发明实施例提出的防止功率因数校正PFC电路的输出电压过压的装置,控制模块获取PFC电路输出端的电解电容的耐压上限值Vdc_lirnit,并根据耐压上限值Vdc_ limit和输入电压瞬时值Vin计算占空比的上限限幅,之后根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压。 [0017] The power factor correction apparatus to prevent the output voltage of the PFC circuit overpressure proposed embodiment of the present invention, the control module acquires the output terminal of the electrolytic capacitor voltage PFC circuit limits Vdc_lirnit, and according to the pressure limit value Vdc_ limit an upper limit limiter and the instantaneous value of the input voltage Vin is calculated duty ratio, then the limiter output duty cycle of the power switch to limit the upper limit of the duty ratio according to the output voltage of the PFC circuit to prevent overvoltage. 由此,通过在将功率开关管的占空比输出之前对占空比进行限幅,可以达到防止输出电压过高的目的,进而防止直流母线电压过高,避免设备中的器件因过压而损坏。 Thus, the duty ratio by the duty ratio before clipping the output of the power switch, to prevent the output voltage is too high to achieve the purpose, thereby preventing the DC bus voltage is too high, to avoid the device from overvoltage device damage.

[0018]根据本发明的一个实施例,所述控制模块根据以下公式计算所述占空比的上限限幅: [0018] According to an embodiment of the present invention, the control module calculates the duty ratio upper limit limiter according to the following formula:

[0019] Duty_max = l-Vin/Vdc_limit [0019] Duty_max = l-Vin / Vdc_limit

[0020] 其中,Dutyjnax为所述占空比的上限限幅。 [0020] wherein, Dutyjnax is the duty of a limiter.

[0021] 根据本发明的一个实施例,所述控制模块在获取所述PFC电路的升压比Ka时,通过计算所述直流母线电压给定VdC_ref与所述直流母线电压值Vdc之间的电压误差值以及对对所述电压误差值进行比例积分调节以获得所述PFC电路的升压比Ka。 [0021] According to one embodiment of the present invention, the control module when obtaining the ratio of the boost PFC circuit Ka, the DC bus voltage by calculating the voltage given VdC_ref between the DC bus voltage value Vdc and the error value of the proportional integrating the voltage error value is adjusted to obtain the boost PFC circuit than Ka.

[0022] 根据本发明的一个实施例,所述控制模块根据以下公式计算所述PFC电路中功率开关管的占空比: [0022] According to one embodiment of the present invention, the control module calculates the duty ratio of the PFC power switch circuit according to the following formula:

[0023] Duty =卜1 ins t/(Ka*Iavg) [0023] Duty = Bu 1 ins t / (Ka * Iavg)

[0024] 其中,Duty为所述PFC电路中功率开关管的占空比。 [0024] where, Duty said PFC circuit in the power switch duty cycle.

[0025] 根据本发明的一个实施例,所述第一电压检测模块的电压检测通道的延时时间小于2个所述PFC电路的载波周期。 [0025] According to one embodiment of the present invention, the delay time of the voltage of the first voltage detecting passage detection module is less than the carrier period of the PFC circuit 2.

附图说明 BRIEF DESCRIPTION

[0026] 图1是根据本发明实施例的防止PFC电路的输出电压过压的方法的流程图; [0026] FIG. 1 is a flowchart of a method to prevent the output voltage of the PFC circuit of the embodiment of the present invention the overpressure;

[0027] 图2是根据本发明实施例的防止PFC电路的输出电压过压的装置的方框示意图;以及 [0027] FIG. 2 is a block diagram of an apparatus of the output voltage of the PFC circuit to prevent overvoltage according to an embodiment of the present invention; and

[0028] 图3是根据本发明一个实施例的防止PFC电路的输出电压过压的装置的控制原理图。 [0028] FIG. 3 is a schematic diagram of a control apparatus for preventing the output voltage of a PFC circuit of the embodiment according to the present invention overpressure.

具体实施方式 detailed description

[0029] 下面详细描述本发明的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。 [0029] Example embodiments of the present invention is described in detail below, exemplary embodiments of the embodiment shown in the accompanying drawings, wherein same or similar reference numerals designate the same or similar elements or elements having the same or similar functions. 下面通过参考附图描述的实施例是示例性的,旨在用于解释本发明,而不能理解为对本发明的限制。 By following with reference to the embodiments described are exemplary, and are intended for explaining the present invention and should not be construed as limiting the present invention.

[0030] 下面参考附图来描述本发明实施例提出的防止功率因数校正PFC电路的输出电压过压的方法和装置。 [0030] Next, with reference to a method and apparatus for preventing power factor correction circuit PFC output voltage overpressure proposed embodiment of the present invention described in the accompanying drawings.

[0031] 图1是根据本发明实施例的防止功率因数校正PFC (Power Factor Correction,功率因数校正)电路的输出电压过压的方法的流程图。 [0031] FIG. 1 is a flowchart of a method according to the output voltage of the power factor correction PFC (Power Factor Correction, PFC) circuit for preventing overvoltage of the embodiment of the present invention. 如图1所示,该方法包括以下步骤: As shown in FIG 1, the method comprising the steps of:

[0032] S1:检测PFC电路的输入电流瞬时值I inst和PFC电路的输入电压瞬时值Vin,并根据输入电流瞬时值Iinst计算输入电流平均值Iavg。 [0032] S1: detecting an input current instantaneous value I inst PFC circuit PFC circuit and instantaneous value of the input voltage Vin, and to calculate the average input current value Iinst Iavg the input current instantaneous.

[0033]其中,可通过电阻采样法检测PFC电路的输入电流瞬时值iinst,并且可通过电阻分压法检测PFC电路的输入电压瞬时值Vin。 [0033] wherein the detectable input current instantaneous value iinst PFC circuit through a sampling resistor, and the instantaneous value of the input voltage can be divided voltage Vin detected by the PFC circuit via a resistor.

[OO34]根据本发明的一个实施例,可通过低通滤波器对输入电流瞬时值Iinst进行低通滤波以计算输入电流平均值lavg。 [OO34] In accordance with one embodiment of the present invention, low-pass filtering of the input current instantaneous value Iinst low-pass filter to calculate an average input current lavg.

[0035]其中,低通滤波器的截止频率远小于PFC电路的输入电流的频率,例如远小于100Hz,优选地,截止频率为8Hz。 [0035] wherein the cutoff frequency of the low pass filter is much smaller than the frequency of the input current of the PFC circuit, for example, much less than 100Hz, preferably, the cutoff frequency of 8Hz.

[0036] S2:检测PFC电路输出端的直流母线电压值Vdc,并获取PFC电路输出端的直流母线电压给定Vdc_ref,以及根据直流母线电压值Vdc和直流母线电压给定Vdc_ref获取PFC电路的升压比Ka。 [0036] S2: DC link voltage value Vdc detection PFC circuit output terminal, and acquires the DC bus voltage of the PFC circuit is the output of a given vdc_ref, and a booster given vdc_ref acquired PFC circuit of the DC link voltage value Vdc and the DC link voltage ratio Ka.

[OO37]也就是说,如图3所示,电压外环可根据直流母线电压值vdc和直流母线电压给定Vdc_ref并通过比例-积分调节器获取PFC电路的升压比Ka。 [OO37] That is, as shown in FIG. 3, the outer ring can be given Vdc_ref voltage based on the DC bus voltage value and the DC link voltage vdc by proportional - integral controller acquires the boost ratio Ka PFC circuit. 其中,可通过电阻分压法检测PFC电路输出端的直流母线电压值Vdc。 Wherein the partial pressure method may be DC bus voltage detecting circuit PFC value Vdc output terminal through a resistor.

[0038]具体地,根据本发明的一个实施例,根据直流母线电压值Vdc和直流母线电压给定Vdc 一ref获取PFC电路的升压比Ka,具体包括:计算直流母线电压给定vdc_ref与直流母线电压值Vdc之间的电压误差值;对电压误差值进行比例积分调节以获得PFC电路的升压比Ka。 [0038] In particular, according to one embodiment of the present invention, the DC link voltage value Vdc and the DC link voltage Vdc given a boost PFC circuit ref acquired than Ka, comprises: calculating a given DC bus voltage of the DC vdc_ref error value between a voltage value Vdc of the bus voltage; voltage proportional integral control error value to obtain a boost PFC circuit than Ka.

[0039]也就是说,如图3所示,可将直流母线电压给定VdC_ref与直流母线电压值Vdc之间的电压误差值作为比例-积分调节器的输入,比例-积分调节器对输入的电压误差值进行调节进而输出升压比Ka。 [0039] That is, as shown in FIG. 3, may be given DC bus voltage value between the voltage error VdC_ref voltage value Vdc and the DC bus as a proportional - integral controller input, proportional - integral controller for input Further adjustment voltage error value output boost ratio Ka.

[0040]需要说明的是,当电压外环工作在稳态时,升压比Ka的稳态值为直流母线电压给定Vdc_ref与输入电压平均值Vin_avg的比值,即Ka = Vdc_ref/Vin_avg。 [0040] Incidentally, when the outer working voltage in the steady state, the DC bus voltage value of the boost ratio Ka and the steady state input voltage average value vdc_ref Vin_avg given ratio, i.e., Ka = Vdc_ref / Vin_avg. 应当理解的是,输入电压平均值Vin_avg的获取方式与输入电流平均值Iavg的获取方式类似,处于简洁的目的,这里不在赘述。 It should be understood that the average value of the input voltage and the input Vin_avg manner of obtaining the average current Iavg obtain a similar manner, in brevity, it is not repeated here.

[0041] S3:根据PFC电路的升压比Ka、输入电流瞬时值Iinst和输入电流平均值Iavg计算PFC电路中功率开关管的占空比。 [0041] S3: the duty ratio of the power switch circuit PFC boost PFC circuit than Ka, the input current instantaneous value and the average input current Iavg Iinst calculated.

[0042]也就是说,如图3所示,电流内环可根据升压比Ka、输入电流瞬时值Iinst和输入电流平均值Iavg并通过单周期方法计算输出至功率开关管的PWM信号的占空比Duty,以使PFC 电路中的功率开关管在PWM信号的控制下开通或关断。 [0042] That is, as shown, may be outputted to the current loop of the power switch 3, the boost PWM signal, the input current instantaneous value and the average input current Iavg Iinst and is calculated by the single cycle method according to Ka ratio accounted the duty ratio Duty, so that the PFC circuit of the power switches are on or off under the control of the PWM signal.

[0043]需要说明的是,在电压外环输出的升压比Ka达到稳态(平稳或者缓慢变化)时,通过单周期电流内环可以实现输入电流瞬时值Iinst跟踪输入电压瞬时值Vin波形,达到接近单位1的功率因数。 [0043] Incidentally, reaches a steady state (stationary or slow changes), the instantaneous value of the input current can be realized Iinst track the input voltage Vin instantaneous value of the current waveform cycle by a single inner ring outer boost ratio Ka output voltage, achieve near unity power factor of 1.

[0044]具体地,根据本发明的一个实施例,可根据以下公式计算PFC电路中功率开关管的占空比: [0044] In particular, according to one embodiment of the present invention, the duty cycle may be calculated in a power switch in the PFC circuit in accordance with the following formula:

[0045] Duty = 1-1 inst/ (Ka*Iavg) [0045] Duty = 1-1 inst / (Ka * Iavg)

[0046] 其中,Duty为PFC电路中功率开关管的占空比。 [0046] where, Duty the PFC circuit in the power switch duty cycle.

[0047] S4:获取PFC电路输出端的电解电容的耐压上限值Vdc_limit,并根据耐压上限值Vdc_limit和输入电压瞬时值Vin计算占空比的上限限幅,以及根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压。 [0047] S4: obtaining electrolytic capacitor voltage output of the PFC circuit limits Vdc_limit, and calculates the duty ratio upper limit value limiter according Vdc_limit input voltage instantaneous value and the voltage Vin, and the upper limit duty ratio in accordance with limiting the duty cycle for the output of the power switch to limit the output voltage of the PFC circuit to prevent the occurrence of overpressure.

[0048]也就是说,在计算出功率开关管的占空比之后,可将功率开关管的占空比与占空比的上限限幅进行比较,如果功率开关管的占空比大于占空比的上限限幅,则对输出到功率开关管的占空比进行限制,将开关管的占空比限制为占空比的上限限幅,即输出到功率开关管的占空比为占空比的上限限幅;如果功率开关管的占空比小于或等于占空比的上限限幅,则不对输出到功率开关管的占空比进行限制,直接将计算出的占空比输出到功率开关管。 [0048] That is, after calculating the duty ratio of the power switch, the upper limit of the duty ratio may be compared to the duty cycle of the power switch for clipping, if the duty cycle is greater than the power switch duty than the upper limit of the limiter, the output of the duty cycle of the power switch to be limiting, the switch duty cycle is limited to the upper limit of the duty cycle limiter, i.e., the duty cycle of the power switch to the output of duty than the upper limit of the limiter; if the duty cycle of the power switch duty cycle equal to or less than the upper limit, not the output of the duty cycle of the power switch to limit directly outputs the calculated duty ratio to a power turning tube.

[0049]根据本发明的一个具体示例,电解电容的耐压上限值Vdc_litnit可为400V。 [0049] According to a specific example of the present invention, the electrolytic capacitor voltage limit Vdc_litnit may be 400V.

[0050]具体地,根据本发明的一个实施例,可据以下公式计算占空比的上限限幅: [0050] In particular, according to one embodiment of the present invention, the duty ratio according to the following formula to calculate the upper limit limiter:

[0051] Duty_max = 1-Vi n/Vdc—limit [0051] Duty_max = 1-Vi n / Vdc-limit

[0052] 其中,Duty_max为占空比的上限限幅。 [0052] wherein, Duty_max duty ratio upper limit limiter.

[0053]如上所述,在本发明实施例中,如图3所示,在采用单周期pfc控制算法对PFC电路进行控制的过程中,实时检测PFC电路的输入电流瞬时值Iinst和PFC电路的输入电压瞬时值Vin,电压外环根据直流母线电压给定vdc_ref和直流母线电压瞬时值vdc并通过比例-积分调节器输出升压比Ka;电流内环根据升压比Ka并通过单周期方法计算{3¾¾[信号的占空比Duty。 [0053] As described above, the input current instantaneous In embodiments of the present invention, as shown, during a single-cycle algorithm pfc PFC control circuit for controlling in real time the detection value of the PFC circuit 3 and the PFC circuit Iinst the instantaneous value of the input voltage Vin, Volts DC bus outer vdc_ref given voltage and DC link voltage vdc by the ratio of the instantaneous value - than the Ka integrator output boost regulator; current loop and is calculated by the single cycle method the boost ratio Ka {3¾¾ [the duty ratio signal Duty. 之后,在将占空比Duty输出至功率开关管之前,将占空比Duty与占空比的上限限幅进f比较,如果占空比Du ty超过占空比的上限限幅,则将占空比Du ty限制为占空比的上限限幅;如果未超过占空比的上限限幅,则直接输出占空比Duty,从而,使得pFC电路的输出电压即直流母线电压值Vdc不会超过电解电容的耐压上限值Vdc_limit,满足电解电容侧的耐压需求,避免器件因过压而损坏。 Thereafter, before the power switch output to duty ratio Duty, the upper limit of the duty ratio and the duty ratio Duty f clipping into the comparison, if the duty ratio exceeds the duty ratio Du ty upper limit, then the accounting the duty ratio Du ty limit limiter upper limit duty ratio; if the duty ratio does not exceed the upper limit of the limiter, the output duty cycle directly Duty, thereby making the output voltage of pFC circuit i.e. the DC link voltage Vdc does not exceed upper limit voltage of the electrolytic capacitor Vdc_limit, to meet the demand pressure side of the electrolytic capacitor, prevent the device from damage due to overvoltage.

[0054]另外,在采用单周期PFC控制算法对PFC电路进行控制的过程中,可进一步对比例-积分调节器输出的升压比Ka的调节范围进行调整。 [0054] In addition, during a single cycle of the PFC control algorithm for controlling a PFC circuit may be further Comparative - Ka boost ratio adjustment range of the integrator output by adjusting the regulator. 当PFC电路的输入电流处于上升过程中(或者负载功率处于增大过程、或者PFC电路的输入电压处于降低过程)时,可将升压比的调节上限设置为Vdc_limit/Vin_avg,升压比的调节下限设置为第一调节下限(Vdc_ref/Vin_ avg)*Al,从而使升压比Ka能够调节到更高的值,避免比例-积分调节器过快进入正向饱和状态,改善电流内环计算出来的占空比因输入电流平均值Iavg滞后而偏小的情况。 When the input current of the PFC circuit during the rise (or increase in process load power, or the input voltage of the PFC circuit is reduced in the process), it may be a boost regulator than the upper limit set to Vdc_limit / Vin_avg, adjusting boost ratio a first lower limit is set to the lower limit of adjustment (vdc_ref / Vin_ avg) * Al, so that the boosting ratio can be adjusted to a higher Ka value to avoid proportional - integral regulator into the fast forward saturation, improved inner current calculated duty cycle due to the average input current Iavg hysteresis small case. 当PFC电路的输入电流处于下降过程中(或者负载功率处于减小过程、或者PFC电路的输入电压处于升高过程)时,可将升压比的调节上限设置为Vdc_limit/Vin_avg,升压比的调节下限设置为第二调节下限(VdC_ref/Vin_aVg) *A2,从而使升压比Ka能够调节到更低的值,避免比例-积分调节器过快进入负向饱和状态,改善电流内环计算出来的占空比因输入电流平均值Iavg滞后而偏大的情况。 When the input current of the PFC circuit in the decreasing process (or reduction process in the load power, or the input voltage of the PFC circuit at elevated process), may be a boost regulator than the upper limit set Vdc_limit / Vin_avg, boost ratio adjusting the second adjustable limit set the lower limit (vdC_ref / Vin_aVg) * A2, so that the boosting ratio Ka can be adjusted to a lower value, avoiding proportional - integral regulator enters excessive negative saturation, improved inner current calculated duty cycle due to the average input current Iavg case larger hysteresis.

[0055]根据本发明的一个实施例,PWM信号可由载波通过调制波调制之后生成,可在每个载波的周期内执行一次步骤S1-S4,也就是说,可在每个载波的周期内检测一次输入电压瞬时值Vin和输入电流瞬时值Iinst。 [0055] An embodiment of the present invention, after the PWM signal may be generated by modulating a carrier wave modulation, a step may be performed in S1-S4 of each carrier period, i.e., can be detected according to each of the carriers in the period once the input voltage Vin and the instantaneous value of the input current instantaneous value Iinst.

[0056] 并且,根据本发明的一个实施例,检测输入电压瞬时值Vin的电压检测通道的延时时间小于2个PFC电路的载波周期。 [0056] Further, in accordance with one embodiment of the present invention, it detects the instantaneous value of the input voltage Vin of the voltage detection delay time channel is less than two carrier cycles PFC circuit. 优选地,当PFC电路的载波周期为25us时,电压检测通道的延时时间可为33us。 Preferably, when the carrier period is 25us PFC circuit, the delay time of the voltage detection channels may be 33us.

[0057]综上所述,根据本发明实施例提出的防止功率因数校正PFC电路的输出电压过压的方法,获取PFC电路输出端的电解电容的耐压上限值Vdc_l imi t,并根据耐压上限值Vdc_ limit和输入电压瞬时值Vin计算占空比的上限限幅,之后根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压。 [0057] As described above, according to the method of the present invention prevents the power factor correction circuit PFC output voltage overpressure embodiment proposed embodiment, access to the pressure of the electrolytic capacitor limits the output of the PFC circuit Vdc_l imi t, and according to the pressure output voltage and the upper limit value Vdc_ limit the input voltage Vin is calculated instantaneous value of the duty ratio upper limit, after limiting an upper limit limiter according to the duty ratio of the duty ratio of the output power switch to prevent the PFC circuit occurred pressure. 由此,通过在将功率开关管的占空比输出之前对占空比进行限幅,可以达到防止输出电压过高的目的,进而防止直流母线电压过高,避免设备中的器件因过压而损坏。 Thus, the duty ratio by the duty ratio before clipping the output of the power switch, to prevent the output voltage is too high to achieve the purpose, thereby preventing the DC bus voltage is too high, to avoid the device from overvoltage device damage.

[0058] 为了执行上述实施例,本发明实施例还提出了一种防止PFC电路的输出电压过压的装置。 [0058] In order to perform the above-described embodiments, embodiments of the present invention also provides a device for preventing the output voltage of the PFC circuit overpressure.

[0059]图2是根据本发明实施例的防止PFC电路的输出电压过压的装置。 [0059] FIG. 2 is a means of preventing over-pressure of the output voltage of the PFC circuit of the embodiment of the present invention. 如图2和图3所示,该装置包括:第一电压检测模块10、第二电压检测模块20、第一电流检测模块30和控制丰吴块40。 2 and FIG. 3, the apparatus comprising: a first voltage detection module 10, a second voltage detecting module 20, a first current detection module 30 and the control block 40 Feng Wu.

[0060] 根据本发明的一个实施例,如图3所示,PFC电路200可连接在整流桥100和电解电容E1之间,电解电容E1与负载300并联,PFC电路200可包括第一电感L1、功率开关管S1和二极管D1。 [0060] According to one embodiment of the present invention, shown in Figure 3, the PFC circuit 200 may be connected between the bridge rectifier 100 and electrolytic capacitor E1, E1 electrolytic capacitor 300 in parallel with the load, the PFC circuit 200 may include a first inductor L1 , power switch S1 and a diode D1. 具体地,整流桥100用于对交流电进行整流以获取整流后的直流电,PFC电路200用于对电源进行功率因数校正,并对整流后的直流电进行升压处理,以为电解电容和负载提供稳定的直流电压。 Specifically, rectifier bridge 100 for rectifying alternating current to obtain the rectified DC, the PFC power supply circuit 200 for power factor correction, and boosts the rectified DC process, an electrolytic capacitor and the load that provide a stable DC voltage.

[0061] 如图2和图3所示,第一电压检测模块10用于检测PFC电路200的输入电压瞬时值Vin;第二电压检测模块20用于检测PFC电路200输出端的直流母线电压值Vdc;第一电流检测模块30用于检测PFC电路200的输入电流瞬时值Iinst。 [0061] As shown in FIGS. 2 and 3, a first voltage detection module 10 for detecting the input voltage instantaneous value Vin of the PFC circuit 200; a second voltage detecting module 20 for the DC bus voltage value Vdc of the output terminal 200 of the PFC circuit detection ; first current detection module 30 for detecting the input current instantaneous value Iinst PFC circuit 200. 其中,第一电流检测模块30可通过电阻采样法检测PFC电路200的输入电流瞬时值Iinst,并且第一电压检测模块10可通过电阻分压法检测PFC电路200的输入电压瞬时值Vin,以及第二电压检测模块20可通过电阻分压法检测PFC电路200输出端的直流母线电压值Vdc。 Wherein the first current detection module 30 may Iinst input current instantaneous value detected by sampling the resistance of the PFC circuit 200, and a first voltage detection module 10 may be the instantaneous value of the input voltage Vin detected by resistance dividing the PFC circuit 200, and a second second voltage detection module 20 may output through a resistor divider circuit 200 PFC detected DC bus voltage value Vdc.

[0062]控制模块40用于根据输入电流瞬时值Iinst计算输入电流平均值Iavg,并获取PFC 电路200输出端的直流母线电压给定Vdc_ref,以及根据直流母线电压值Vdc和直流母线电压给定Vdc_ref获取PFC电路的升压比Ka,且根据PFC电路的升压比Ka、输入电流瞬时值Iinst和输入电流平均值Iavg计算PFC电路2〇〇中功率开关管S1的占空比,以及控制模块4〇还用于获取PFC电路200输出端的电解电容的耐压上限值Vdc_limit,并根据耐压上限值Vdc_limit和输入电压瞬时值Vin计算占空比的上限限幅,以及根据占空比的上限限幅对输出到功率开关管S1的占空比进行限制以防止PFC电路200的输出电压发生过压。 [0062] The control module 40 for calculating the average input current instantaneous value of the input current Iavg Iinst, and obtains an output terminal 200 of the PFC circuit is the DC bus voltage reference Vdc_ref, and the DC link voltage value Vdc and the DC link voltage for a given acquisition vdc_ref boost PFC circuit than the Ka, and the ratio of the boost PFC circuit Ka, the input current instantaneous value and the average input current Iavg Iinst calculate the duty cycle of the PFC circuit 2〇〇 the power switch S1, and a control module according 4〇 further to the pressure for obtaining the output of the PFC circuit 200 limits electrolytic capacitor Vdc_limit, and calculates the duty ratio upper limit value of the limiter according to the pressure and Vdc_limit input voltage instantaneous value Vin, and the upper limit duty ratio in accordance with the duty ratio of power output to the web switch S1 is limited to prevent the output voltage of the PFC circuit 200 is overvoltage. 根据本发明的一个具体示例,电解电容的耐压上限值Vdc_limit可为400V。 According to a specific example of the present invention, the electrolytic capacitor voltage limit Vdc_limit may be 400V.

[0063]其中,根据本发明的一个实施例,控制模块40可根据以下公式计算占空比的上限限幅: [0063] wherein, in accordance with one embodiment of the present invention, the control module 40 may calculate the upper limit of the duty cycle limiter in accordance with the following formula:

[0064] Duty_max = 1-Vin/Vdc jimit [0065] 其中,Duty_max为占空比的上限限幅。 [0064] Duty_max = 1-Vin / Vdc jimit [0065] wherein, Duty_max clipping the upper limit of the duty cycle.

[0066]也就是说,控制模块40在计算出功率开关管S1的占空比之后,可将功率开关管S1 的占空比与占空比的上限限幅进行比较,如果功率开关管S1的占空比大于占空比的上限限幅,则控制模块40对输出到功率开关管S1的占空比进行限制,将开关管的占空比限制为占空比的上限限幅,即输出到功率开关管S1的占空比为占空比的上限限幅;如果功率开关管S1的占空比小于或等于占空比的上限限幅,则控制模块40不对输出到功率开关管“的占空比进行限制,直接将计算出的占空比输出到功率开关管S1。 [0066] That is, after the control module 40 calculates the duty ratio of the power switch S1, a power switch may be an upper limit duty ratio of the duty cycle of the comparison S1 for clipping, if the power switch S1 the duty ratio is larger than the upper limit of the duty cycle limiter, the duty ratio of the output module 40 to the power switch S1 is controlled to be limiting, the switch duty cycle is limited to the upper limit of the duty cycle limiter, i.e., the output duty cycle of power switch S1 is the upper limit of the duty cycle limiter; if the duty cycle of power switch S1 is equal to or less than the upper limit of the duty cycle limiter, the control module 40 does not output to the power switch "accounted air ratio to be limiting, directly outputs the calculated duty ratio to the power switch S1.

[0067]如上所述,在本发明实施例中,如图3所示,在采用单周期PFC控制算法对PFC电路进行控制的过程中,可通过第一电压检测模块10和第一电流检测模块30实时检测PFC电路的输入电流瞬时值Iinst和PFC电路的输入电压瞬时值Vin,电压外环根据直流母线电压给定VdC_ref和直流母线电压瞬时值Vdc并通过比例-积分调节器丨输出升压比Ka;电流内环可根据升压比Ka、输入电流瞬时值Iinst和输入电流平均值laVg并通过单周期计算器2计算输出至功率开关管S1的PWM信号的占空比Duty,以使PFC电路2〇〇中的功率开关管31在?丽信号的控制下开通或关断,其中,控制模块40根据以下公式计算pFC电路中功率开关管的占空比:〇1117 = 1-1;^31:/〇^*1&¥8),其中,0此7为??(:电路中功率开关管的占空比。 [0067] As described above, in the embodiment of the present invention, as shown, during a single cycle of the PFC control algorithm for controlling the PFC circuit, a first voltage through a first current detecting module 10 and the detection module 3 30 real-time detection of the input current instantaneous value Iinst PFC circuit PFC circuit and instantaneous value of the input voltage Vin, Volts outer VdC_ref given DC bus voltage and DC link voltage Vdc in accordance with the instantaneous value by proportional - integral controller outputs the boost ratio Shu KA; inner current step-up ratio can Ka, the input current instantaneous value and the average input current laVg Iinst 2 calculates and outputs to the power switch S1, the PWM signal duty ratio Duty calculator according to a single cycle, so that the PFC circuit 2〇〇 the power switch 31 is on- or off under control of Korea signal, wherein the duty cycle of the control 40 calculates the power switch pFC circuit module according to the following equation:? = 1-1 〇1117; 31 ^ : / square ^ * 1 & amp; ¥ 8), wherein this 7 0 ?? (: the duty cycle of the power switch circuit.

[0068]之后,控制模块40在将占空比Duty输出至功率开关管之前,先将占空比Duty与占空比的上限限幅进行比较,如果占空比Duty超过占空比的上限限幅,则将占空比Duty限制为占空比的上限限幅;如果未超过占空比的上限限幅,则直接输出占空比Duty,从而,使得PFC电路的输出电压即直流母线电压值Vdc不会超过电解电容的耐压上限值Vdc_i imi t,满足电解电容侧的耐压需求,避免器件因过压而损坏。 After [0068], the control module 40 before the power switch output to duty ratio Duty, the upper limit of the duty ratio Duty first comparator and a duty cycle limiter for, if the duty ratio exceeds the duty ratio upper limit Duty web, then the duty ratio Duty limit limiter upper limit duty ratio; if the duty ratio does not exceed the upper limit of the limiter, the direct output duty ratio Duty, thereby making the output voltage of the PFC circuit is the DC bus voltage value i.e. does not exceed the upper limit value Vdc electrolytic capacitor voltage Vdc_i imi t, electrolytic capacitors to meet the demand pressure side of the device to avoid damage due to overvoltage. _ _

[0069]需要说明的是,在电压外环输出的升压比Ka达到稳态(平稳或者缓慢变化)时,通过单周期电流内环可以实现输入电流瞬时值Iinst跟踪输入电压瞬时值vin波形,达到接近单位1的功率因数。 [0069] Incidentally, reached a steady state (stationary or slow changes), the single-cycle current loop may be implemented by the instantaneous value of the input current follows the input voltage instantaneous value Iinst vin boost ratio Ka voltage waveform output from the outer ring, achieve near unity power factor of 1.

[007°] ^据本发明的一个实施例,控制模块40可通过低通滤波器对输入电流瞬时值Iinst进行低通滤波以计算输入电流平均值Iavg。 [007 °] ^ According to an embodiment of the present invention, the control module 40 may perform low-pass filtering the input current instantaneous value Iinst low-pass filter to calculate an average input current Iavg. 其中,低通滤波器的截止频率远小于PFC 电路200的输入电流的频率,例如远小于100Hz,优选地,截止频率为8Hz。 Wherein the cutoff frequency of the low pass filter is much smaller than the frequency of the input current of the PFC circuit 200, for example, much less than 100Hz, preferably, the cutoff frequency of 8Hz.

[0071]具体地,根据本发明的一个实施例,控制模块40在获取PFC电路200的升压比Ka时, 通过计算直流母线电压给定Vdc_ref与直流母线电压值Vdc之间的电压误差值以及对对电压误差值进行比例积分调节以获得PFC电路200的升压比Ka。 [0071] In particular, according to one embodiment of the present invention, when the control module 40 acquires the boost PFC circuit 200 than the Ka, the DC bus voltage by calculating the error value given voltage between the DC bus voltage Vdc_ref value Vdc and pairs of voltage error value proportional plus integral controller 200 to the boost PFC circuit is obtained than Ka.

[0072] 也就是说,如图3所示,控制模块40可将直流母线电压给定Vdc_ref与直流母线电压值Vdc之间的电压误差值作为比例-积分调节器1的输入,比例-积分调节器1对输入的电压误差值进行调节进而输出升压比Ka。 [0072] That is, as shown in FIG. 3, the control module 40 may be given DC bus voltage value between the voltage error Vdc_ref voltage value Vdc and the DC bus as a proportional - integral regulator 1 is input, proportional - integral controller 1 to adjust the voltage output error values ​​input in turn boost ratio Ka.

[0073] 需要说明的是,当电压外环工作在稳态时,升压比Ka的稳态值为直流母线电压给定Vdc_ref与输入电压平均值Vin_avg的比值,即Ka = Vdc_ref/Vin_avg。 [0073] Incidentally, when the outer working voltage in the steady state, the DC bus voltage value of the boost ratio Ka and the steady state input voltage average value vdc_ref Vin_avg given ratio, i.e., Ka = Vdc_ref / Vin_avg. 应当理解的是,输入电压平均值Vin_avg的获取方式与输入电流平均值Iavg的获取方式类似,处于简洁的目的,这里不在赘述。 It should be understood that the average value of the input voltage and the input Vin_avg manner of obtaining the average current Iavg obtain a similar manner, in brevity, it is not repeated here.

[0074] 还需说明的是,在电压外环输出的升压比Ka达到稳态(平稳或者缓慢变化)时,通过单周期电流内环可以实现输入电流瞬时值Iinst跟踪输入电压瞬时值Vin波形,达到接近单位1的功率因数。 [0074] needs to be noted that, when the boost voltage output from the outer (stationary or slowly varying) Ka ratio reaches a steady state, the input current instantaneous value can be realized Iinst track the input voltage Vin instantaneous value of the waveform cycle by a single current loop , to achieve a near unity power factor.

[0075] 并且,在采用单周期PFC控制算法对PFC电路200进行控制的过程中,控制模块40可进一步对比例-积分调节器1输出的升压比Ka的调节范围进行调整。 Process [0075] Further, in the single-cycle algorithm PFC PFC control circuit 200 for controlling, the control module 40 may further Comparative - adjustment range output integral controller for adjusting boosting ratio Ka. 当PFC电路200的输入电流处于上升过程中(或者负载功率处于增大过程、或者PFC电路的输入电压处于降低过程) 时,控制模块40可将升压比的调节上限设置为Vdc_limit/Vin_avg,升压比的调节下限设置为第一调节下限,从而使升压比Ka能够调节到更高的值,避免比例-积分调节器1过快进入正向饱和状态,改善电流内环计算出来的占空比因输入电流平均值Iavg滞后而偏小的情况。 When the input current of the PFC circuit 200 during the rise (or increase in process load power, or the input voltage of the PFC circuit is reduced in the process), the control module 40 may adjust the upper limit of the boost ratio is set Vdc_limit / Vin_avg, l adjusting the pressure ratio limit set the lower limit of the first adjustment so that the boosting ratio can be adjusted to a higher Ka value to avoid proportional - integral controller enters a fast forward saturation, improve current duty inner calculated than the average current Iavg due to input the case of small hysteresis. 当PFC电路200的输入电流处于下降过程中(或者负载功率处于减小过程、或者PFC电路的输入电压处于升高过程)时,控制模块40可将升压比的调节上限设置为Vdc_limit/Vin_ avg,升压比的调节下限设置为第二调节下限,从而使升压比Ka能够调节到更低的值,避免比例-积分调节器1过快进入负向饱和状态,改善电流内环计算出来的占空比因输入电流平均值I a vg滞后而偏大的情况。 When the input current of the PFC circuit 200 is in a decreasing process (or reduction process in the load power, or the input voltage of the PFC circuit at elevated process), the control module 40 may adjust the upper limit of the ratio is set to the boosted Vdc_limit / Vin_ avg , step-up ratio is adjusted to set the lower limit of the second limit adjustment, so that the boosting ratio Ka can be adjusted to a lower value, avoiding ratio - calculated integral controller 1 enters excessive negative saturation, improved current loop Duty cycle average input current I a vg case larger hysteresis.

[0076]根据本发明的一个实施例,PWM信号可由载波通过调制波调制之后生成,可在每个载波的周期内执行一次检测和占空比限制,也就是说,第一电压检测模块10和第一电流检测模块30可在每个载波的周期内检测一次输入电压瞬时值Vin和输入电流瞬时值Iinst。 [0076] According to one embodiment of the present invention, after the PWM signal can be modulated by carrier modulation wave generation and detection can be performed once in a duty-cycle of each carrier, i.e., a first voltage detection module 10, and first current detection module 30 may detect the instantaneous value of the primary input voltage Vin and input current instantaneous value Iinst in each carrier period. [0077]并且,根据本发明的一个实施例,第一电压检测模块10的电压检测通道的延时时间小于2个PFC电路的载波周期。 [0077] Further, in accordance with one embodiment of the present invention, the delay time of the voltage detection channels of the first voltage detecting module 10 is smaller than two carrier cycles PFC circuit. 优选地,当PFC电路的载波周期为2 5u s时,第一电压检测模块10的电压检测通道的延时时间可为33us。 Preferably, the PFC circuit when the carrier period is 2 5u s, the delay time of the voltage of the first voltage detection channel detection module 10 may be 33us.

[0078]综上所述,根据本发明实施例提出的防止功率因数校正PFC电路的输出电压过压的装置,控制模块获取PFC电路输出端的电解电容的耐压上限值Vdc_l imi t,并根据耐压上限值Vdc_limit和输入电压瞬时值Vin计算占空比的上限限幅,之后根据占空比的上限限幅对输出到功率开关管的占空比进行限制以防止PFC电路的输出电压发生过压。 [0078] As described above, according to the present invention prevents the power factor correction circuit PFC output voltage overpressure embodiment presented embodiment, the control module acquires the output terminal voltage of the electrolytic capacitor of the PFC circuit limits Vdc_l imi t, and according to Vdc_limit limits and an instantaneous value of the input voltage Vin is calculated duty ratio upper limit to the pressure limiter, the upper limit of the duty cycle after the output of the duty cycle limiter of the power switch in order to prevent limiting in accordance with the output voltage of the PFC circuit occurs overpressure. 由此,通过在将功率开关管的占空比输出之前对占空比进行限幅,可以达到防止输出电压过高的目的, 进而防止直流母线电压过高,避免设备中的器件因过压而损坏。 Thus, the duty ratio by the duty ratio before clipping the output of the power switch, to prevent the output voltage is too high to achieve the purpose, thereby preventing the DC bus voltage is too high, to avoid the device from overvoltage device damage.

[0079]在本发明的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、 “厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底” “内”、“外”、“顺时针”、“逆时针”、“轴向”、“径向”、“周向”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。 [0079] In the description of the present invention, it is to be understood that the term "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front "," rear "," left "," right "," vertical "," horizontal "," top "," bottom "," inner "," outer "," clockwise "," counterclockwise "," axis to "," radial "," circumferential "and indicates the position or location or orientation relationship positional relationship shown in the accompanying drawings, for convenience of description only and the present invention is to simplify the description, not indicate or imply referred devices or elements must have a specific orientation, the orientation of a particular configuration and operation, can not be construed as limiting the present invention.

[0080] 此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。 [0080] In addition, the terms "first", "second" are used to indicate or imply relative importance or the number of technical features specified implicitly indicated the purpose of description and should not be understood. 由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。 Thus, there is defined "first", "second" features may be explicitly or implicitly include at least one of the feature. 在本发明的描述中,“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。 In the description of the present invention, the meaning of the "plurality" is at least two, e.g. two, three, etc., unless explicitly specifically limited.

[0081] 在本发明中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系,除非另有明确的限定。 [0081] In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "connected," "fixed" and like terms are to be broadly understood, for example, may be a fixed connection, may be detachable connection, or integrally; may be a mechanical connector may be electrically connected; may be directly connected, can also be connected indirectly through intervening structures, it may be interaction between the two internal communicating elements or two elements, unless otherwise expressly limited. 对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明中的具体含义。 Those of ordinary skill in the art, to be understood that the specific meanings in the present invention depending on the circumstances.

[0082]在本发明中,除非另有明确的规定和限定,第一特征在第二特征“上”或“下”可以是第一和第二特征直接接触,或第一和第二特征通过中间媒介间接接触。 [0082] In the present invention, unless otherwise expressly specified or limited, the first feature in the "on" a second or "lower" may be in direct contact with the first and second characteristic or the first and second characteristics by intermediary indirect contact. 而且,第一特征在第二特征“之上”、“上方”和“上面”可是第一特征在第二特征正上方或斜上方,或仅仅表示第一特征水平高度高于第二特征。 Also, the first feature a second feature in the "on", "above" and "upper" But first feature a second feature directly above or obliquely upward or simply represents a first characteristic level is higher than the height of the second feature. 第一特征在第二特征“之下”、“下方”和“下面”可以是第一特征在第二特征正下方或斜下方,或仅仅表示第一特征水平高度小于第二特征。 In the first feature a second feature "beneath", "below" and "lower" may be just below the first feature or the second feature obliquely downward, or just less than the level represented by the first feature a second feature.

[0083]在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。 [0083] In the description of the present specification, reference to the term "one embodiment," "some embodiments", "an example", "a specific example", or "some examples" means that a description of the exemplary embodiment or embodiments described a particular feature, structure, material, or characteristic is included in at least one embodiment of the present invention, embodiments or examples. 在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。 In the present specification, a schematic representation of the above terms must not be the same for the embodiment or exemplary embodiments. 而且,描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。 Furthermore, the particular features, structures, materials, or characteristics described may be in any one or more embodiments or examples combined in suitable manner. 此外,在不相互矛盾的情况下,本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。 Furthermore, different embodiments or examples and embodiments or features of different exemplary embodiments without conflicting, those skilled in the art described in this specification can be combined and the combination thereof.

[0084]尽管上面已经示出和描述了本发明的实施例,可以理解的是,上述实施例是示例性的,不能理解为对本发明的限制,本领域的普通技术人员在本发明的范围内可以对上述实施例进行变化、修改、替换和变型。 [0084] Although the above has been illustrated and described embodiments of the present invention, it is understood that the above embodiments are exemplary and are not to be construed as limiting the present invention, within the scope of the invention to those of ordinary skill in the art It may be variations of the above embodiments, modifications, alternatives, and modifications.

Claims (8)

  1. 1.一种防止功率因数校正PFC电路的输出电压过压的方法,其特征在于,包括以下步骤: 检测所述PFC电路的输入电流瞬时值Iinst和所述PFC电路的输入电压瞬时值Vin,并根据所述输入电流瞬时值Iinst计算输入电流平均值Iavg; 其中,检测所述输入电压瞬时值Vin的电压检测通道的延时时间小于2个所述PFC电路的载波周期; 检测所述PFC电路输出端的直流母线电压值Vdc,并获取所述PFC电路输出端的直流母线电压给定Vdc_ref,以及根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref 获取所述PFC电路的升压比Ka; 根据所述PFC电路的升压比Ka、所述输入电流瞬时值Iinst和所述输入电流平均值Iavg 计算所述PFC电路中功率开关管的占空比; 获取所述PFC电路输出端的电解电容的耐压上限值Vdc_limit,并根据所述耐压上限值Vdc_limit和所述输入电压瞬时值Vin计算所述占空比的上限 1. A method for power factor correction (PFC) circuit for preventing the output voltage of overpressure, characterized by comprising the steps of: the instantaneous value of the input voltage Vin input current instantaneous value Iinst detecting the PFC circuit and the PFC circuit, and Iinst current instantaneous value is calculated based on the average input current Iavg input; wherein detecting the instantaneous value of the input voltage Vin of the voltage detection channel delay time period less than the carrier 2 of the PFC circuit; detecting the output of the PFC circuit end of the DC bus voltage value Vdc, and acquires the PFC circuit is the DC bus voltage output of a given vdc_ref, and a given vdc_ref obtaining the PFC circuit in accordance with the DC bus voltage value Vdc and the DC bus voltage boosting ratio Ka ; the boost PFC circuit than the Ka, the input current instantaneous value and the average input current Iinst Iavg calculating the PFC circuit of the duty cycle of the power switch; obtaining electrolytic capacitance of the output terminal of the PFC circuit the upper pressure limit Vdc_limit, and calculates the duty ratio based on said pressure value Vdc_limit input voltage instantaneous value and the upper limit Vin 幅,以及根据所述占空比的上限限幅对输出到所述功率开关管的占空比进行限制以防止所述PFC电路的输出电压发生过压。 Web, and in accordance with the duty ratio of the duty ratio upper limit limiter output power switch to be limited to prevent the output voltage of the PFC circuit overvoltage.
  2. 2. 根据权利要求1所述的方法,其特征在于,根据以下公式计算所述占空比的上限限幅: Duty_max= 1-Vin/Vdc_limit 其中,Duty_max为所述占空比的上限限幅。 2. The method according to claim 1, wherein calculating the duty ratio upper limit limiter according to the following formula: Duty_max = 1-Vin / Vdc_limit wherein, Duty_max clipping the upper limit of the duty cycle.
  3. 3. 根据权利要求1所述的方法,其特征在于,根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref获取所述PFC电路的升压比Ka,具体包括: 计算所述直流母线电压给定Vdc_ref与所述直流母线电压值Vdc之间的电压误差值; 对所述电压误差值进行比例积分调节以获得所述PFC电路的升压比Ka。 3. The method according to claim 1, wherein said booster given Vdc_ref obtain Ka PFC circuit according to the ratio of the DC link voltage value Vdc and the DC bus voltage, comprises: calculating said DC bus voltage error value given voltage between the Vdc_ref value Vdc of the DC bus voltage; said voltage error value proportional integral control to obtain the boost PFC circuit than Ka.
  4. 4. 根据权利要求1所述的方法,其特征在于,根据以下公式计算所述PFC电路中功率开关管的占空比: Duty= 1-Iinst/ (Ka*Iavg) 其中,Duty为所述PFC电路中功率开关管的占空比。 4. The method according to claim 1, wherein the duty ratio calculating power switch in the PFC circuit in accordance with the following equation: Duty = 1-Iinst / (Ka * Iavg) wherein, said PFC Duty in the power circuit switch duty cycle.
  5. 5. —种防止PFC电路的输出电压过压的装置,其特征在于,包括: 第一电压检测模块,用于检测所述PFC电路的输入电压瞬时值Vin; 其中,所述第一电压检测模块的电压检测通道的延时时间小于2个所述PFC电路的载波周期; 第二电压检测模块,用于检测所述PFC电路输出端的直流母线电压值Vdc; 第一电流检测模块,用于检测所述PFC电路的输入电流瞬时值Iinst; 控制模块,用于根据所述输入电流瞬时值Iinst计算输入电流平均值Iavg,并获取所述PFC电路输出端的直流母线电压给定Vdc_ref,以及根据所述直流母线电压值Vdc和所述直流母线电压给定Vdc_ref获取所述PFC电路的升压比Ka,且根据所述PFC电路的升压比Ka、所述输入电流瞬时值Iinst和所述输入电流平均值Iavg计算所述PFC电路中功率开关管的占空比,以及所述控制模块还用于获取所述PFC电路输出端的电解电容的耐压上 5. - means output voltage of the PFC circuit to prevent overvoltage species, characterized by comprising: a first voltage detecting means for detecting an input voltage of the PFC circuit instantaneous value of Vin; wherein said first voltage detection module voltage detection channel delay time is less than two carrier cycles of the PFC circuit; a second voltage detection module, the DC link voltage value Vdc of the PFC circuit for detecting the output terminal; a first current detecting means for detecting Iinst instantaneous value of said input current of the PFC circuit; and a control module configured according to the input current instantaneous value of the DC link voltage is calculated Iinst Iavg is the required average input current, and to obtain the output of the PFC circuit vdc_ref given, and according to the current bus voltage value Vdc and the DC bus voltage given Vdc_ref acquiring the PFC circuit boosting ratio Ka, and the ratio of Ka, the instantaneous value of the input current of the PFC Iinst the booster circuit and the input current average value Iavg is calculated on the PFC circuit of the power switch duty cycle, and the voltage control module is further configured to obtain an electrolytic capacitor of the output terminal of the PFC circuit 值Vdc_ limit,并根据所述耐压上限值Vdc_limit和所述输入电压瞬时值Vin计算所述占空比的上限限幅,以及根据所述占空比的上限限幅对输出到所述功率开关管的占空比进行限制以防止所述PFC电路的输出电压发生过压。 Value Vdc_ limit, according to the pressure limit value and the upper limit limiter Vdc_limit instantaneous voltage Vin input to the calculation of the duty ratio, and according to the duty ratio upper limit limiter to the output power switch duty cycle is limited to prevent the output voltage of the PFC circuit overvoltage.
  6. 6. 根据权利要求5所述的装置,其特征在于,所述控制模块根据以下公式计算所述占空比的上限限幅: Duty_max=1-Vin/Vdc_limit 其中,Duty_max为所述占空比的上限限幅。 6. The apparatus as claimed in claim 5, characterized in that the control module calculates the duty ratio upper limit limiter according to the following formula: Duty_max = 1-Vin / Vdc_limit wherein, Duty_max is the duty of a limiter.
  7. 7. 根据权利要求5所述的装置,其特征在于,所述控制模块在获取所述PFC电路的升压比Ka时,通过计算所述直流母线电压给定Vdc_ref与所述直流母线电压值Vdc之间的电压误差值以及对对所述电压误差值进行比例积分调节以获得所述PFC电路的升压比Ka。 7. The apparatus as claimed in claim 5, wherein said control module when obtaining the ratio of the boost PFC circuit Ka, by calculating a given Vdc_ref DC bus voltage of the DC bus voltage value Vdc and the error value between the voltage proportional to the voltage error integral value is adjusted to obtain the boost PFC circuit than Ka.
  8. 8.根据权利要求5所述的装置,其特征在于,所述控制模块根据以下公式计算所述pFc 电路中功率开关管的占空比: Duty= 1-Iinst/ (Ka*Iavg) 其中,Duty为所述PFC电路中功率开关管的占空比。 8. The device as claimed in claim 5, characterized in that the control module calculates the pFc circuit power switch duty cycle according to the following equation: Duty = 1-Iinst / (Ka * Iavg) wherein, Duty the duty cycle of the PFC switch of the power circuit.
CN 201510367622 2015-06-26 2015-06-26 Method and apparatus for preventing pfc power factor correction circuit of the output voltage of the overvoltage CN104953813B (en)

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