CN104899055B - A kind of ME more new systems and its update method based on BIOS controls - Google Patents

A kind of ME more new systems and its update method based on BIOS controls Download PDF

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CN104899055B
CN104899055B CN201510226405.1A CN201510226405A CN104899055B CN 104899055 B CN104899055 B CN 104899055B CN 201510226405 A CN201510226405 A CN 201510226405A CN 104899055 B CN104899055 B CN 104899055B
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bmc
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CN104899055A (en
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马井彬
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Shenzhen Tong Yi Yi Information Technology Co., Ltd.
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Shenzhen Tong Yi Yi Information Technology Co Ltd
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Abstract

The invention discloses a kind of ME more new systems and its update method based on BIOS controls, the ME more new systems based on BIOS controls include hardware design subsystem and interface subsystem;Hardware design subsystem includes BMC and PCH, BMC includes GPIO1 pins and GPIO2 pins, PCH includes HDA_SDO pins and RSMRST# pins, and GPIO1 pins are connect with HDA_SDO pins, and GPIO1 pins are connect by R1 resistance with standby power with HDA_SDO pins;GPIO2 pins are connect with RSMRST# pins, and GPIO2 pins are connect with RSMRST# pins by R3 resistance with standby power, by C1 capacity earths.The ME more new systems and update method of the present invention has the characteristics that versatile, easy to operate, accuracy is high and of low cost.

Description

A kind of ME more new systems and its update method based on BIOS controls
Technical field
The present invention relates to ME update system and method technical fields, in particular to a kind of ME updates based on BIOS controls System and its update method.
Background technology
With the arrival of Internet era and big data epoch, explosion is presented to processing, the storage demand of data in people The growth of formula also explodes to the quantity demand of server.The maintenance work of this server brings difficulty, general server master The service life of plate is 3 to 5 years, in order to improve use value, improves mainboard performance, replaces a new generation CPU and can hardly be avoided, this is just Need the synchronized update of firmware.In addition, firmware itself can also have bug, need to regularly update.
For the purpose of safety, under normal circumstances, Intel management engines ME(Management Engine)Firmware portions Do not allow other software to operations such as its modification, updates, to update firmware ME, the first method is exactly will be entire with cd-rom recorder Flash carries out burning;Second of method exactly emits access mainboard contact pin, by HDA_SDO signals under S5 states of shutting down using jump It draws high, ME is made to enter Recovery(Restore)Pattern, de-preservation mechanism, and be updated using software at DOS.
For above-mentioned first method, do not have operability in client using cd-rom recorder update, Flash chip is welding On mainboard, the typically no professional tool of client, professional technique weld chip, and burning is complete to be welded on mainboard again.Visitor Family generally uses second method, and concrete operations flow, be into as shown in Figure 1, still this brings many troubles to maintenance personnel Enter computer room shutdown, open cabinet, jump is emitted and is inserted into mainboard contact pin, then booting enters DOS, using software upgrading ME firmwares, more After new, jump is emitted and is taken off, restores ME protection mechanisms;Will jump emit be inserted into mainboard contact pin during be possible to wrong plug occur Jump emits or poor contact equivalent risk.If there is a large amount of server master boards need to update ME firmwares, this update method efficiency is non- Often low, the probability of error is also very high.In addition, the motherboard design of different manufacturers is different, some mainboards need not disconnect standby power, By shutdown be switched on again or the overall situation is restarted can complete ME upgrading, restore ME operating modes;And some mainboards need to disconnect Standby power, then power on, reset operation is carried out, ME upgradings could be completed, restore ME operating modes, if these mainboards do not turn off Standby power is resetted, and ME will be constantly in Recovery patterns, cisco unity malfunction.So this requires safeguard people Member must operate board in computer room, manually control power supply, very troublesome, need the time spent also very much, increase cost.
Invention content
The object of the present invention is to provide a kind of ME more new systems and update method based on BIOS controls, have versatility By force, feature easy to operate, accuracy is high and of low cost.
The present invention can be achieved through the following technical solutions:
The invention discloses a kind of ME more new systems based on BIOS controls, including hardware design subsystem and interface Subsystem;
The hardware design subsystem includes BMC(Baseboard Management Controller, substrate management control Device processed)And PCH(Platform Controller Hub integrate south bridge), the BMC includes GPIO1 pins and GPIO2 pins, The PCH includes HDA_SDO pins and RSMRST# pins, and the GPIO1 pins are connect with HDA_SDO pins, the GPIO1 Pin is connect by R1 resistance with standby power with HDA_SDO pins;The GPIO2 pins are connect with RSMRST# pins, described GPIO2 pins are connect with RSMRST# pins by R3 resistance with standby power, by C1 capacity earths.
The interface subsystem includes control options interface, and the control options interface is arranged in conventional BIOS Before the interfaces Setup, the control options interface includes BIOS Setup Interface Options and ME upgrading Interface Options.
In the present invention, hardware subsystem is connected the corresponding signals of the GPIO of BMC and PCH by hardware, then is led to BIOS, BMC software progress repeatedly communication cooperation are crossed, the upgrade function of ME is realized, is not designed difference by motherboard hardware power supply circuit Influence, expanded the versatility of ME more new systems and its update method in use.Interface subsystem is set with hardware Meter subsystem optimizes cooperation, forms whole operation process, and by remote control, personnel are not necessarily to enter computer room, realize and concentrate Change management upgrade, improves efficiency;Meanwhile control options interface is arranged by interface subsystem, the process of upgrading is carried out Selection control, can be identified upgrading by administrator right with professional, prevent faulty operation from causing the damage to mainboard, Operating accuracy is high.In addition, the ME more new systems of the present invention only need the progress simple refit upgrading on mainboard to can be realized far Journey upgrade function, it is easy to operate, effectively save upgrade cost.
Further, ME upgradings interface includes that ME upgradings confirm that sub-interface, the ME upgradings confirm that sub-interface includes Warning message prompt options and administrator's identity validation option.The design for upgrading interface by ME, can effectively identify common use Family and administrator's identity.Due to safety concerns, it before firmware upgrade, needs to confirm at BIOS settings interface with administrator's identity, To limit the upgrading or maloperation to ME firmwares of non-administrator.At the interfaces BIOS Setup, addition ME upgradings confirm sub- boundary Face enters BIOS Setup with administrator's identity, can be with operation and control options interface.Enter BIOS Setup circle with user identity When face, control options interface can be graying, inoperable, illustrates the effect of control item in help information.Work as administrator When doing firmware ME upgradings, control options interface is opened, when BIOS detects that control item is opened, display warning message prompt choosing Item and administrator's identity validation option need administrator to be confirmed whether ME upgradings to be opened again, are opened if administrator confirms, BIOS will hold power-off operation, if administrator terminates operation, ME upgrading control items will restore close value.
Further, it is that communication is realized by IPMI communication protocols between the BIOS and BMC.BIOS is according to certain Command format sends a command to BMC, after BMC receives order, is parsed, and execute operation.For example, when BIOS is notified When BMC draws high the level signal value of GPIO1, after BMC receives order, the register of GPIO1 is rewritten, the electricity of GPIO1 is set Flat signal value is height, and after the completion of operation, GPIO1 signals will be increased by driving.
The present invention also provides the ME update methods for using the ME controlled based on BIOS the more new systems, including it is following Process flow:
Electrifying timing sequence flow, BMC are detected and acquire to the level signal of HDA_SDO pins;
BIOS executes flow, and BMC is initialized, and BIOS will send order to BMC, obtains BMC and controls HDA_SDO signals GPIO1 level values, this GPIO1 level value feeds back to BIOS by BMC;If GPIO1 is high level, BIOS sends order again To BMC, GPIO1 is dragged down, restores to confirm flow to entering back into BIOS Setup upgradings after the protection mechanism of ME;If GPIO1 Value is natively low, and BIOS, which will not be dealt with, is directly entered BIOS Setup upgrading confirmation flows;
BIOS Setup upgradings confirm flow, enter control option when BIOS is executed when flow confirmation needs to carry out ME upgradings Interface is confirmed whether that needing to start BIOS Setup upgradings executes flow, confirms and enters BIOS Setup after starting by administrator Upgrading executes flow, confirms and is not necessarily to after upgrading automatically into shutdown process;
BIOS Setup upgradings execute flow, and BIOS Setup upgradings confirm that flow confirmation needs after upgrading to ME, Upgrade into ME and confirms sub-interface, it is desirable that input administrator information, after administrator information confirmation is errorless, after being confirmed due to administrator ME upgradings are opened, BIOS will send order to BMC, it is desirable that BMC will control the GPIO1 pins of the level signal of HDA_SDO pins Level signal draw high open ME escalation process;
Shutdown process, BIOS read the ME registers on PCH, obtain the working condition of ME, if it is normal work mould Formula does not do any operation, directly shuts down;If ME is in Recovery patterns, BIOS sends order by GPIO2 pins to BMC Level information drag down a period of time draw high again, then shut down.
By the above flow, it can effectively distinguish that maintenance personnel need not upgrade ME and maintenance personnel needs to upgrade two kinds of ME Situation is simultaneously respectively processed:
(1)When maintenance personnel need not upgrade ME:In electrifying timing sequence, the height electricity of HDA_SDO pins is not collected Ordinary mail number, BIOS execute the level signal for judging BMC GPIO1 pins in flow to be low, need not handle, and administrator is not yet Having into BIOS Setup settings interface, BIOS will guide system or other operations, and ME is to be in normal mode of operation at this time, Non- de-preservation, it is not possible to modification or upgrading.
(2)When maintenance personnel needs to upgrade ME:In electrifying timing sequence, the high level of HDA_SDO pins is not collected Signal, BIOS, which is executed in flow, judges that BMC GPIO1 leg signals to be low, need not be handled, administrator enters BIOS Setup Interface is set, opens ME and upgrades control item, notice BMC draws high GPIO1 pin level signals, and BIOS operation register executes Power-off operation.It is switched on again, electrifying timing sequence collects the high level signal of HDA_SDO pins, and ME protection mechanisms release, and BIOS is held In row flow, BIOS will notify BMC to drag down GPIO1, then lead into remote control terminal DOS systems, ME functions are stopped at this time Only, Recovery patterns are in, software can be used to carry out ME upgradings.After upgrading, power-off operation, in shutdown process, BIOS will notify BMC that GPIO2 pin level signals are dragged down a period of time and then are drawn high again, and RSMRST# is with GPIO2 pins Level signal meeting synchronization action variation, allows PCH to carry out reset operation in the power-offstate, is switched on again, ME upgradings finish, and enter Normal mode of operation.
Further, the BIOS executes flow and realizes in the following way:System starts, after BMC initialization, BIOS will send order to BMC, obtain the level signal of the level signal and GPIO1 pins of BMC control HDA_SDO pins, BMC The level value of the level signal of this GPIO1 pin is fed back into BIOS, if the level value of GPIO1 pins is high level, BIOS BMC is sent commands to again, the level value of GPIO1 pins is dragged down, and restores the protection mechanism to ME, if GPIO1 pins Level value is natively low, and BIOS will not be dealt with.
Further, the BIOS Setup upgradings execute flow and realize that user enters ME liters by following process Grade confirms sub-interface, first has to input administrator's password, if the mistake of input, it is invalid to show, re-enters, if input It is user password, ME upgrades control item can be graying and inoperable.After inputting administrator's password, ME liters are changed with administrator's identity Grade control item, BIOS reads the value of control item, judges whether ME control items are in an open state in real time, if it is opening state, BIOS can call display program, show warning message, and administrator is allowed to reaffirm whether open ME upgrading control items, if it is confirmed that Upgrading item is opened, BIOS will send order to BMC, it is desirable that BMC will control the GPIO1 pins of HDA_SDO pin level signals Level signal is drawn high, and when booting next time, ME is by de-preservation mechanism.BMC executes GPIO1 pin level signals and draws high order, such as Fruit executes mistake, and BIOS will show error information, and notify administrator, show that the level signal of GPIO1 pins can not be drawn high, ME Upgrade control item and restores close value, if after running succeeded, BIOS will execute power-off operation, in the electrifying timing sequence of booting next time, ME will acquire the level signal of HDA_SDO pins as powered on described in sequential flow journey.
Further, the shutdown executes flow and comprises the following processes, in shutdown process, BIOS reads the ME deposits of PCH Device obtains the working condition of ME, if it is normal mode of operation, does not do any operation, closes system;If ME is in Recovery patterns, BIOS send to order to drag down the level signal of GPIO2 pins to BMC and draw high again for a period of time, then close Machine;After BMC receives order, slightly postpone, waits completion to be shut down;In the power-offstate, BMC, which executes GPIO2 and drags down, again draws high Order drags down the time more than 20ms, the level signal of the level signal and BMC GPIO2 pins of PCH RSMRST# pins The reset operation of PCH is realized in synchronous variation.
The present invention a kind of ME more new systems and its update method based on BIOS controls, have following advantageous effect:
The first, versatile, the corresponding signals of the GPIO of BMC and PCH are connected by hardware, then by BIOS, BMC software carries out repeatedly communication cooperation, realizes the upgrade function of ME, is not influenced by motherboard hardware power supply circuit design difference, The versatility of ME more new systems and its update method in use is expanded;
The second, easy to operate, whole operation process, by remote control, personnel are not necessarily to enter computer room, realize centralization pipe Reason upgrading, improves efficiency;
Third, accuracy are high, by long-distance centralized control, liter can be identified by administrator right with professional Grade, prevents faulty operation from causing the damage to mainboard;
4th, of low cost, ME more new systems and its update method only need to carry out simple refit upgrading on mainboard i.e. Remote upgrade function can be achieved, it is easy to operate, effectively save upgrade cost.
Description of the drawings
Fig. 1 is the newer operational flowcharts of prior art ME of the present invention;
Fig. 2 is a kind of hardware design subsystem composition frame chart of the ME more new systems based on BIOS controls of the present invention;
Fig. 3 is a kind of ME update method general flow charts based on BIOS controls of the present invention;
Fig. 4 is a kind of ME update method electrifying timing sequence flow charts based on BIOS controls of the present invention;
Fig. 5 is a kind of ME update method BIOS execution flow charts based on BIOS controls of the present invention;
Fig. 6 is that a kind of ME update method BIOS Setup based on BIOS controls of the present invention upgrade execution flow chart;
Fig. 7 is a kind of ME update method shutdown process figures based on BIOS controls of the present invention.
Specific implementation mode
In order that those skilled in the art will better understand the technical solution of the present invention, with reference to embodiment and attached drawing Product of the present invention is described in further detail.
The invention discloses a kind of ME more new systems based on BIOS controls, including hardware design subsystem and interface Subsystem;
As shown in Fig. 2, the hardware design subsystem includes BMC and PCH, the BMC includes GPIO1 pins and GPIO2 Pin, the PCH include HDA_SDO pins and RSMRST# pins, and the GPIO1 pins are connect with HDA_SDO pins, GPIO1 pins are connect by R1 resistance with standby power with HDA_SDO pins;The GPIO2 pins connect with RSMRST# pins It connects, GPIO2 pins are connect with RSMRST# pins by R3 resistance with standby power, by C1 capacity earths.
Meanwhile in fig. 2, the upper right corner also partial enlargement discloses the equivalent circuit diagram of the chip interior design of PCH, equivalent Circuit includes t switches and R2 resistance, and the resistance value of R2 resistance is much larger than R1 resistance.T switch, R2 resistance by conducting wire with HDA_SDO pin serial connections, the conducting wire for connecting R2 resistance and HDA_SDO pins are grounded simultaneously, and the standby power is 3.3V lithium electricity Pond power supply.
The interface subsystem includes control options interface, and the control options interface is arranged in conventional BIOS Before the interfaces Setup, the control options interface includes BIOS Setup Interface Options and ME upgrading Interface Options.
ME upgradings interface includes that ME upgradings confirm that sub-interface, the ME upgradings confirm that sub-interface includes that warning message carries Show option and administrator's identity validation option.
It is that communication is realized by IPMI communication protocols between the BIOS and BMC.
As shown in figure 3, using the ME update methods of the ME more new systems based on BIOS controls, including following processing Flow:
Electrifying timing sequence flow, BMC are detected and acquire to the level signal of HDA_SDO pins;
BIOS executes flow, and BMC is initialized, and BIOS will send order to BMC, obtains BMC and controls HDA_SDO signals GPIO1 level values, this GPIO1 level value feeds back to BIOS by BMC, if GPIO1 is high level, BIOS sends order again To BMC, GPIO1 is dragged down, restores to confirm flow to entering back into BIOS Setup upgradings after the protection mechanism of ME, if GPIO1 Value is natively low, and BIOS, which will not be dealt with, is directly entered BIOS Setup upgrading confirmation flows;
BIOS Setup upgradings confirm flow, enter control option when BIOS is executed when flow confirmation needs to carry out ME upgradings Interface is confirmed whether that needing to start BIOS Setup upgradings executes flow, confirms and enters BIOS Setup after starting by administrator Upgrading executes flow, confirms and is not necessarily to after upgrading automatically into shutdown process;
BIOS Setup upgradings execute flow, and BIOS Setup upgradings confirm that flow confirmation needs after upgrading to ME, Upgrade into ME and confirms sub-interface, it is desirable that input administrator information, after administrator information confirmation is errorless, after being confirmed due to administrator ME upgradings are opened, BIOS will send order to BMC, it is desirable that BMC will control the GPIO1 pins of the level signal of HDA_SDO pins Level signal draw high open ME escalation process;
Shutdown process, BIOS read the ME registers on PCH, obtain the working condition of ME, if it is normal work mould Formula does not do any operation, directly shuts down;If ME is in Recovery patterns, BIOS sends order by GPIO2 pins to BMC Level information drag down a period of time draw high again, then shut down.
As shown in figure 4, after booting, in electrifying timing sequence flow, in PWROK signal rising edges, ME acquires HDA_SDO pins Level signal, at this time if collect signal be high level, PCH start after, ME functions will stop and be in Recovery moulds Formula can be upgraded or be changed to ME, in the level signal rising edge of PLTRST# pins, the level of HDA_SDO pins Signal will be dragged down by PCH chip interiors, and the pull-up of the external level signal to HDA_SDO pins or drop-down have not recurred To effect.If detecting that the level signal of HDA_SDO pins is low level in PWROK signal rising edges, after PCH starts, ME will be in normal mode of operation, even if there is the level signal of external pull-up HDA_SDO pins ME can not be allowed to enter again Recovery patterns can not release ME protection mechanisms.
The workflow of Fig. 4 can be further explained from the connection relation of Fig. 2 hardware.In PLTRST# pins Level signal be low level when, t switch be connected on resistance R2, R2 is far longer than R1, when the output high level of GPIO1 pins When, the level of HDA_SDO pins is R2/ (R1+R2) × 3.3V, close to the high level of 3.3V;When GPIO1 pins export low electricity Usually, the level of HDA_SDO pins is R2/ (R1+R2) × low level voltage, wherein the low level voltage is less than 0.8V, because The level of this HDA_SDO pin is low level.When the level signal of PLTRST# pins is high level, t switchings to conducting wire It is connected to ground, HDA_SDO pins is equivalent to and is directly connected to ground, no matter the level signal of GPIO1 pins exports height, HDA_ at this time The level signal of SDO pins is all low level value.
Realized in the following way as shown in figure 5, the BIOS executes flow, system starts, BMC initialization with Afterwards, BIOS will send order to BMC, obtain the level signal of the level signal and GPIO1 pins of BMC control HDA_SDO pins, The level value of the level signal of this GPIO1 pin is fed back to BIOS by BMC, if the level value of GPIO1 pins is high level, BIOS sends commands to BMC again, and the level value of GPIO1 pins is dragged down, and restores the protection mechanism to ME, if GPIO1 draws The level value of foot is natively low, and BIOS will not be dealt with.
As shown in fig. 6, the BIOS Setup upgradings execute flow and realize that user enters ME liters by following process Grade confirms sub-interface, first has to input administrator's password, if the password mistake of input, it is invalid to show, it is desirable that re-enters; If input is user password, ME upgrades control item can be graying and inoperable.After inputting administrator's password, with administrator's identity It changes ME and upgrades control item, BIOS reads the value of control item, judges whether ME control items are in an open state in real time, if it is opening State, BIOS can call display program, show warning message, allow administrator to reaffirm whether open ME upgrading control items, such as Fruit, which confirms, opens upgrading item, and BIOS will send order to BMC, it is desirable that BMC will control the GPIO1 of HDA_SDO pin level signals The level signal of pin is drawn high, and when booting next time, ME is by de-preservation mechanism.BMC executes GPIO1 pin level signals and draws high life It enables, if executing mistake, BIOS will show error information, and notify administrator, show that the level signal of GPIO1 pins can not be drawn Height, ME upgrade control item and restore close value, if after running succeeded, BIOS will execute power-off operation, when powering on of booting next time In sequence, ME will acquire the level signal of HDA_SDO pins as powered on described in sequential flow journey.
It is comprised the following processes as shown in fig. 7, the shutdown executes flow:In shutdown process, the ME that BIOS reads PCH is posted Storage obtains the working condition of ME, if it is normal mode of operation, does not do any operation, closes system;If ME is in Recovery patterns, BIOS send to order to drag down the level signal of GPIO2 pins to BMC and draw high again for a period of time, then close Machine.After BMC receives order, slightly postpone, waits completion to be shut down.In the power-offstate, BMC, which executes GPIO2 and drags down, again draws high Order drags down the time more than 20ms, the level signal of the level signal and BMC GPIO2 pins of PCH RSMRST# pins The reset operation of PCH is realized in synchronous variation.
Meanwhile for the ease of understanding that the technical program, technical term according to the present invention are abbreviated as:
IPMI:Intelligent Platform Management Interface (Intelligent Platform Management Interface) is A kind of hardware management interface specification of open standard, defines the ad hoc approach that embedded management subsystem is communicated.IPMI Information passes through baseboard management controller BMC(In the hardware component of IPMI specifications)It is exchanged.Use low-level hardware intelligence It can manage and be managed without the use of operating system, user can utilize the physical health feature of IPMI monitoring servers, such as temperature Degree, voltage, fan operating state, power supply status etc..And what is more important IPMI is an open free standard, user Without to pay extra-pay using the standard.There are two major advantages for tool:First, this configuration allows to carry out with outer clothes Business device management;Secondly, operating system need not bearing transport system state data task.
BMC:Baseboard management controller(Baseboard Management Controller).Generally it is built on mainboard, Support the IPMI specifications of professional standard.BMC provide function include:Local and remote diagnosis, console are supported, configuration is managed Reason, hardware management and troubleshooting.
BIOS:Basic input-output system(Basic Input Output System).
PCH:The integrated South Bridge chip of Intel Company(Platform Controller Hub).
ME:Intel management engines(Intel® Management Engine).
PWROK:The normal marking signal of power supply power supply.
RSMRST#:PCH reset signals.
GPIO:Universal input/output(General Purpose Input Output).
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the present invention in any form;It is all The those of ordinary skill of the industry can be shown in by specification attached drawing and described above and swimmingly implement the present invention;But it is all Those skilled in the art without departing from the scope of the present invention, using disclosed above technology contents The equivalent variations for a little variation, modification and evolution made are the equivalent embodiment of the present invention;Meanwhile it is all according to the present invention Substantial technological to the variation, modification and evolution etc. of any equivalent variations made by above example, still fall within the present invention's Within the protection domain of technical solution.

Claims (7)

1. a kind of ME more new systems based on BIOS controls, it is characterised in that:Including hardware design subsystem and interface System;
The hardware design subsystem includes BMC and PCH, and the BMC includes GPIO1 pins and GPIO2 pins, the PCH packets HDA_SDO pins and RSMRST# pins are included, the GPIO1 pins are connect with HDA_SDO pins, the GPIO1 pins and HDA_ SDO pins are connect by R1 resistance with standby power;The GPIO2 pins are connect with RSMRST# pins, the GPIO2 pins It is connect with standby power by R3 resistance with RSMRST# pins, by C1 capacity earths;
The interface subsystem includes control options interface, and the control options interface is arranged in conventional BIOS Setup Before interface, the control options interface includes BIOS Setup Interface Options and ME upgrading Interface Options;
The ME more new systems based on BIOS controls are updated according to following process flow:
Electrifying timing sequence flow, the BMC are detected and acquire to the level signal of HDA_SDO pins;
BIOS executes flow, and the BMC is initialized, and BIOS will send order to BMC, obtains BMC and controls HDA_SDO signals GPIO1 level values, this GPIO1 level value feeds back to BIOS by BMC, if GPIO1 is high level, BIOS sends order again To BMC, GPIO1 is dragged down, restores to confirm flow to entering back into BIOS Setup upgradings after the protection mechanism of ME;If GPIO1 Level value is natively low, and BIOS, which will not be dealt with, is directly entered BIOS Setup upgrading confirmation flows;
BIOS Setup upgradings confirm flow, enter control option circle when BIOS is executed when flow confirmation needs to carry out ME upgradings Face is confirmed whether that needing to start BIOS Setup upgradings executes flow, confirms and enters BIOS Setup liters after starting by administrator Grade executes flow, confirms and is not necessarily to after upgrading automatically into shutdown process;
BIOS Setup upgradings execute flow, and BIOS Setup upgradings confirm that flow confirmation needs after upgrading to ME, enter ME upgradings confirm sub-interface, it is desirable that input administrator information after administrator information confirmation is errorless, is opened after being confirmed due to administrator ME upgrades, and BIOS will send order to BMC, it is desirable that BMC will control the electricity of the GPIO1 pins of the level signal of HDA_SDO pins Ordinary mail number, which is drawn high, opens ME escalation process;
Shutdown process, BIOS read the ME registers on PCH, obtain the working condition of ME, if it is normal mode of operation, no Any operation is done, is directly shut down;If ME is in Recovery patterns, BIOS sends order by the level of GPIO2 pins to BMC Information drags down to be drawn high again for a period of time, is then shut down.
2. the ME more new systems according to claim 1 based on BIOS controls, it is characterised in that:ME upgradings interface packet It includes ME upgradings and confirms that sub-interface, the ME upgradings confirm that sub-interface includes warning message prompt options and the choosing of administrator's identity validation .
3. the ME more new systems according to claim 1 or 2 based on BIOS controls, it is characterised in that:The BIOS and BMC Between be by IPMI communication protocols come realize communication.
4. using the update method of the ME more new systems based on BIOS controls described in 3 any one of claims 1 to 3, feature exists In including following process flow:
Electrifying timing sequence flow, the BMC are detected and acquire to the level signal of HDA_SDO pins;
BIOS executes flow, and the BMC is initialized, and BIOS will send order to BMC, obtains BMC and controls HDA_SDO signals GPIO1 level values, this GPIO1 level value feeds back to BIOS by BMC, if GPIO1 is high level, BIOS sends order again To BMC, GPIO1 is dragged down, restores to confirm flow to entering back into BIOS Setup upgradings after the protection mechanism of ME;If GPIO1 Level value is natively low, and BIOS, which will not be dealt with, is directly entered BIOS Setup upgrading confirmation flows;
BIOS Setup upgradings confirm flow, enter control option circle when BIOS is executed when flow confirmation needs to carry out ME upgradings Face is confirmed whether that needing to start BIOS Setup upgradings executes flow, confirms and enters BIOS Setup liters after starting by administrator Grade executes flow, confirms and is not necessarily to after upgrading automatically into shutdown process;
BIOS Setup upgradings execute flow, and BIOS Setup upgradings confirm that flow confirmation needs after upgrading to ME, enter ME upgradings confirm sub-interface, it is desirable that input administrator information after administrator information confirmation is errorless, is opened after being confirmed due to administrator ME upgrades, and BIOS will send order to BMC, it is desirable that BMC will control the electricity of the GPIO1 pins of the level signal of HDA_SDO pins Ordinary mail number, which is drawn high, opens ME escalation process;
Shutdown process, BIOS read the ME registers on PCH, obtain the working condition of ME, if it is normal mode of operation, no Any operation is done, is directly shut down;If ME is in Recovery patterns, BIOS sends order by the level of GPIO2 pins to BMC Information drags down to be drawn high again for a period of time, is then shut down.
5. update method according to claim 4, it is characterised in that:It is real in the following way that the BIOS, which executes flow, Existing, system starts, and after BMC initialization, BIOS will send order to BMC, obtains the level of BMC control HDA_SDO pins The level value of the level signal of this GPIO1 pin is fed back to BIOS by the level signal of signal and GPIO1 pins, BMC;If The level value of GPIO1 pins is high level, and BIOS sends commands to BMC, the level value of GPIO1 pins is dragged down again, is restored To the protection mechanism of ME;If the level value of GPIO1 pins is natively low, BIOS will not be dealt with.
6. update method according to claim 5, it is characterised in that:It is to pass through that the BIOS Setup upgradings, which execute flow, What following process was realized, user enters ME upgradings and confirms sub-interface, first has to input administrator's password, if the mistake of input, It is invalid to show, re-enters, if input is user password, ME upgrades control item can be graying and inoperable;Input management After member's password, control item is upgraded with administrator's identity modification ME, BIOS reads the value of control item, whether judges ME control items in real time It is in an open state, if it is opening state, BIOS can call display program, show warning message, allowing administrator to reaffirm is No opening ME upgrades control item, if it is confirmed that opening upgrading item, BIOS will send order to BMC, it is desirable that BMC will control HDA_ The level signal of the GPIO1 pins of SDO pin level signals is drawn high, and when booting next time, ME is by de-preservation mechanism;BMC is executed GPIO1 pin level signals draw high order, if executing mistake, BIOS will show error information, and notify administrator, and showing can not The level signal of GPIO1 pins is drawn high, ME upgrades control item and restores close value, if after running succeeded, BIOS will execute pass Machine operates, and in the electrifying timing sequence of booting next time, ME will acquire the level letter of HDA_SDO pins as powered on described in sequential flow journey Number.
7. update method according to claim 6, it is characterised in that:The shutdown process comprises the following processes, shuts down Cheng Zhong, BIOS read the ME registers of PCH, obtain the working condition of ME, if it is normal mode of operation, do not do any operation, Closing system;If ME is in Recovery patterns, BIOS sends order to BMC and the level signal of GPIO2 pins is dragged down one The section time draws high again, then shuts down;After BMC receives order, slightly postpone, waits completion to be shut down;In the power-offstate, BMC is held Row GPIO2 drags down the order drawn high again, drags down the time more than 20ms, the level signal and BMC of PCH RSMRST# pins The level signal of GPIO2 pins synchronizes variation, realizes the reset operation of PCH.
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Publication number Priority date Publication date Assignee Title
CN105975382B (en) * 2016-05-13 2019-01-08 深圳市同泰怡信息技术有限公司 A kind of alarm method that hardware configuration changes
CN106528114A (en) * 2016-10-25 2017-03-22 北京海誉动想科技股份有限公司 Android firmware application, android firmware and firmware upgrading method
TWI646464B (en) * 2017-03-31 2019-01-01 神雲科技股份有限公司 Update method for firmware of management engine
CN107179911B (en) * 2017-05-19 2020-08-18 苏州浪潮智能科技有限公司 Method and equipment for restarting management engine
CN107908508A (en) * 2017-10-10 2018-04-13 曙光信息产业(北京)有限公司 The method, apparatus and server of control BIOS Debugging message output in real time
CN108304198A (en) * 2018-01-29 2018-07-20 郑州云海信息技术有限公司 A kind of firmware update, device and the medium of Intel ME
CN108196865A (en) * 2018-01-29 2018-06-22 郑州云海信息技术有限公司 A kind of firmware update, device and the medium of Intel ME
CN108399075A (en) * 2018-02-28 2018-08-14 郑州云海信息技术有限公司 A kind of method and system of update management engine
CN108509221A (en) * 2018-03-13 2018-09-07 郑州云海信息技术有限公司 A kind of take-effective method and validation system of ME
CN108959973A (en) * 2018-06-27 2018-12-07 郑州云海信息技术有限公司 A kind of guard method and system refreshed for BMC firmware
CN109582505A (en) * 2018-12-06 2019-04-05 广东浪潮大数据研究有限公司 A kind of recovery system, method and device of BIOS option default value
CN110472420B (en) * 2019-07-19 2021-05-11 深圳中电长城信息安全系统有限公司 Binding identification method, system, terminal equipment and storage medium

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103513993A (en) * 2012-06-15 2014-01-15 鸿富锦精密工业(深圳)有限公司 Firmware updating system and method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103513993A (en) * 2012-06-15 2014-01-15 鸿富锦精密工业(深圳)有限公司 Firmware updating system and method

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