CN104851910A - Thin-film transistor, array substrate, producing method, display panel, and display device - Google Patents
Thin-film transistor, array substrate, producing method, display panel, and display device Download PDFInfo
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- CN104851910A CN104851910A CN201510172472.XA CN201510172472A CN104851910A CN 104851910 A CN104851910 A CN 104851910A CN 201510172472 A CN201510172472 A CN 201510172472A CN 104851910 A CN104851910 A CN 104851910A
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- 239000010409 thin film Substances 0.000 title claims abstract description 71
- 238000000034 method Methods 0.000 title claims abstract description 66
- 239000000758 substrate Substances 0.000 title claims abstract description 18
- 239000004020 conductor Substances 0.000 claims abstract description 68
- 229920002120 photoresistant polymer Polymers 0.000 claims description 125
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 59
- 229910021389 graphene Inorganic materials 0.000 claims description 57
- 239000010408 film Substances 0.000 claims description 56
- 229910002804 graphite Inorganic materials 0.000 claims description 24
- 239000010439 graphite Substances 0.000 claims description 24
- -1 graphite alkane Chemical class 0.000 claims description 24
- 238000002360 preparation method Methods 0.000 claims description 18
- 239000012774 insulation material Substances 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- 238000003384 imaging method Methods 0.000 claims description 8
- 238000009413 insulation Methods 0.000 claims description 8
- 230000002441 reversible effect Effects 0.000 claims description 8
- 239000011810 insulating material Substances 0.000 claims description 6
- 208000034699 Vitreous floaters Diseases 0.000 claims 2
- 238000005530 etching Methods 0.000 abstract description 15
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 230000004888 barrier function Effects 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 109
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 25
- 229910052681 coesite Inorganic materials 0.000 description 13
- 229910052906 cristobalite Inorganic materials 0.000 description 13
- 229910052682 stishovite Inorganic materials 0.000 description 13
- 229910052905 tridymite Inorganic materials 0.000 description 13
- 239000012212 insulator Substances 0.000 description 12
- 239000000377 silicon dioxide Substances 0.000 description 12
- 235000012239 silicon dioxide Nutrition 0.000 description 12
- 238000000137 annealing Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 8
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 8
- 229910010271 silicon carbide Inorganic materials 0.000 description 8
- 239000002356 single layer Substances 0.000 description 8
- 239000000463 material Substances 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 238000005979 thermal decomposition reaction Methods 0.000 description 6
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 150000002431 hydrogen Chemical class 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 239000002041 carbon nanotube Substances 0.000 description 2
- 229910021393 carbon nanotube Inorganic materials 0.000 description 2
- 239000003575 carbonaceous material Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007792 gaseous phase Substances 0.000 description 2
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 125000004430 oxygen atom Chemical group O* 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000001179 sorption measurement Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/2807—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a thin-film transistor, an array substrate, a producing method, a display panel, and a display device. The producing method of the thin-film transistor comprises: forming an oxide active layer and forming a drain electrode on the oxide active layer, wherein the drain electrode is in direct contact with the oxide active layer and is made of transparent conductive material. According to the producing method, the drain electrode is directly formed in the oxide active layer so as to be in direct contact with the oxide active layer and an etching barrier layer is not required to be formed. As a result, a mask process is prevented and production cost is reduced. In addition, the drain electrode is made of transparent conductive material so that the aperture opening ratio of the array substrate using the thin-film transistor can be increased. Further, a channel between the source electrode and the drain electrode of the thin-film transistor can be shortened so that the performance of the thin-film transistor is improved.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of thin-film transistor, array base palte, preparation method, display floater and display unit.
Background technology
Please refer to Figure 1A-1E, Figure 1A-1E is the schematic diagram of the manufacture method of existing oxide thin film transistor, and the method mainly comprises the following steps:
Step S101: please refer to Figure 1A, underlay substrate 11 is formed gate electrode 12; This step needs use 1 road mask (mask) technique;
Step S102: please refer to Figure 1B, gate electrode 12 is formed gate insulation layer 13;
Step S103: please refer to Fig. 1 C, gate insulation layer 13 is formed oxide active layer 14; This step needs use 1 road mask technique;
Step S104: please refer to Fig. 1 D, oxide active layer 14 is formed etching barrier layer 15, and forms via hole 151 on etching barrier layer 15; This step needs use 1 road mask technique; During due to follow-up formation source electrode and drain electrode, usually adopt wet-etching technique, in order to avoid wet-etching technique is on the impact of oxide active layer 14, need to form etching barrier layer 15 in oxide active layer 14, to protect oxide active layer 14.
Step S105: please refer to Fig. 1 E, etching barrier layer 15 is formed source electrode 161 and drain electrode 162; Source electrode 161 is contacted with oxide active layer 14 by the via hole 151 on etching barrier layer 15 with drain electrode 162; This step needs use 1 road mask technique.
Visible, in the manufacturing process of above-mentioned oxide thin film transistor, at least need 4 road mask techniques, production process is complicated, and cost is higher.
Summary of the invention
In view of this, the invention provides a kind of thin-film transistor, array base palte, preparation method, display floater and display unit, complicated to solve existing oxide thin film transistor production process, the problem that cost is high.
For solving the problems of the technologies described above, the invention provides a kind of preparation method of thin-film transistor, comprising:
Form oxide active layer;
Described active layer forms source-drain electrode, and wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
Preferably, the described step forming source-drain electrode on described active layer comprises:
Form transparent conductive material film;
Described transparent conductive material film applies photoresist;
Halftoning or gray tone mask plate is adopted to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode graphics field of the complete reserve area of described photoresist, gap area between the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Dry etch process is adopted to etch away the transparent conductive material film that region removed completely by described photoresist;
Cineration technics ash is adopted to melt the photoresist of described photoresist half reserve area;
The transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Stripping photoresist, forms the figure of source-drain electrode.
Preferably, described transparent conductive material is Graphene, and described insulating material is graphite alkane.
Preferably, the step that the described transparent conductive material film by described photoresist half reserve area is converted to insulation material layer is specially:
Reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
The present invention also provides a kind of preparation method of thin-film transistor array base-plate, comprising:
Form oxide active layer;
By the figure of patterning processes formation source-drain electrode, data wire and a pixel electrode, wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode, data wire and pixel electrode adopt transparent conductive material to be formed.
Preferably, the step of the described figure by patterning processes formation source-drain electrode, data wire and a pixel electrode comprises:
Form transparent conductive material film;
Described transparent conductive material film applies photoresist;
Halftoning or gray tone is adopted to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode of the complete reserve area of described photoresist, data wire and pixel electrode graphics field, gap area before the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Dry etch process is adopted to etch away the transparent conductive material film that region removed completely by described photoresist;
Cineration technics ash is adopted to melt the photoresist of described photoresist half reserve area;
The transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Stripping photoresist, forms the figure of source-drain electrode, data wire and pixel electrode.
Preferably, described transparent conductive material is Graphene, and described insulating material is graphite alkane.
Preferably, the step that the described transparent conductive material film by described photoresist half reserve area is converted to insulation material layer is specially:
Reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
The present invention also provides a kind of thin-film transistor, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer and the source-drain electrode on underlay substrate, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
Preferably, described transparent conductive material is Graphene.
Preferably, described thin-film transistor also comprises:
Arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
The present invention also provides a kind of thin-film transistor array base-plate, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer, source-drain electrode, data wire and the pixel electrode on underlay substrate, described source-drain electrode, data wire and pixel electrode adopt same transparent conductive material to be formed, and arrange with layer, described source-drain electrode directly contacts with described active layer.
Preferably, described transparent conductive material is Graphene.
Preferably, described thin-film transistor also comprises:
Arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
The present invention also provides a kind of display floater, comprises above-mentioned thin-film transistor array base-plate.
The present invention also provides a kind of display unit, comprises above-mentioned display floater.
The beneficial effect of technique scheme of the present invention is as follows:
Described source-drain electrode is formed directly into active layer, source-drain electrode is directly contacted with active layer, not needing to form etching barrier layer and the via hole for connecting source-drain electrode and active layer, thus decreasing one mask technique, reducing production cost.In addition, source-drain electrode adopts transparent conductive material, can also promote the aperture opening ratio of the array base palte using this thin-film transistor.Further, the thin-film transistor of the embodiment of the present invention can shorten the raceway groove between source-drain electrode, improves the performance of thin-film transistor.
Accompanying drawing explanation
Figure 1A-1E is the schematic diagram of the manufacture method of existing oxide thin film transistor;
Fig. 2 A to Fig. 2 J is the schematic diagram of the preparation of the thin-film transistor of the embodiment of the present invention;
Fig. 3 A to Fig. 3 F is the schematic diagram of the thin-film transistor array base-plate of the embodiment of the present invention.
Embodiment
Complicated for solving existing oxide thin film transistor production process, the problem that cost is high, the invention provides a kind of preparation method of thin-film transistor, comprises the following steps:
Step S201: form oxide active layer;
Described oxide semiconductor can be the oxide semiconductor such as IGZO (indium gallium zinc oxide) or ITZO (indium tin zinc oxide).
Step S202: form source-drain electrode on described active layer, wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
In the embodiment of the present invention, described source-drain electrode being formed directly into active layer, source-drain electrode is directly contacted with active layer, not needing to form etching barrier layer and the via hole for connecting source-drain electrode and active layer, thus decrease one mask technique, reduce production cost.In addition, source-drain electrode adopts transparent conductive material, can also promote the aperture opening ratio of the array base palte using this thin-film transistor.Further, the thin-film transistor of the embodiment of the present invention can shorten the raceway groove between source-drain electrode, improves the performance of thin-film transistor.
Preferably, described source-drain electrode adopts the transparent conductive material being applicable to dry carving technology to make, and avoids because wet-etching technique causes impact on oxide active layer.
Such as described source-drain electrode can adopt grapheme material to be formed, and Graphene is a kind of Two-dimensional Carbon material, has good electric conductivity, and be applicable to dry carving technology, in addition, Graphene resistance is lower, there is higher electron mobility, be conducive to the performance improving thin-film transistor.And Graphene has the characteristic of adsorbed hydrogen, the hydrogen atom thus in effective absorbing oxide active layer, the oxygen atom of the hydrogen atom avoiding patterning processes to introduce in oxide semiconductor is combined, thus improves stability and the reliability of oxide thin film transistor.In addition, the source-drain electrode in the embodiment of the present invention can adopt single-layer graphene to make, to reduce the thickness of thin-film transistor.
Certainly, described source-drain electrode can also adopt other can hydrogen ion adsorption transparent conductive material formed, such as carbon nano-tube etc.
Below the concrete methods of realizing forming source-drain electrode on described active layer is described in detail.
Preferably, the described step forming source-drain electrode on described active layer comprises:
Step S301: form transparent conductive material film;
Step S302: apply photoresist on described transparent conductive material film;
Step S303: adopt halftoning or gray tone mask plate to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode graphics field of the complete reserve area of described photoresist, gap area between the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Step S304: adopt dry etch process to etch away the transparent conductive material film that region removed completely by described photoresist;
Step S305: adopt cineration technics ash to melt the photoresist of described photoresist half reserve area;
Step S306: the transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Step S307: stripping photoresist, forms the figure of source-drain electrode.
In above-mentioned steps S306, the transparent conductive material film of described photoresist half reserve area is converted to insulation material layer, and this insulating layer material can be protected the oxide active layer between source-drain electrode, and can not affect the work of thin-film transistor.
When transparent conductive material is Graphene, this insulating material is graphite alkane.
When transparent conductive material is Graphene, the step that the etch stopper material film of described photoresist half reserve area is converted to insulation material layer is specifically as follows: reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Please refer to Fig. 2 A to Fig. 2 J, the preparation method of the thin-film transistor of the embodiment of the present invention comprises the following steps:
Step S401: please refer to Fig. 2 A, underlay substrate 11 is formed gate electrode 12;
Concrete, deposition process can be adopted to form one deck grid metallic film, and grid metal can be the metals such as Mo, W, Al, Cu, and thickness, at about 200-300nm, then carries out photoetching process and forms gate electrode 12.
Step S402: please refer to Fig. 2 B, gate electrode 12 is formed gate insulator 13;
Concrete, chemical gaseous phase depositing process (PECVD) can be adopted to form gate insulator 13, gate insulator 13 can be single layer structure or sandwich construction, such as SiO2 single layer structure, SiNx/SiO2 double-decker, SiON/SiO2 double-decker, or SiNx/SiON/SiO2 three-decker.Preferably, gate insulator 13 and the direct contact layer of active layer are SiO2 layer, because H content is smaller in SiO2, effectively can improve the characteristic of oxide active layer.The thickness of gate insulator 13 can be 150-300nm.
Step S403: please refer to Fig. 2 C, gate insulator 13 is formed oxide active layer 14;
Concrete, sputtering (Sputter) equipment can be used to deposit the oxide semiconductor thin-film of 40-50nm thickness, use photoetching process to be formed with the figure of active layer 14 afterwards.Preferably, after formation oxide active layer 14, carry out an annealing process, improve the stability of oxide active layer.
Step S404: please refer to Fig. 2 D, oxide active layer 14 is formed graphene film 15;
Concrete, vapour deposition process or SiC (carborundum) thermal decomposition method can be used first to form one deck single-layer graphene film 15, and preferably, adopt SiC thermal decomposition method, reason is that SiC thermal decomposition method can not introduce hydrogen atom.
Step S405: please refer to Fig. 2 E, described graphene film 15 applies photoresist 21;
Step S406: please refer to Fig. 2 F, intermediate tone mask plate (half tone Mask) or gray tone mask plate is adopted to carry out exposure imaging to described photoresist 21, form the complete reserve area 211 of photoresist, photoresist half reserve area 212 and photoresist and remove region 213 completely, wherein, the corresponding source-drain electrode graphics field of the complete reserve area of described photoresist 211, gap area (i.e. channel region) between the corresponding source-drain electrode of described photoresist half reserve area 212, other regions corresponding, region 213 removed completely by described photoresist;
Step S407: please refer to Fig. 2 G, adopts etching technics to etch away the graphene film that region 213 removed completely by described photoresist;
Concrete, use dry etch process etching graphene film, dry to carve atmosphere can be oxygen, with the damage of the oxide active layer (raceway groove) between reducing source-drain electrode.
Step S408: please refer to Fig. 2 H, adopts cineration technics to remove the photoresist of described photoresist half reserve area 212;
Step S409: please refer to Fig. 2 I, is converted to graphite alkane layer 153 by the graphene film of described photoresist half reserve area 212;
Concrete, can adopt reversible hydrotreatment that Graphene is processed into graphite alkane.
Preferably, asked the stability improving oxide thin film transistor, after the graphene film of described photoresist half reserve area 212 is converted to graphite alkane layer 153, can also carry out an annealing process again, annealing temperature can at 230 DEG C-350 DEG C.
Step S410: please refer to Fig. 2 J, peels off remaining photoresist, forms the figure of source electrode 151 and drain electrode 152.
In the embodiment of the present invention, Graphene is adopted to form source-drain electrode, the source-drain electrode formed directly contacts with active layer, do not need to form etching barrier layer and the via hole for connecting source-drain electrode and active layer, thus one mask technique is decreased, reduce production cost, and Graphene adopts dry carving technology, etching process can not impact oxide active layer.In addition, Graphene is transparent conductive material, can also promote the aperture opening ratio of the array base palte using this thin-film transistor.Further, the thin-film transistor of the embodiment of the present invention can shorten the raceway groove between source-drain electrode, improves the performance of thin-film transistor.In addition, Graphene has the effect of adsorbed hydrogen, can hydrogen atom effectively in absorbing oxide active layer, improves stability and the reliability of thin-film transistor.
The embodiment of the present invention also provides a kind of preparation method of thin-film transistor array base-plate, comprises the following steps:
Step S501: form oxide active layer;
Step S502: by the figure of patterning processes formation source-drain electrode, data wire and a pixel electrode, wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode, data wire and pixel electrode adopt transparent conductive material to be formed.
In the embodiment of the present invention, described source-drain electrode is formed directly into active layer, source-drain electrode is directly contacted with active layer, do not need to form etching barrier layer and the via hole for connecting source-drain electrode and active layer, and, by the figure of patterning processes formation source-drain electrode, data wire and a pixel electrode, decrease twice mask technique, reduce production cost.
In addition, source-drain electrode adopts transparent conductive material, can also promote the aperture opening ratio of the array base palte of thin-film transistor.Further, the thin-film transistor of the embodiment of the present invention can shorten the raceway groove between source-drain electrode, improves the performance of thin-film transistor.
Preferably, described source-drain electrode, data wire and pixel electrode adopt the transparent conductive material being applicable to dry carving technology to make, and avoid because wet-etching technique causes impact on oxide active layer.
Such as described source-drain electrode, data wire and pixel electrode can adopt grapheme material to be formed, Graphene is a kind of Two-dimensional Carbon material, there is good electric conductivity, and be applicable to dry carving technology, in addition, Graphene resistance is lower, has higher electron mobility, is conducive to the performance improving thin-film transistor.And Graphene has the characteristic of adsorbed hydrogen, the hydrogen atom thus in effective absorbing oxide active layer, the oxygen atom of the hydrogen atom avoiding patterning processes to introduce in oxide semiconductor is combined, thus improves stability and the reliability of oxide thin film transistor.In addition, the source-drain electrode in the embodiment of the present invention, data wire and pixel electrode can adopt single-layer graphene to make, to reduce the thickness of thin-film transistor array base-plate.
Certainly, described source-drain electrode, data wire and pixel electrode can also adopt other can hydrogen ion adsorption transparent conductive material formed, such as carbon nano-tube etc.
Below the concrete methods of realizing by patterning processes formation source-drain electrode, data wire and a pixel electrode is described in detail.
Preferably, comprised by the step of patterning processes formation source-drain electrode, data wire and a pixel electrode:
Step 601: form transparent conductive material film;
Step 602: apply photoresist on described transparent conductive material film;
Step 603: adopt halftoning or gray tone to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode of the complete reserve area of described photoresist, data wire and pixel electrode graphics field, gap area before the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Step 604: adopt dry etch process to etch away the transparent conductive material film that region removed completely by described photoresist;
Step 605: adopt cineration technics ash to melt the photoresist of described photoresist half reserve area;
Step 606: the transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Step 607: stripping photoresist, forms the figure of source-drain electrode, data wire and pixel electrode.
In above-mentioned steps S606, the transparent conductive material film of described photoresist half reserve area is converted to insulation material layer, and this insulating layer material can be protected the oxide active layer between source-drain electrode, and can not affect the work of thin-film transistor.
In above-described embodiment, form source-drain electrode, data wire and pixel electrode by a patterning processes, twice mask technique can be saved.
When transparent conductive material film is Graphene, the insulating material be converted to is graphite alkane.
When transparent conductive material film is Graphene, the step that the transparent conductive material film of described photoresist half reserve area is converted to insulation material layer is specifically as follows: reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
Please refer to Fig. 3 A to Fig. 3 F, the preparation method of the thin-film transistor array base-plate of the embodiment of the present invention comprises the following steps:
Step S701: form gate electrode 12 on underlay substrate 11; Please refer to Fig. 2 A;
Concrete, deposition process can be adopted to form one deck grid metallic film, and grid metal can be the metals such as Mo, W, Al, Cu, and thickness, at about 200-300nm, then carries out photoetching process and forms gate electrode 12.
Step S702: form gate insulator 13 on gate electrode 12; Please refer to Fig. 2 B,
Concrete, chemical gaseous phase depositing process (PECVD) can be adopted to form gate insulator 13, gate insulator 13 can be single layer structure or sandwich construction, such as SiO2 single layer structure, SiNx/SiO2 double-decker, SiON/SiO2 double-decker, or SiNx/SiON/SiO2 three-decker.Preferably, gate insulator 13 and the direct contact layer of active layer are SiO2 layer, because H content is smaller in SiO2, effectively can improve the characteristic of oxide active layer.The thickness of gate insulator 13 can be 150-300nm.
Step S703: form oxide active layer 14 on gate insulator 13; Please refer to Fig. 2 C,
Concrete, sputtering (Sputter) equipment can be used to deposit the oxide semiconductor thin-film of 40-50nm thickness, use photoetching process to be formed with the figure of active layer 14 afterwards.Preferably, after formation oxide active layer 14, carry out an annealing process, improve the stability of oxide active layer.
Step S704: form graphene film 15 in oxide active layer 14; Please refer to Fig. 2 D;
Concrete, vapour deposition process or SiC (carborundum) thermal decomposition method can be used first to form one deck single-layer graphene film 15, and preferably, adopt SiC thermal decomposition method, reason is that SiC thermal decomposition method can not introduce hydrogen atom.
Step S705: apply photoresist 21 on described graphene film 15; Please refer to Fig. 2 E;
Step S706: please refer to Fig. 3 A, intermediate tone mask plate (half tone Mask) or gray tone mask plate is adopted to carry out exposure imaging to described photoresist 21, form the complete reserve area 211 of photoresist, region 213 removed completely by photoresist half reserve area 212 and photoresist, wherein, the corresponding source-drain electrode of the complete reserve area of described photoresist 211, data wire and pixel electrode graphics field, gap area (i.e. channel region) between the corresponding source-drain electrode of described photoresist half reserve area 212, other regions corresponding, region 213 removed completely by described photoresist,
Step S707: please refer to Fig. 3 B, adopts etching technics to etch away the graphene film that region 213 removed completely by described photoresist;
Concrete, dry etch process can be used to etch graphene film, and doing and carve atmosphere can be oxygen.
Step S708: please refer to Fig. 3 C, adopts cineration technics to remove the photoresist of described photoresist half reserve area 212;
Step S709: please refer to Fig. 3 D, is converted to graphite alkane layer 153 by the graphene film of the gap area between described source-drain electrode;
Concrete, can adopt reversible hydrotreatment that Graphene is processed into graphite alkane.Preferably, asked the stability improving oxide thin film transistor, after the graphene film of described photoresist half reserve area 212 is converted to graphite alkane layer 153, can also carry out an annealing process again, annealing temperature can at 230 DEG C-350 DEG C.
Step S710: please refer to Fig. 3 E, peels off remaining photoresist, forms the figure of source electrode 151, drain electrode 152, pixel electrode 154 and data wire (scheming not shown).
Step S711: please refer to Fig. 3 F, forms passivation layer 17.
In order to improve the stability of oxide thin film transistor, preferably, after array base palte completes, carry out final annealing process, annealing temperature must not higher than the rear baking temperature of passivation material (being generally resin), generally between 200-250 DEG C.
In the embodiment of the present invention, adopt a patterning processes to form source-drain electrode, pixel electrode and data wire, can decrease twice mask technique, reduce production cost, and Graphene adopts dry carving technology, etching process can not impact oxide active layer.In addition, Graphene is transparent conductive material, can also promote the aperture opening ratio of thin-film transistor array base-plate.Further, the thin-film transistor of the embodiment of the present invention can shorten the raceway groove between source-drain electrode, improves the performance of thin-film transistor.In addition, Graphene has the effect of adsorbed hydrogen, can hydrogen atom effectively in absorbing oxide active layer, improves stability and the reliability of thin-film transistor.The present invention also provides a kind of thin-film transistor, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer and the source-drain electrode on underlay substrate, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
Preferably, described transparent conductive material is Graphene.
Preferably, be the channel region between protection source-drain electrode, described thin-film transistor also comprises: arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
The present invention also provides a kind of thin-film transistor array base-plate, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer, source-drain electrode, data wire and the pixel electrode on underlay substrate, described source-drain electrode, data wire and pixel electrode adopt same transparent conductive material to be formed, and arrange with layer, described source-drain electrode directly contacts with described active layer.
Preferably, described transparent conductive material is Graphene.
Preferably, be the channel region between protection source-drain electrode, described thin-film transistor also comprises: arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
The present invention also provides a kind of display floater, comprises above-mentioned thin-film transistor array base-plate.
The present invention also provides a kind of display unit, comprises above-mentioned display floater.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from principle of the present invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (16)
1. a preparation method for thin-film transistor, is characterized in that, comprising:
Form oxide active layer;
Described active layer forms source-drain electrode, and wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
2. preparation method according to claim 1, is characterized in that, the described step forming source-drain electrode on described active layer comprises:
Form transparent conductive material film;
Described transparent conductive material film applies photoresist;
Halftoning or gray tone mask plate is adopted to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode graphics field of the complete reserve area of described photoresist, gap area between the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Dry etch process is adopted to etch away the transparent conductive material film that region removed completely by described photoresist;
Cineration technics ash is adopted to melt the photoresist of described photoresist half reserve area;
The transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Stripping photoresist, forms the figure of source-drain electrode.
3. preparation method according to claim 2, is characterized in that, described transparent conductive material is Graphene, and described insulating material is graphite alkane.
4. preparation method according to claim 3, is characterized in that, the step that the described transparent conductive material film by described photoresist half reserve area is converted to insulation material layer is specially:
Reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
5. a preparation method for thin-film transistor array base-plate, is characterized in that, comprising:
Form oxide active layer;
By the figure of patterning processes formation source-drain electrode, data wire and a pixel electrode, wherein, described source-drain electrode directly contacts with described active layer, and described source-drain electrode, data wire and pixel electrode adopt transparent conductive material to be formed.
6. preparation method according to claim 1, is characterized in that, the step of the described figure by patterning processes formation source-drain electrode, data wire and a pixel electrode comprises:
Form transparent conductive material film;
Described transparent conductive material film applies photoresist;
Halftoning or gray tone is adopted to carry out exposure imaging to described photoresist, form the complete reserve area of photoresist, photoresist half reserve area and photoresist and remove region completely, wherein, the corresponding source-drain electrode of the complete reserve area of described photoresist, data wire and pixel electrode graphics field, gap area before the corresponding source-drain electrode of described photoresist half reserve area, other regions corresponding, region removed completely by described photoresist;
Dry etch process is adopted to etch away the transparent conductive material film that region removed completely by described photoresist;
Cineration technics ash is adopted to melt the photoresist of described photoresist half reserve area;
The transparent conductive material film of described photoresist half reserve area is converted to insulation material layer;
Stripping photoresist, forms the figure of source-drain electrode, data wire and pixel electrode.
7. preparation method according to claim 6, is characterized in that, described transparent conductive material is Graphene, and described insulating material is graphite alkane.
8. preparation method according to claim 7, is characterized in that, the step that the described transparent conductive material film by described photoresist half reserve area is converted to insulation material layer is specially:
Reversible hydrotreatment is carried out to the graphene film of described photoresist half reserve area, the Graphene of described photoresist half reserve area is converted to graphite alkane.
9. a thin-film transistor, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer and the source-drain electrode on underlay substrate, it is characterized in that, described source-drain electrode directly contacts with described active layer, and described source-drain electrode adopts transparent conductive material to be formed.
10. thin-film transistor according to claim 9, is characterized in that, described transparent conductive material is Graphene.
11. thin-film transistors according to claim 10, is characterized in that, also comprise:
Arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
12. 1 kinds of thin-film transistor array base-plates, comprise underlay substrate and be arranged at gate electrode, gate insulation layer, oxide active layer, source-drain electrode, data wire and the pixel electrode on underlay substrate, it is characterized in that, described source-drain electrode, data wire and pixel electrode adopt same transparent conductive material to be formed, and arrange with layer, described source-drain electrode directly contacts with described active layer.
13. thin-film transistor array base-plates according to claim 12, is characterized in that, described transparent conductive material is Graphene.
14. thin-film transistor array base-plates according to claim 13, is characterized in that, also comprise:
Arrange with layer with described source-drain electrode, and the graphite alkane layer between described source-drain electrode.
15. 1 kinds of display floaters, is characterized in that, comprise the thin-film transistor array base-plate as described in any one of claim 12-14.
16. 1 kinds of display unit, is characterized in that, comprise display floater as claimed in claim 15.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206740A (en) * | 2016-08-30 | 2016-12-07 | 武汉华星光电技术有限公司 | Nmos pass transistor, PMOS transistor, CMOS transistor and preparation method thereof |
| CN107170835A (en) * | 2017-07-07 | 2017-09-15 | 合肥鑫晟光电科技有限公司 | Thin film transistor (TFT) and preparation method thereof and array base palte |
| CN107564803A (en) * | 2017-08-31 | 2018-01-09 | 京东方科技集团股份有限公司 | Lithographic method, process equipment, film transistor device and its manufacture method |
| CN107706115A (en) * | 2017-10-09 | 2018-02-16 | 深圳市华星光电半导体显示技术有限公司 | A kind of thin film transistor (TFT) and preparation method thereof |
| CN108430913A (en) * | 2015-11-20 | 2018-08-21 | 财富国际私人有限公司 | Graphite alkane-metallic composite of high conductivity and preparation method thereof |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140070107A1 (en) * | 2012-09-11 | 2014-03-13 | International Business Machines Corporation | Ultra-sensitive radiation dosimeters |
| KR20150006132A (en) * | 2013-07-08 | 2015-01-16 | 엘지디스플레이 주식회사 | Oxide thin film transitor and method for manufacturing the same |
| CN104317162A (en) * | 2014-11-03 | 2015-01-28 | 重庆墨希科技有限公司 | Graphene chemical patterning method |
-
2015
- 2015-04-13 CN CN201510172472.XA patent/CN104851910A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140070107A1 (en) * | 2012-09-11 | 2014-03-13 | International Business Machines Corporation | Ultra-sensitive radiation dosimeters |
| KR20150006132A (en) * | 2013-07-08 | 2015-01-16 | 엘지디스플레이 주식회사 | Oxide thin film transitor and method for manufacturing the same |
| CN104317162A (en) * | 2014-11-03 | 2015-01-28 | 重庆墨希科技有限公司 | Graphene chemical patterning method |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108430913A (en) * | 2015-11-20 | 2018-08-21 | 财富国际私人有限公司 | Graphite alkane-metallic composite of high conductivity and preparation method thereof |
| CN106206740A (en) * | 2016-08-30 | 2016-12-07 | 武汉华星光电技术有限公司 | Nmos pass transistor, PMOS transistor, CMOS transistor and preparation method thereof |
| CN107170835A (en) * | 2017-07-07 | 2017-09-15 | 合肥鑫晟光电科技有限公司 | Thin film transistor (TFT) and preparation method thereof and array base palte |
| CN107564803A (en) * | 2017-08-31 | 2018-01-09 | 京东方科技集团股份有限公司 | Lithographic method, process equipment, film transistor device and its manufacture method |
| CN107564803B (en) * | 2017-08-31 | 2020-04-17 | 京东方科技集团股份有限公司 | Etching method, process equipment, thin film transistor device and manufacturing method thereof |
| CN107706115A (en) * | 2017-10-09 | 2018-02-16 | 深圳市华星光电半导体显示技术有限公司 | A kind of thin film transistor (TFT) and preparation method thereof |
| CN110610946A (en) * | 2019-08-22 | 2019-12-24 | 武汉华星光电技术有限公司 | Thin film transistor, preparation method thereof and liquid crystal display panel |
| CN111146264A (en) * | 2020-02-06 | 2020-05-12 | 合肥鑫晟光电科技有限公司 | OLED display substrate, manufacturing method thereof and display device |
| CN111146264B (en) * | 2020-02-06 | 2023-08-18 | 合肥鑫晟光电科技有限公司 | OLED display substrate, manufacturing method thereof and display device |
| CN111276402A (en) * | 2020-02-20 | 2020-06-12 | 西安电子科技大学 | Transistor based on metal oxide/graphene heterojunction and preparation method thereof |
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